package/boot/uboot-mediatek/patches/009-board-mediatek-Add-support-for-UniElec-U7623-board.patch

   1 From 3fad1ca28d4c87346d18b89438bf2084fb2c3896 Mon Sep 17 00:00:00 2001
   2 From: David Woodhouse <dwmw2@infradead.org>
   3 Date: Sun, 12 Jul 2020 23:33:03 +0100
   4 Subject: [PATCH 3/3] board: mediatek: Add support for UniElec U7623 board
   5
   6 This is an MT7623A-based board, very similar to the Banana Pi R2.
   7
   8 http://www.unielecinc.com/q/news/cn/p/product/detail.html?qd_guid=OjXwKCaRlN
   9
  10 Signed-off-by: David Woodhouse <dwmw2@infradead.org>
  11 ---
  12  arch/arm/dts/Makefile                         |   1 +
  13  .../arm/dts/mt7623a-unielec-u7623-02-emmc.dts | 211 ++++++++++++++++++
  14  board/mediatek/mt7623/MAINTAINERS             |   7 +
  15  configs/mt7623a_unielec_u7623_02_defconfig    |  54 +++++
  16  4 files changed, 273 insertions(+)
  17  create mode 100644 arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts
  18  create mode 100644 configs/mt7623a_unielec_u7623_02_defconfig
  19
  20 diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
  21 index a3a1e3fbe4..caa7756c5d 100644
  22 --- a/arch/arm/dts/Makefile
  23 +++ b/arch/arm/dts/Makefile
  24 @@ -949,6 +949,7 @@ dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
  25
  26  dtb-$(CONFIG_ARCH_MEDIATEK) += \
  27         mt7622-rfb.dtb \
  28 +       mt7623a-unielec-u7623-02-emmc.dtb \
  29         mt7623n-bananapi-bpi-r2.dtb \
  30         mt7629-rfb.dtb \
  31         mt8512-bm1-emmc.dtb \
  32 diff --git a/arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts b/arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts
  33 new file mode 100644
  34 index 0000000000..fdeec75b05
  35 --- /dev/null
  36 +++ b/arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts
  37 @@ -0,0 +1,211 @@
  38 +/*
  39 + * Copyright (C) 2018 MediaTek Inc.
  40 + * Author: Ryder Lee <ryder.lee@mediatek.com>
  41 + *
  42 + * SPDX-License-Identifier: (GPL-2.0 OR MIT)
  43 + */
  44 +
  45 +/dts-v1/;
  46 +#include "mt7623.dtsi"
  47 +#include "mt7623-u-boot.dtsi"
  48 +
  49 +/ {
  50 +       model = "UniElec U7623-02 eMMC";
  51 +       compatible = "unielec,u7623-02-emmc", "mediatek,mt7623";
  52 +
  53 +       memory@80000000 {
  54 +               device_type = "memory";
  55 +               reg = <0 0x80000000 0 0x20000000>;
  56 +       };
  57 +
  58 +       chosen {
  59 +               stdout-path = &uart2;
  60 +               tick-timer = &timer0;
  61 +       };
  62 +
  63 +       reg_1p8v: regulator-1p8v {
  64 +               compatible = "regulator-fixed";
  65 +               regulator-name = "fixed-1.8V";
  66 +               regulator-min-microvolt = <1800000>;
  67 +               regulator-max-microvolt = <1800000>;
  68 +               regulator-boot-on;
  69 +               regulator-always-on;
  70 +       };
  71 +
  72 +       reg_3p3v: regulator-3p3v {
  73 +               compatible = "regulator-fixed";
  74 +               regulator-name = "fixed-3.3V";
  75 +               regulator-min-microvolt = <3300000>;
  76 +               regulator-max-microvolt = <3300000>;
  77 +               regulator-boot-on;
  78 +               regulator-always-on;
  79 +       };
  80 +
  81 +       reg_5v: regulator-5v {
  82 +               compatible = "regulator-fixed";
  83 +               regulator-name = "fixed-5V";
  84 +               regulator-min-microvolt = <5000000>;
  85 +               regulator-max-microvolt = <5000000>;
  86 +               regulator-boot-on;
  87 +               regulator-always-on;
  88 +       };
  89 +
  90 +       leds {
  91 +               compatible = "gpio-leds";
  92 +
  93 +               led3 {
  94 +                       label = "u7623-01:green:led3";
  95 +                       gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  96 +                       default-state = "off";
  97 +               };
  98 +
  99 +               led4 {
 100 +                       label = "u7623-01:green:led4";
 101 +                       gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
 102 +                       default-state = "off";
 103 +               };
 104 +       };
 105 +};
 106 +
 107 +&eth {
 108 +       status = "okay";
 109 +       mediatek,gmac-id = <0>;
 110 +       phy-mode = "rgmii";
 111 +       mediatek,switch = "mt7530";
 112 +       mediatek,mcm;
 113 +
 114 +       fixed-link {
 115 +               speed = <1000>;
 116 +               full-duplex;
 117 +       };
 118 +};
 119 +
 120 +&mmc0 {
 121 +       pinctrl-names = "default";
 122 +       pinctrl-0 = <&mmc0_pins_default>;
 123 +       status = "okay";
 124 +       bus-width = <8>;
 125 +       max-frequency = <50000000>;
 126 +       cap-mmc-highspeed;
 127 +       vmmc-supply = <&reg_3p3v>;
 128 +       vqmmc-supply = <&reg_1p8v>;
 129 +       non-removable;
 130 +};
 131 +
 132 +&pinctrl {
 133 +       ephy_default: ephy_default {
 134 +               mux {
 135 +                       function = "eth";
 136 +                       groups = "mdc_mdio", "ephy";
 137 +               };
 138 +
 139 +               conf {
 140 +                       pins = "G2_TXEN", "G2_TXD0", "G2_TXD1", "G2_TXD2",
 141 +                              "G2_TXD3", "G2_TXC", "G2_RXC", "G2_RXD0",
 142 +                              "G2_RXD1", "G2_RXD2", "G2_RXD3", "G2_RXDV",
 143 +                              "MDC", "MDIO";
 144 +                       drive-strength = <12>;
 145 +                       mediatek,tdsel = <5>;
 146 +               };
 147 +       };
 148 +
 149 +       mmc0_pins_default: mmc0default {
 150 +               mux {
 151 +                       function = "msdc";
 152 +                       groups =  "msdc0";
 153 +               };
 154 +
 155 +               conf-cmd-data {
 156 +                       pins = "MSDC0_CMD", "MSDC0_DAT0", "MSDC0_DAT1",
 157 +                              "MSDC0_DAT2", "MSDC0_DAT3", "MSDC0_DAT4",
 158 +                              "MSDC0_DAT5", "MSDC0_DAT6", "MSDC0_DAT7";
 159 +                       input-enable;
 160 +                       bias-pull-up;
 161 +               };
 162 +
 163 +               conf-clk {
 164 +                       pins = "MSDC0_CLK";
 165 +                       bias-pull-down;
 166 +               };
 167 +
 168 +               conf-rst {
 169 +                       pins = "MSDC0_RSTB";
 170 +                       bias-pull-up;
 171 +               };
 172 +       };
 173 +
 174 +       pcie_default: pcie-default {
 175 +               mux {
 176 +                       function = "pcie";
 177 +                       groups =  "pcie0_0_perst", "pcie1_0_perst";
 178 +               };
 179 +       };
 180 +
 181 +       uart0_pins_a: uart0-default {
 182 +               mux {
 183 +                       function = "uart";
 184 +                       groups =  "uart0_0_txd_rxd";
 185 +               };
 186 +       };
 187 +
 188 +       uart1_pins_a: uart1-default {
 189 +               mux {
 190 +                       function = "uart";
 191 +                       groups =  "uart1_0_txd_rxd";
 192 +               };
 193 +       };
 194 +
 195 +       uart2_pins_a: uart2-default {
 196 +               mux {
 197 +                       function = "uart";
 198 +                       groups =  "uart2_0_txd_rxd";
 199 +               };
 200 +       };
 201 +
 202 +       uart2_pins_b: uart2-alt {
 203 +               mux {
 204 +                       function = "uart";
 205 +                       groups =  "uart2_1_txd_rxd";
 206 +               };
 207 +       };
 208 +};
 209 +
 210 +&pcie {
 211 +       pinctrl-names = "default";
 212 +       pinctrl-0 = <&pcie_default>;
 213 +       status = "okay";
 214 +
 215 +       pcie@0,0 {
 216 +               status = "okay";
 217 +       };
 218 +
 219 +       pcie@1,0 {
 220 +               status = "okay";
 221 +       };
 222 +};
 223 +
 224 +&pcie0_phy {
 225 +       status = "okay";
 226 +};
 227 +
 228 +&pcie1_phy {
 229 +       status = "okay";
 230 +};
 231 +
 232 +&uart0 {
 233 +       pinctrl-names = "default";
 234 +       pinctrl-0 = <&uart0_pins_a>;
 235 +       status = "okay";
 236 +};
 237 +
 238 +&uart1 {
 239 +       pinctrl-names = "default";
 240 +       pinctrl-0 = <&uart1_pins_a>;
 241 +       status = "okay";
 242 +};
 243 +
 244 +&uart2 {
 245 +       pinctrl-names = "default";
 246 +       pinctrl-0 = <&uart2_pins_b>;
 247 +       status = "okay";
 248 +};
 249 diff --git a/board/mediatek/mt7623/MAINTAINERS b/board/mediatek/mt7623/MAINTAINERS
 250 index eeb0375d70..1a8d796bd3 100644
 251 --- a/board/mediatek/mt7623/MAINTAINERS
 252 +++ b/board/mediatek/mt7623/MAINTAINERS
 253 @@ -5,3 +5,10 @@ S:     Maintained
 254  F:     board/mediatek/mt7623
 255  F:     include/configs/mt7623.h
 256  F:     configs/mt7623n_bpir2_defconfig
 257 +
 258 +UNIELEC U7623
 259 +M:     Ryder Lee <ryder.lee@mediatek.com>
 260 +M:     David Woodhouse <dwmw2@infradead.org>
 261 +S:     Maintained
 262 +F:     arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts
 263 +F:     configs/mt7623a_unielec_u7623_02_defconfig
 264 diff --git a/configs/mt7623a_unielec_u7623_02_defconfig b/configs/mt7623a_unielec_u7623_02_defconfig
 265 new file mode 100644
 266 index 0000000000..72b5f31092
 267 --- /dev/null
 268 +++ b/configs/mt7623a_unielec_u7623_02_defconfig
 269 @@ -0,0 +1,54 @@
 270 +CONFIG_ARM=y
 271 +CONFIG_SYS_THUMB_BUILD=y
 272 +CONFIG_ARCH_MEDIATEK=y
 273 +CONFIG_SYS_TEXT_BASE=0x81e00000
 274 +CONFIG_SYS_MALLOC_F_LEN=0x4000
 275 +CONFIG_ENV_SIZE=0x1000
 276 +CONFIG_ENV_OFFSET=0x100000
 277 +CONFIG_TARGET_MT7623=y
 278 +CONFIG_NR_DRAM_BANKS=1
 279 +CONFIG_DISTRO_DEFAULTS=y
 280 +CONFIG_FIT=y
 281 +CONFIG_FIT_VERBOSE=y
 282 +CONFIG_BOOTDELAY=3
 283 +CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 284 +CONFIG_DEFAULT_FDT_FILE="mt7623a-unielec-u7623-02-emmc.dtb"
 285 +# CONFIG_DISPLAY_BOARDINFO is not set
 286 +CONFIG_SYS_PROMPT="U-Boot> "
 287 +CONFIG_CMD_BOOTMENU=y
 288 +# CONFIG_CMD_ELF is not set
 289 +# CONFIG_CMD_XIMG is not set
 290 +CONFIG_CMD_GPIO=y
 291 +CONFIG_CMD_GPT=y
 292 +CONFIG_CMD_MMC=y
 293 +CONFIG_CMD_READ=y
 294 +# CONFIG_CMD_SETEXPR is not set
 295 +# CONFIG_CMD_NFS is not set
 296 +CONFIG_DEFAULT_DEVICE_TREE="mt7623a-unielec-u7623-02-emmc"
 297 +CONFIG_ENV_IS_IN_MMC=y
 298 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 299 +CONFIG_NET_RANDOM_ETHADDR=y
 300 +CONFIG_REGMAP=y
 301 +CONFIG_SYSCON=y
 302 +CONFIG_CLK=y
 303 +CONFIG_DM_MMC=y
 304 +# CONFIG_MMC_QUIRKS is not set
 305 +CONFIG_SUPPORT_EMMC_BOOT=y
 306 +CONFIG_MMC_HS400_SUPPORT=y
 307 +CONFIG_MMC_MTK=y
 308 +CONFIG_PHY_FIXED=y
 309 +CONFIG_DM_ETH=y
 310 +CONFIG_MEDIATEK_ETH=y
 311 +CONFIG_PINCTRL=y
 312 +CONFIG_PINCONF=y
 313 +CONFIG_PINCTRL_MT7623=y
 314 +CONFIG_POWER_DOMAIN=y
 315 +CONFIG_MTK_POWER_DOMAIN=y
 316 +CONFIG_DM_SERIAL=y
 317 +CONFIG_MTK_SERIAL=y
 318 +CONFIG_SYSRESET=y
 319 +CONFIG_SYSRESET_WATCHDOG=y
 320 +CONFIG_TIMER=y
 321 +CONFIG_MTK_TIMER=y
 322 +CONFIG_WDT_MTK=y
 323 +CONFIG_LZMA=y
 324 --
 325 2.26.2
 326