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[openwrt/openwrt.git] / package / boot / uboot-mxs / patches / 001-add-i2se-duckbill.patch
1 From 25de6430219d3f3698d709c10358fbea17b24cf1 Mon Sep 17 00:00:00 2001
2 From: Michael Heimpold <mhei@heimpold.de>
3 Date: Fri, 21 Apr 2017 11:08:19 +0200
4 Subject: [PATCH] arm: mxs: add support for I2SE's Duckbill boards
5
6 The Duckbill devices are small, pen-drive sized boards based on
7 NXP's i.MX28 SoC. While the initial variants (Duckbill series) were
8 equipped with a micro SD card slot only, the latest generation
9 (Duckbill 2 series) have an additional internal eMMC onboard.
10
11 Both device generations consists of four "family members":
12
13 - Duckbill/Duckbill 2: generic board, intended to be used as
14 baseboard for custom designs and/or as development board
15
16 - Duckbill EnOcean/Duckbill 2 EnOcean: come with an EnOcean
17 daugther board equipped with the popular TCM310 module
18
19 - Duckbill 485/Duckbill 2 485: as the name implies, these
20 devices are intended to be used as Ethernet - RS485 converters
21
22 - Duckbill SPI/Duckbill 2 SPI: not sold separately, but used
23 in I2SE's development kits for Green PHY HomePlug Powerline
24 communication
25
26 Signed-off-by: Michael Heimpold <mhei@heimpold.de>
27 Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
28 ---
29 arch/arm/Kconfig | 9 +-
30 board/i2se/duckbill/Kconfig | 15 +++
31 board/i2se/duckbill/MAINTAINERS | 6 ++
32 board/i2se/duckbill/Makefile | 12 +++
33 board/i2se/duckbill/duckbill.c | 181 ++++++++++++++++++++++++++++++++++++
34 board/i2se/duckbill/iomux.c | 157 +++++++++++++++++++++++++++++++
35 configs/duckbill_defconfig | 31 +++++++
36 include/configs/duckbill.h | 199 ++++++++++++++++++++++++++++++++++++++++
37 8 files changed, 609 insertions(+), 1 deletion(-)
38 create mode 100644 board/i2se/duckbill/Kconfig
39 create mode 100644 board/i2se/duckbill/MAINTAINERS
40 create mode 100644 board/i2se/duckbill/Makefile
41 create mode 100644 board/i2se/duckbill/duckbill.c
42 create mode 100644 board/i2se/duckbill/iomux.c
43 create mode 100644 configs/duckbill_defconfig
44 create mode 100644 include/configs/duckbill.h
45
46 --- a/arch/arm/Kconfig
47 +++ b/arch/arm/Kconfig
48 @@ -373,6 +373,12 @@ config TARGET_MX28EVK
49 select SUPPORT_SPL
50 select BOARD_EARLY_INIT_F
51
52 +config TARGET_DUCKBILL
53 + bool "Support duckbill"
54 + select CPU_ARM926EJS
55 + select SUPPORT_SPL
56 + select BOARD_EARLY_INIT_F
57 +
58 config TARGET_MX23_OLINUXINO
59 bool "Support mx23_olinuxino"
60 select CPU_ARM926EJS
61 @@ -1250,6 +1256,7 @@ source "board/gumstix/pepper/Kconfig"
62 source "board/h2200/Kconfig"
63 source "board/hisilicon/hikey/Kconfig"
64 source "board/hisilicon/poplar/Kconfig"
65 +source "board/i2se/duckbill/Kconfig"
66 source "board/imx31_phycore/Kconfig"
67 source "board/isee/igep003x/Kconfig"
68 source "board/olimex/mx23_olinuxino/Kconfig"
69 @@ -1279,7 +1286,7 @@ source "arch/arm/Kconfig.debug"
70 endmenu
71
72 config SPL_LDSCRIPT
73 - default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if TARGET_APX4DEVKIT || TARGET_BG0900 || TARGET_M28EVK || TARGET_MX23_OLINUXINO || TARGET_MX23EVK || TARGET_MX28EVK || TARGET_SANSA_FUZE_PLUS || TARGET_SC_SPS_1 || TARGET_TS4600 || TARGET_XFI3
74 + default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if TARGET_APX4DEVKIT || TARGET_BG0900 || TARGET_M28EVK || TARGET_MX23_OLINUXINO || TARGET_MX23EVK || TARGET_MX28EVK || TARGET_DUCKBILL || TARGET_SANSA_FUZE_PLUS || TARGET_SC_SPS_1 || TARGET_TS4600 || TARGET_XFI3
75 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
76 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
77
78 --- /dev/null
79 +++ b/board/i2se/duckbill/Kconfig
80 @@ -0,0 +1,15 @@
81 +if TARGET_DUCKBILL
82 +
83 +config SYS_BOARD
84 + default "duckbill"
85 +
86 +config SYS_VENDOR
87 + default "i2se"
88 +
89 +config SYS_SOC
90 + default "mxs"
91 +
92 +config SYS_CONFIG_NAME
93 + default "duckbill"
94 +
95 +endif
96 --- /dev/null
97 +++ b/board/i2se/duckbill/MAINTAINERS
98 @@ -0,0 +1,6 @@
99 +I2SE DUCKBILL BOARD
100 +M: Michael Heimpold <mhei@heimpold.de>
101 +S: Maintained
102 +F: board/i2se/duckbill/
103 +F: include/configs/duckbill.h
104 +F: configs/duckbill_defconfig
105 --- /dev/null
106 +++ b/board/i2se/duckbill/Makefile
107 @@ -0,0 +1,12 @@
108 +#
109 +# (C) Copyright 2014-2017
110 +# Michael Heimpold, mhei@heimpold.de.
111 +#
112 +# SPDX-License-Identifier: GPL-2.0+
113 +#
114 +
115 +ifndef CONFIG_SPL_BUILD
116 +obj-y := duckbill.o
117 +else
118 +obj-y := iomux.o
119 +endif
120 --- /dev/null
121 +++ b/board/i2se/duckbill/duckbill.c
122 @@ -0,0 +1,181 @@
123 +/*
124 + * I2SE Duckbill board
125 + *
126 + * (C) Copyright 2014-2017 Michael Heimpold <mhei@heimpold.de>
127 + *
128 + * SPDX-License-Identifier: GPL-2.0+
129 + */
130 +
131 +#include <common.h>
132 +#include <asm/gpio.h>
133 +#include <asm/io.h>
134 +#include <asm/arch/imx-regs.h>
135 +#include <asm/arch/iomux-mx28.h>
136 +#include <asm/arch/clock.h>
137 +#include <asm/arch/sys_proto.h>
138 +#include <asm/setup.h>
139 +#include <fdt_support.h>
140 +#include <linux/mii.h>
141 +#include <miiphy.h>
142 +#include <netdev.h>
143 +#include <errno.h>
144 +#include <fuse.h>
145 +
146 +DECLARE_GLOBAL_DATA_PTR;
147 +
148 +static u32 system_rev;
149 +static u32 serialno;
150 +
151 +/*
152 + * Functions
153 + */
154 +int board_early_init_f(void)
155 +{
156 + /* IO0 clock at 480MHz */
157 + mxs_set_ioclk(MXC_IOCLK0, 480000);
158 + /* IO1 clock at 480MHz */
159 + mxs_set_ioclk(MXC_IOCLK1, 480000);
160 +
161 + /* SSP0 clock at 96MHz */
162 + mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
163 +
164 + return 0;
165 +}
166 +
167 +int dram_init(void)
168 +{
169 + return mxs_dram_init();
170 +}
171 +
172 +int board_init(void)
173 +{
174 + /* Adress of boot parameters */
175 + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
176 +
177 + return 0;
178 +}
179 +
180 +#ifdef CONFIG_CMD_MMC
181 +int board_mmc_init(bd_t *bis)
182 +{
183 + return mxsmmc_initialize(bis, 0, NULL, NULL);
184 +}
185 +#endif
186 +
187 +#ifdef CONFIG_CMD_NET
188 +int board_eth_init(bd_t *bis)
189 +{
190 + unsigned int reset_gpio;
191 + int ret;
192 +
193 + ret = cpu_eth_init(bis);
194 +
195 + if (system_rev == 1)
196 + reset_gpio = MX28_PAD_SSP0_DATA7__GPIO_2_7;
197 + else
198 + reset_gpio = MX28_PAD_GPMI_ALE__GPIO_0_26;
199 +
200 + /* Reset PHY */
201 + gpio_direction_output(reset_gpio, 0);
202 + udelay(200);
203 + gpio_set_value(reset_gpio, 1);
204 +
205 + /* give PHY some time to get out of the reset */
206 + udelay(10000);
207 +
208 + ret = fecmxc_initialize(bis);
209 + if (ret) {
210 + puts("FEC MXS: Unable to init FEC\n");
211 + return ret;
212 + }
213 +
214 + return ret;
215 +}
216 +
217 +void mx28_adjust_mac(int dev_id, unsigned char *mac)
218 +{
219 + mac[0] = 0x00;
220 + mac[1] = 0x01;
221 + mac[2] = 0x87;
222 +}
223 +#endif
224 +
225 +#ifdef CONFIG_OF_BOARD_SETUP
226 +int ft_board_setup(void *blob, bd_t *bd)
227 +{
228 + uint8_t enetaddr[6];
229 + u32 mac = 0;
230 +
231 + enetaddr[0] = 0x00;
232 + enetaddr[1] = 0x01;
233 + enetaddr[2] = 0x87;
234 +
235 +#ifdef CONFIG_MXS_OCOTP
236 + /* only Duckbill SPI has a MAC for the QCA7k */
237 + fuse_read(0, 1, &mac);
238 +#endif
239 +
240 + if (mac != 0) {
241 + enetaddr[3] = (mac >> 16) & 0xff;
242 + enetaddr[4] = (mac >> 8) & 0xff;
243 + enetaddr[5] = mac & 0xff;
244 +
245 + fdt_find_and_setprop(blob,
246 + "/apb@80000000/apbh@80000000/ssp@80014000/ethernet@0",
247 + "local-mac-address", enetaddr, 6, 1);
248 + }
249 +
250 + return 0;
251 +}
252 +#endif
253 +
254 +#ifdef CONFIG_REVISION_TAG
255 +u32 get_board_rev(void)
256 +{
257 + return system_rev;
258 +}
259 +#endif
260 +
261 +#ifdef CONFIG_SERIAL_TAG
262 +void get_board_serial(struct tag_serialnr *serialnr)
263 +{
264 + serialnr->low = serialno;
265 + serialnr->high = 0;
266 +}
267 +#endif
268 +
269 +int misc_init_r(void)
270 +{
271 + unsigned int led_red_gpio;
272 + char *s;
273 +
274 + /* Board revision detection */
275 + gpio_direction_input(MX28_PAD_LCD_D17__GPIO_1_17);
276 +
277 + /* MX28_PAD_LCD_D17__GPIO_1_17: v1 = pull-down, v2 = pull-up */
278 + system_rev =
279 + gpio_get_value(MX28_PAD_LCD_D17__GPIO_1_17);
280 + system_rev += 1;
281 +
282 + /* enable red LED to indicate a running bootloader */
283 + if (system_rev == 1)
284 + led_red_gpio = MX28_PAD_AUART1_RX__GPIO_3_4;
285 + else
286 + led_red_gpio = MX28_PAD_SAIF0_LRCLK__GPIO_3_21;
287 + gpio_direction_output(led_red_gpio, 1);
288 +
289 + if (system_rev == 1)
290 + puts("Board: I2SE Duckbill\n");
291 + else
292 + puts("Board: I2SE Duckbill 2\n");
293 +
294 + serialno = env_get_ulong("serial#", 10, 0);
295 + s = env_get("serial#");
296 + if (s && s[0]) {
297 + puts("Serial: ");
298 + puts(s);
299 + putc('\n');
300 + }
301 +
302 + return 0;
303 +}
304 --- /dev/null
305 +++ b/board/i2se/duckbill/iomux.c
306 @@ -0,0 +1,157 @@
307 +/*
308 + * I2SE Duckbill IOMUX setup
309 + *
310 + * Copyright (C) 2013-2017 Michael Heimpold <mhei@heimpold.de>
311 + *
312 + * SPDX-License-Identifier: GPL-2.0+
313 + */
314 +
315 +#include <common.h>
316 +#include <config.h>
317 +#include <asm/io.h>
318 +#include <asm/gpio.h>
319 +#include <asm/arch/iomux-mx28.h>
320 +#include <asm/arch/imx-regs.h>
321 +#include <asm/arch/sys_proto.h>
322 +
323 +#define MUX_CONFIG_SSP0 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
324 +#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
325 +#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
326 +
327 +/* For all revisions */
328 +const iomux_cfg_t iomux_setup[] = {
329 + /* DUART */
330 + MX28_PAD_PWM0__DUART_RX,
331 + MX28_PAD_PWM1__DUART_TX,
332 +
333 + /* eMMC (v2) or SD card (v1) */
334 + MX28_PAD_SSP0_DATA0__SSP0_D0 | MUX_CONFIG_SSP0,
335 + MX28_PAD_SSP0_DATA1__SSP0_D1 | MUX_CONFIG_SSP0,
336 + MX28_PAD_SSP0_DATA2__SSP0_D2 | MUX_CONFIG_SSP0,
337 + MX28_PAD_SSP0_DATA3__SSP0_D3 | MUX_CONFIG_SSP0,
338 + MX28_PAD_SSP0_CMD__SSP0_CMD | MUX_CONFIG_SSP0,
339 + MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
340 + (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
341 + MX28_PAD_SSP0_SCK__SSP0_SCK |
342 + (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
343 +
344 + /* Ethernet */
345 + MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET,
346 + MX28_PAD_ENET0_MDIO__ENET0_MDIO | MUX_CONFIG_ENET,
347 + MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MUX_CONFIG_ENET,
348 + MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MUX_CONFIG_ENET,
349 + MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MUX_CONFIG_ENET,
350 + MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MUX_CONFIG_ENET,
351 + MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MUX_CONFIG_ENET,
352 + MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET,
353 + MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET,
354 +
355 + /* EMI */
356 + MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI,
357 + MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI,
358 + MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI,
359 + MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI,
360 + MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI,
361 + MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI,
362 + MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI,
363 + MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI,
364 + MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI,
365 + MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI,
366 + MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI,
367 + MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI,
368 + MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI,
369 + MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI,
370 + MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI,
371 + MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI,
372 + MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI,
373 + MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
374 + MX28_PAD_EMI_ODT1__EMI_ODT1 | MUX_CONFIG_EMI,
375 + MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
376 + MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI,
377 + MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
378 + MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
379 + MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
380 + MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI,
381 +
382 + MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI,
383 + MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI,
384 + MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI,
385 + MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI,
386 + MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI,
387 + MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI,
388 + MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI,
389 + MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI,
390 + MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI,
391 + MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI,
392 + MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI,
393 + MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI,
394 + MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI,
395 + MX28_PAD_EMI_A13__EMI_ADDR13 | MUX_CONFIG_EMI,
396 + MX28_PAD_EMI_A14__EMI_ADDR14 | MUX_CONFIG_EMI,
397 + MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
398 + MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
399 + MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI,
400 + MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
401 + MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
402 + MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
403 + MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
404 + MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
405 + MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
406 +
407 + /* Revision pin(s) */
408 + MX28_PAD_LCD_D17__GPIO_1_17,
409 +};
410 +
411 +/* For revision 1 only */
412 +const iomux_cfg_t iomux_setup_v1[] = {
413 + /* PHY reset */
414 + MX28_PAD_SSP0_DATA7__GPIO_2_7 |
415 + (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
416 +
417 + /* LEDs */
418 + MX28_PAD_AUART1_RX__GPIO_3_4,
419 + MX28_PAD_AUART1_TX__GPIO_3_5,
420 +};
421 +
422 +/* For revision 2 only */
423 +const iomux_cfg_t iomux_setup_v2[] = {
424 + /* eMMC (v2) */
425 + MX28_PAD_SSP0_DATA4__SSP0_D4 | MUX_CONFIG_SSP0,
426 + MX28_PAD_SSP0_DATA5__SSP0_D5 | MUX_CONFIG_SSP0,
427 + MX28_PAD_SSP0_DATA6__SSP0_D6 | MUX_CONFIG_SSP0,
428 + MX28_PAD_SSP0_DATA7__SSP0_D7 | MUX_CONFIG_SSP0,
429 +
430 + /* PHY reset */
431 + MX28_PAD_GPMI_ALE__GPIO_0_26 |
432 + (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
433 +
434 + /* LEDs */
435 + MX28_PAD_SAIF0_LRCLK__GPIO_3_21,
436 + MX28_PAD_SAIF0_MCLK__GPIO_3_20,
437 +};
438 +
439 +#define HW_DRAM_CTL29 (0x74 >> 2)
440 +#define CS_MAP 0xf
441 +#define COLUMN_SIZE 0x2
442 +#define ADDR_PINS 0x1
443 +#define APREBIT 0xa
444 +
445 +#define HW_DRAM_CTL29_CONFIG (CS_MAP << 24 | COLUMN_SIZE << 16 | \
446 + ADDR_PINS << 8 | APREBIT)
447 +
448 +void mxs_adjust_memory_params(uint32_t *dram_vals)
449 +{
450 + dram_vals[HW_DRAM_CTL29] = HW_DRAM_CTL29_CONFIG;
451 +}
452 +
453 +void board_init_ll(const uint32_t arg, const uint32_t *resptr)
454 +{
455 + mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup));
456 +
457 + gpio_direction_input(MX28_PAD_LCD_D17__GPIO_1_17);
458 +
459 + if (gpio_get_value(MX28_PAD_LCD_D17__GPIO_1_17))
460 + mxs_iomux_setup_multiple_pads(iomux_setup_v2, ARRAY_SIZE(iomux_setup_v2));
461 + else
462 + mxs_iomux_setup_multiple_pads(iomux_setup_v1, ARRAY_SIZE(iomux_setup_v1));
463 +}
464 --- /dev/null
465 +++ b/configs/duckbill_defconfig
466 @@ -0,0 +1,31 @@
467 +CONFIG_ARM=y
468 +CONFIG_TARGET_DUCKBILL=y
469 +CONFIG_SPL_GPIO_SUPPORT=y
470 +CONFIG_SPL_LIBCOMMON_SUPPORT=y
471 +CONFIG_SPL_LIBGENERIC_SUPPORT=y
472 +CONFIG_SPL_SERIAL_SUPPORT=y
473 +CONFIG_BOOTDELAY=1
474 +# CONFIG_CONSOLE_MUX is not set
475 +CONFIG_SYS_CONSOLE_IS_IN_ENV=y
476 +CONFIG_VERSION_VARIABLE=y
477 +# CONFIG_DISPLAY_BOARDINFO is not set
478 +# CONFIG_EFI_LOADER is not set
479 +CONFIG_ARCH_MISC_INIT=y
480 +CONFIG_SPL=y
481 +CONFIG_HUSH_PARSER=y
482 +CONFIG_CMD_BOOTZ=y
483 +# CONFIG_CMD_IMLS is not set
484 +# CONFIG_CMD_FLASH is not set
485 +CONFIG_CMD_MMC=y
486 +CONFIG_CMD_GPIO=y
487 +CONFIG_CMD_DHCP=y
488 +CONFIG_CMD_MII=y
489 +CONFIG_CMD_PING=y
490 +CONFIG_CMD_CACHE=y
491 +CONFIG_CMD_EXT4=y
492 +CONFIG_CMD_EXT4_WRITE=y
493 +CONFIG_CMD_FAT=y
494 +CONFIG_CMD_FS_GENERIC=y
495 +CONFIG_ENV_IS_IN_MMC=y
496 +CONFIG_MMC_MXS=y
497 +CONFIG_OF_LIBFDT=y
498 --- /dev/null
499 +++ b/include/configs/duckbill.h
500 @@ -0,0 +1,199 @@
501 +/*
502 + * Copyright (C) 2014-2015 Michael Heimpold <mhei@heimpold.de>
503 + *
504 + * SPDX-License-Identifier: GPL-2.0+
505 + */
506 +#ifndef __CONFIGS_DUCKBILL_H__
507 +#define __CONFIGS_DUCKBILL_H__
508 +
509 +/* System configurations */
510 +#define CONFIG_MX28 /* i.MX28 SoC */
511 +#define CONFIG_MACH_TYPE MACH_TYPE_DUCKBILL
512 +
513 +#define CONFIG_MISC_INIT_R
514 +
515 +#define CONFIG_SYS_MXS_VDD5V_ONLY
516 +
517 +/* U-Boot Commands */
518 +#define CONFIG_CMD_FUSE
519 +#define CONFIG_CMD_UNZIP
520 +
521 +/* Memory configuration */
522 +#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
523 +#define PHYS_SDRAM_1 0x40000000 /* Base address */
524 +#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */
525 +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
526 +
527 +/* Environment is in MMC */
528 +#define CONFIG_ENV_OVERWRITE
529 +#define CONFIG_ENV_SIZE (128 * 1024)
530 +#define CONFIG_ENV_OFFSET (128 * 1024)
531 +#define CONFIG_ENV_OFFSET_REDUND (256 * 1024)
532 +#define CONFIG_SYS_MMC_ENV_DEV 0
533 +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
534 +
535 +/* FEC Ethernet on SoC */
536 +#ifdef CONFIG_CMD_NET
537 +#define CONFIG_FEC_MXC
538 +#define CONFIG_NET_MULTI
539 +#define CONFIG_MX28_FEC_MAC_IN_OCOTP
540 +#define CONFIG_FEC_MXC_PHYADDR 1
541 +#define IMX_FEC_BASE MXS_ENET0_BASE
542 +#endif
543 +
544 +#define CONFIG_IPADDR 192.168.1.10
545 +#define CONFIG_SERVERIP 192.168.1.1
546 +#define CONFIG_NETMASK 255.255.255.0
547 +#define CONFIG_GATEWAYIP 192.168.1.254
548 +
549 +/* BOOTP options */
550 +#define CONFIG_BOOTP_SUBNETMASK
551 +#define CONFIG_BOOTP_GATEWAY
552 +#define CONFIG_BOOTP_HOSTNAME
553 +
554 +/* SPI */
555 +#ifdef CONFIG_CMD_SPI
556 +#define CONFIG_DEFAULT_SPI_BUS 2
557 +#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
558 +#endif
559 +
560 +/* Boot Linux */
561 +#define CONFIG_BOOTDELAY 1
562 +#define CONFIG_BOOTFILE "zImage"
563 +#define CONFIG_LOADADDR 0x42000000
564 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
565 +#define CONFIG_REVISION_TAG
566 +#define CONFIG_SERIAL_TAG
567 +#define CONFIG_OF_BOARD_SETUP
568 +#define CONFIG_BOOT_RETRY_TIME 120 /* retry autoboot after 120 seconds */
569 +#define CONFIG_AUTOBOOT_KEYED
570 +#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \
571 + "press <c> to stop\n"
572 +#define CONFIG_AUTOBOOT_DELAY_STR "\x63" /* allows retry after retry time */
573 +#define CONFIG_AUTOBOOT_STOP_STR " " /* stop autoboot with <Space> */
574 +#define CONFIG_RESET_TO_RETRY /* reset board to retry booting */
575 +
576 +/* Extra Environment */
577 +#define CONFIG_EXTRA_ENV_SETTINGS \
578 + "mmc_part2_offset=1000\0" \
579 + "mmc_part3_offset=19000\0" \
580 + "update_openwrt_firmware_filename=openwrt-mxs-root.ext4\0" \
581 + "update_openwrt_firmware=" \
582 + "if mmc rescan; then " \
583 + "if tftp ${update_openwrt_firmware_filename}; then " \
584 + "setexpr fw_sz ${filesize} + 1ff; " \
585 + "setexpr fw_sz ${fw_sz} / 200; " \
586 + "mmc write ${loadaddr} ${mmc_part2_offset} ${fw_sz}; " \
587 + "mmc write ${loadaddr} ${mmc_part3_offset} ${fw_sz}; " \
588 + "fi; " \
589 + "fi\0" \
590 + "update_fw_filename_prefix=emmc.img.\0" \
591 + "update_fw_filename_suffix=.gz\0" \
592 + "update_fw_parts=0x6\0" \
593 + "update_fw_fsize_uncompressed=4000000\0" \
594 + "gzwrite_wbuf=100000\0" \
595 + "update_emmc_firmware=" \
596 + "setexpr i ${update_fw_parts}; setexpr error 0; " \
597 + "while itest ${i} -gt 0; do " \
598 + "echo Transfering firmware image part ${i} of ${update_fw_parts}; " \
599 + "if itest ${i} -le 9; then " \
600 + "setenv j 0${i}; " \
601 + "else " \
602 + "setenv j ${i}; " \
603 + "fi; " \
604 + "if tftp ${loadaddr} ${update_fw_basedir}${update_fw_filename_prefix}${j}${update_fw_filename_suffix}; then " \
605 + "setexpr k ${i} - 1; " \
606 + "setexpr offset ${update_fw_fsize_uncompressed} * ${k}; " \
607 + "if gzwrite mmc ${mmcdev} ${loadaddr} ${filesize} ${gzwrite_wbuf} ${offset}; then " \
608 + "setexpr i ${i} - 1; " \
609 + "else " \
610 + "setexpr i 0; " \
611 + "setexpr error 1; " \
612 + "fi; " \
613 + "else " \
614 + "setexpr i 0; " \
615 + "setexpr error 1; " \
616 + "fi; " \
617 + "done; setenv i; setenv j; setenv k; setenv fsize; setenv filesize; setenv offset; " \
618 + "if test ${error} -eq 1; then " \
619 + "echo Firmware Update FAILED; " \
620 + "else " \
621 + "echo Firmware Update OK; " \
622 + "fi; setenv error\0" \
623 + "erase_mmc=mmc erase 0 2\0" \
624 + "erase_env1=mmc erase 100 100\0" \
625 + "erase_env2=mmc erase 200 100\0" \
626 + "image=zImage\0" \
627 + "console=ttyAMA0\0" \
628 + "fdt_file=imx28-duckbill-2.dtb\0" \
629 + "fdt_addr=0x41000000\0" \
630 + "boot_fdt=try\0" \
631 + "ip_dyn=yes\0" \
632 + "bootsys=1\0" \
633 + "mmcdev=0\0" \
634 + "mmcpart=2\0" \
635 + "mmcroot=/dev/mmcblk0p2\0" \
636 + "mmcargs=setenv bootargs console=${console},${baudrate} " \
637 + "root=${mmcroot} " \
638 + "rootwait bootsys=${bootsys} panic=1\0" \
639 + "loadimage=ext4load mmc ${mmcdev}:${mmcpart} ${loadaddr} /boot/${image}\0" \
640 + "loadfdt=ext4load mmc ${mmcdev}:${mmcpart} ${fdt_addr} /boot/${fdt_file}\0" \
641 + "mmcboot=echo Booting from mmc ...; " \
642 + "setexpr mmcpart 1 + ${bootsys}; " \
643 + "setenv mmcroot /dev/mmcblk0p${mmcpart}; " \
644 + "run mmcargs; " \
645 + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
646 + "if run loadfdt; then " \
647 + "bootz ${loadaddr} - ${fdt_addr}; " \
648 + "else " \
649 + "if test ${boot_fdt} = try; then " \
650 + "bootz; " \
651 + "else " \
652 + "echo WARN: Cannot load the DT; " \
653 + "fi; " \
654 + "fi; " \
655 + "else " \
656 + "bootz; " \
657 + "fi\0" \
658 + "nfsroot=/\0" \
659 + "netargs=setenv bootargs console=${console},${baudrate} " \
660 + "root=/dev/nfs " \
661 + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
662 + "netboot=echo Booting from net ...; " \
663 + "run netargs; " \
664 + "if test ${ip_dyn} = yes; then " \
665 + "setenv get_cmd dhcp; " \
666 + "else " \
667 + "setenv get_cmd tftp; " \
668 + "fi; " \
669 + "${get_cmd} ${image}; " \
670 + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
671 + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
672 + "bootz ${loadaddr} - ${fdt_addr}; " \
673 + "else " \
674 + "if test ${boot_fdt} = try; then " \
675 + "bootz; " \
676 + "else " \
677 + "echo WARN: Cannot load the DT; " \
678 + "fi;" \
679 + "fi; " \
680 + "else " \
681 + "bootz; " \
682 + "fi\0"
683 +
684 +#define CONFIG_BOOTCOMMAND \
685 + "mmc dev ${mmcdev}; " \
686 + "if mmc rescan; then " \
687 + "if run loadimage; then " \
688 + "run mmcboot; " \
689 + "else " \
690 + "run netboot; " \
691 + "fi; " \
692 + "else " \
693 + "run netboot; " \
694 + "fi"
695 +
696 +/* The rest of the configuration is shared */
697 +#include <configs/mxs.h>
698 +
699 +#endif /* __CONFIGS_DUCKBILL_H__ */
OpenWrt Source Repository