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[openwrt/openwrt.git] / package / boot / uboot-rockchip / patches / 100-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch
1 From 64d37d74519eb5d4dcff8e9164d18f524aa72c8d Mon Sep 17 00:00:00 2001
2 From: David Bauer <mail@david-bauer.net>
3 Date: Fri, 10 Jul 2020 14:58:30 +0200
4 Subject: [PATCH] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
5
6 This adds support for the NanoPi R2S from FriendlyArm.
7
8 Rockchip RK3328 SoC
9 1GB DDR4 RAM
10 Gigabit Ethernet (WAN)
11 Gigabit Ethernet (USB3) (LAN)
12 USB 2.0 Host Port
13 MicroSD slot
14 Reset button
15 WAN - LAN - SYS LED
16
17 Signed-off-by: David Bauer <mail@david-bauer.net>
18 ---
19 arch/arm/dts/Makefile | 1 +
20 arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 40 +++
21 arch/arm/dts/rk3328-nanopi-r2s.dts | 387 +++++++++++++++++++++
22 board/rockchip/evb_rk3328/MAINTAINERS | 7 +
23 configs/nanopi-r2s-rk3328_defconfig | 99 ++++++
24 5 files changed, 534 insertions(+)
25 create mode 100644 arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
26 create mode 100644 arch/arm/dts/rk3328-nanopi-r2s.dts
27 create mode 100644 configs/nanopi-r2s-rk3328_defconfig
28
29 --- a/arch/arm/dts/Makefile
30 +++ b/arch/arm/dts/Makefile
31 @@ -106,6 +106,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
32
33 dtb-$(CONFIG_ROCKCHIP_RK3328) += \
34 rk3328-evb.dtb \
35 + rk3328-nanopi-r2s.dtb \
36 rk3328-roc-cc.dtb \
37 rk3328-rock64.dtb \
38 rk3328-rock-pi-e.dtb
39 --- /dev/null
40 +++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
41 @@ -0,0 +1,40 @@
42 +// SPDX-License-Identifier: GPL-2.0+
43 +/*
44 + * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
45 + * (C) Copyright 2020 David Bauer
46 + */
47 +
48 +#include "rk3328-u-boot.dtsi"
49 +#include "rk3328-sdram-ddr4-666.dtsi"
50 +/ {
51 + chosen {
52 + u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
53 + };
54 +};
55 +
56 +&gpio0 {
57 + u-boot,dm-spl;
58 +};
59 +
60 +&pinctrl {
61 + u-boot,dm-spl;
62 +};
63 +
64 +&sdmmc0m1_gpio {
65 + u-boot,dm-spl;
66 +};
67 +
68 +&pcfg_pull_up_4ma {
69 + u-boot,dm-spl;
70 +};
71 +
72 +/* Need this and all the pinctrl/gpio stuff above to set pinmux */
73 +&vcc_sd {
74 + u-boot,dm-spl;
75 +};
76 +
77 +&gmac2io {
78 + snps,reset-active-low;
79 + snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
80 + snps,reset-delays-us = <0 10000 50000>;
81 +};
82 --- /dev/null
83 +++ b/arch/arm/dts/rk3328-nanopi-r2s.dts
84 @@ -0,0 +1,387 @@
85 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
86 +/*
87 + * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
88 + */
89 +
90 +/dts-v1/;
91 +
92 +#include <dt-bindings/input/input.h>
93 +#include <dt-bindings/gpio/gpio.h>
94 +#include "rk3328.dtsi"
95 +
96 +/ {
97 + model = "FriendlyElec NanoPi R2S";
98 + compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
99 +
100 + chosen {
101 + stdout-path = "serial2:1500000n8";
102 + };
103 +
104 + gmac_clk: gmac-clock {
105 + compatible = "fixed-clock";
106 + clock-frequency = <125000000>;
107 + clock-output-names = "gmac_clk";
108 + #clock-cells = <0>;
109 + };
110 +
111 + keys {
112 + compatible = "gpio-keys";
113 + pinctrl-0 = <&reset_button_pin>;
114 + pinctrl-names = "default";
115 +
116 + reset {
117 + label = "reset";
118 + gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
119 + linux,code = <KEY_RESTART>;
120 + debounce-interval = <50>;
121 + };
122 + };
123 +
124 + vcc_rtl8153: vcc-rtl8153-regulator {
125 + compatible = "regulator-fixed";
126 + gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
127 + pinctrl-names = "default";
128 + pinctrl-0 = <&rtl8153_en_drv>;
129 + regulator-always-on;
130 + regulator-name = "vcc_rtl8153";
131 + regulator-min-microvolt = <5000000>;
132 + regulator-max-microvolt = <5000000>;
133 + enable-active-high;
134 + };
135 +
136 + leds {
137 + compatible = "gpio-leds";
138 + pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
139 + pinctrl-names = "default";
140 +
141 + lan_led: led-0 {
142 + gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
143 + label = "nanopi-r2s:green:lan";
144 + };
145 +
146 + sys_led: led-1 {
147 + gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
148 + label = "nanopi-r2s:red:sys";
149 + };
150 +
151 + wan_led: led-2 {
152 + gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
153 + label = "nanopi-r2s:green:wan";
154 + };
155 + };
156 +
157 + vcc_io_sdio: sdmmcio-regulator {
158 + compatible = "regulator-gpio";
159 + enable-active-high;
160 + gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
161 + pinctrl-0 = <&sdio_vcc_pin>;
162 + pinctrl-names = "default";
163 + regulator-name = "vcc_io_sdio";
164 + regulator-always-on;
165 + regulator-min-microvolt = <1800000>;
166 + regulator-max-microvolt = <3300000>;
167 + regulator-settling-time-us = <5000>;
168 + regulator-type = "voltage";
169 + startup-delay-us = <2000>;
170 + states = <1800000 0x1
171 + 3300000 0x0>;
172 + vin-supply = <&vcc_io_33>;
173 + };
174 +
175 + vcc_sd: sdmmc-regulator {
176 + compatible = "regulator-fixed";
177 + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
178 + pinctrl-0 = <&sdmmc0m1_gpio>;
179 + pinctrl-names = "default";
180 + regulator-name = "vcc_sd";
181 + regulator-boot-on;
182 + regulator-min-microvolt = <3300000>;
183 + regulator-max-microvolt = <3300000>;
184 + vin-supply = <&vcc_io_33>;
185 + };
186 +
187 + vdd_5v: vdd-5v {
188 + compatible = "regulator-fixed";
189 + regulator-name = "vdd_5v";
190 + regulator-always-on;
191 + regulator-boot-on;
192 + regulator-min-microvolt = <5000000>;
193 + regulator-max-microvolt = <5000000>;
194 + };
195 +};
196 +
197 +&cpu0 {
198 + cpu-supply = <&vdd_arm>;
199 +};
200 +
201 +&cpu1 {
202 + cpu-supply = <&vdd_arm>;
203 +};
204 +
205 +&cpu2 {
206 + cpu-supply = <&vdd_arm>;
207 +};
208 +
209 +&cpu3 {
210 + cpu-supply = <&vdd_arm>;
211 +};
212 +
213 +&gmac2io {
214 + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
215 + assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
216 + clock_in_out = "input";
217 + phy-handle = <&rtl8211e>;
218 + phy-mode = "rgmii";
219 + phy-supply = <&vcc_io_33>;
220 + pinctrl-0 = <&rgmiim1_pins>;
221 + pinctrl-names = "default";
222 + rx_delay = <0x18>;
223 + snps,aal;
224 + tx_delay = <0x24>;
225 + status = "okay";
226 +
227 + mdio {
228 + compatible = "snps,dwmac-mdio";
229 + #address-cells = <1>;
230 + #size-cells = <0>;
231 +
232 + rtl8211e: ethernet-phy@1 {
233 + reg = <1>;
234 + pinctrl-0 = <&eth_phy_reset_pin>;
235 + pinctrl-names = "default";
236 + reset-assert-us = <10000>;
237 + reset-deassert-us = <50000>;
238 + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
239 + };
240 + };
241 +};
242 +
243 +&i2c1 {
244 + status = "okay";
245 +
246 + rk805: pmic@18 {
247 + compatible = "rockchip,rk805";
248 + reg = <0x18>;
249 + interrupt-parent = <&gpio1>;
250 + interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
251 + #clock-cells = <1>;
252 + clock-output-names = "xin32k", "rk805-clkout2";
253 + gpio-controller;
254 + #gpio-cells = <2>;
255 + pinctrl-0 = <&pmic_int_l>;
256 + pinctrl-names = "default";
257 + rockchip,system-power-controller;
258 + wakeup-source;
259 +
260 + vcc1-supply = <&vdd_5v>;
261 + vcc2-supply = <&vdd_5v>;
262 + vcc3-supply = <&vdd_5v>;
263 + vcc4-supply = <&vdd_5v>;
264 + vcc5-supply = <&vcc_io_33>;
265 + vcc6-supply = <&vdd_5v>;
266 +
267 + regulators {
268 + vdd_log: DCDC_REG1 {
269 + regulator-name = "vdd_log";
270 + regulator-always-on;
271 + regulator-boot-on;
272 + regulator-min-microvolt = <712500>;
273 + regulator-max-microvolt = <1450000>;
274 + regulator-ramp-delay = <12500>;
275 +
276 + regulator-state-mem {
277 + regulator-on-in-suspend;
278 + regulator-suspend-microvolt = <1000000>;
279 + };
280 + };
281 +
282 + vdd_arm: DCDC_REG2 {
283 + regulator-name = "vdd_arm";
284 + regulator-always-on;
285 + regulator-boot-on;
286 + regulator-min-microvolt = <712500>;
287 + regulator-max-microvolt = <1450000>;
288 + regulator-ramp-delay = <12500>;
289 +
290 + regulator-state-mem {
291 + regulator-on-in-suspend;
292 + regulator-suspend-microvolt = <950000>;
293 + };
294 + };
295 +
296 + vcc_ddr: DCDC_REG3 {
297 + regulator-name = "vcc_ddr";
298 + regulator-always-on;
299 + regulator-boot-on;
300 +
301 + regulator-state-mem {
302 + regulator-on-in-suspend;
303 + };
304 + };
305 +
306 + vcc_io_33: DCDC_REG4 {
307 + regulator-name = "vcc_io_33";
308 + regulator-always-on;
309 + regulator-boot-on;
310 + regulator-min-microvolt = <3300000>;
311 + regulator-max-microvolt = <3300000>;
312 +
313 + regulator-state-mem {
314 + regulator-on-in-suspend;
315 + regulator-suspend-microvolt = <3300000>;
316 + };
317 + };
318 +
319 + vcc_18: LDO_REG1 {
320 + regulator-name = "vcc_18";
321 + regulator-always-on;
322 + regulator-boot-on;
323 + regulator-min-microvolt = <1800000>;
324 + regulator-max-microvolt = <1800000>;
325 +
326 + regulator-state-mem {
327 + regulator-on-in-suspend;
328 + regulator-suspend-microvolt = <1800000>;
329 + };
330 + };
331 +
332 + vcc18_emmc: LDO_REG2 {
333 + regulator-name = "vcc18_emmc";
334 + regulator-always-on;
335 + regulator-boot-on;
336 + regulator-min-microvolt = <1800000>;
337 + regulator-max-microvolt = <1800000>;
338 +
339 + regulator-state-mem {
340 + regulator-on-in-suspend;
341 + regulator-suspend-microvolt = <1800000>;
342 + };
343 + };
344 +
345 + vdd_10: LDO_REG3 {
346 + regulator-name = "vdd_10";
347 + regulator-always-on;
348 + regulator-boot-on;
349 + regulator-min-microvolt = <1000000>;
350 + regulator-max-microvolt = <1000000>;
351 +
352 + regulator-state-mem {
353 + regulator-on-in-suspend;
354 + regulator-suspend-microvolt = <1000000>;
355 + };
356 + };
357 + };
358 + };
359 +
360 + usb {
361 + rtl8153_en_drv: rtl8153-en-drv {
362 + rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
363 + };
364 + };
365 +};
366 +
367 +&io_domains {
368 + pmuio-supply = <&vcc_io_33>;
369 + vccio1-supply = <&vcc_io_33>;
370 + vccio2-supply = <&vcc18_emmc>;
371 + vccio3-supply = <&vcc_io_sdio>;
372 + vccio4-supply = <&vcc_18>;
373 + vccio5-supply = <&vcc_io_33>;
374 + vccio6-supply = <&vcc_io_33>;
375 + status = "okay";
376 +};
377 +
378 +&pinctrl {
379 + button {
380 + reset_button_pin: reset-button-pin {
381 + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
382 + };
383 + };
384 +
385 + ethernet-phy {
386 + eth_phy_reset_pin: eth-phy-reset-pin {
387 + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
388 + };
389 + };
390 +
391 + leds {
392 + lan_led_pin: lan-led-pin {
393 + rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
394 + };
395 +
396 + sys_led_pin: sys-led-pin {
397 + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
398 + };
399 +
400 + wan_led_pin: wan-led-pin {
401 + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
402 + };
403 + };
404 +
405 + pmic {
406 + pmic_int_l: pmic-int-l {
407 + rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
408 + };
409 + };
410 +
411 + sd {
412 + sdio_vcc_pin: sdio-vcc-pin {
413 + rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
414 + };
415 + };
416 +};
417 +
418 +&pwm2 {
419 + status = "okay";
420 +};
421 +
422 +&sdmmc {
423 + bus-width = <4>;
424 + cap-sd-highspeed;
425 + disable-wp;
426 + pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
427 + pinctrl-names = "default";
428 + sd-uhs-sdr12;
429 + sd-uhs-sdr25;
430 + sd-uhs-sdr50;
431 + sd-uhs-sdr104;
432 + vmmc-supply = <&vcc_sd>;
433 + vqmmc-supply = <&vcc_io_sdio>;
434 + status = "okay";
435 +};
436 +
437 +&tsadc {
438 + rockchip,hw-tshut-mode = <0>;
439 + rockchip,hw-tshut-polarity = <0>;
440 + status = "okay";
441 +};
442 +
443 +&u2phy {
444 + status = "okay";
445 +};
446 +
447 +&u2phy_host {
448 + status = "okay";
449 +};
450 +
451 +&u2phy_otg {
452 + status = "okay";
453 +};
454 +
455 +&uart2 {
456 + status = "okay";
457 +};
458 +
459 +&usb20_otg {
460 + status = "okay";
461 + dr_mode = "host";
462 +};
463 +
464 +&usb_host0_ehci {
465 + status = "okay";
466 +};
467 +
468 +&usb_host0_ohci {
469 + status = "okay";
470 +};
471 +
472 --- a/board/rockchip/evb_rk3328/MAINTAINERS
473 +++ b/board/rockchip/evb_rk3328/MAINTAINERS
474 @@ -5,6 +5,13 @@ F: board/rockchip/evb_rk3328
475 F: include/configs/evb_rk3328.h
476 F: configs/evb-rk3328_defconfig
477
478 +NANOPI-R2S-RK3328
479 +M: David Bauer <mail@david-bauer.net>
480 +S: Maintained
481 +F: configs/nanopi-r2s-rk3328_defconfig
482 +F: arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
483 +F: arch/arm/dts/rk3328-nanopi-r2s.dts
484 +
485 ROC-RK3328-CC
486 M: Loic Devulder <ldevulder@suse.com>
487 M: Chen-Yu Tsai <wens@csie.org>
488 --- /dev/null
489 +++ b/configs/nanopi-r2s-rk3328_defconfig
490 @@ -0,0 +1,99 @@
491 +CONFIG_ARM=y
492 +CONFIG_ARCH_ROCKCHIP=y
493 +CONFIG_SYS_TEXT_BASE=0x00200000
494 +CONFIG_SPL_GPIO_SUPPORT=y
495 +CONFIG_ENV_OFFSET=0x3F8000
496 +CONFIG_ROCKCHIP_RK3328=y
497 +CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
498 +CONFIG_TPL_LIBCOMMON_SUPPORT=y
499 +CONFIG_TPL_LIBGENERIC_SUPPORT=y
500 +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
501 +CONFIG_SPL_STACK_R_ADDR=0x600000
502 +CONFIG_NR_DRAM_BANKS=1
503 +CONFIG_DEBUG_UART_BASE=0xFF130000
504 +CONFIG_DEBUG_UART_CLOCK=24000000
505 +CONFIG_SMBIOS_PRODUCT_NAME="nanopi_r2s_rk3328"
506 +CONFIG_DEBUG_UART=y
507 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
508 +# CONFIG_ANDROID_BOOT_IMAGE is not set
509 +CONFIG_FIT=y
510 +CONFIG_FIT_VERBOSE=y
511 +CONFIG_SPL_LOAD_FIT=y
512 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2s.dtb"
513 +CONFIG_MISC_INIT_R=y
514 +# CONFIG_DISPLAY_CPUINFO is not set
515 +CONFIG_DISPLAY_BOARDINFO_LATE=y
516 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
517 +CONFIG_TPL_SYS_MALLOC_SIMPLE=y
518 +CONFIG_SPL_STACK_R=y
519 +CONFIG_SPL_I2C_SUPPORT=y
520 +CONFIG_SPL_POWER_SUPPORT=y
521 +CONFIG_SPL_ATF=y
522 +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
523 +CONFIG_CMD_BOOTZ=y
524 +CONFIG_CMD_GPT=y
525 +CONFIG_CMD_MMC=y
526 +CONFIG_CMD_USB=y
527 +# CONFIG_CMD_SETEXPR is not set
528 +CONFIG_CMD_TIME=y
529 +CONFIG_SPL_OF_CONTROL=y
530 +CONFIG_TPL_OF_CONTROL=y
531 +CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2s"
532 +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
533 +CONFIG_TPL_OF_PLATDATA=y
534 +CONFIG_ENV_IS_IN_MMC=y
535 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
536 +CONFIG_NET_RANDOM_ETHADDR=y
537 +CONFIG_TPL_DM=y
538 +CONFIG_REGMAP=y
539 +CONFIG_SPL_REGMAP=y
540 +CONFIG_TPL_REGMAP=y
541 +CONFIG_SYSCON=y
542 +CONFIG_SPL_SYSCON=y
543 +CONFIG_TPL_SYSCON=y
544 +CONFIG_CLK=y
545 +CONFIG_SPL_CLK=y
546 +CONFIG_FASTBOOT_BUF_ADDR=0x800800
547 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
548 +CONFIG_ROCKCHIP_GPIO=y
549 +CONFIG_SYS_I2C_ROCKCHIP=y
550 +CONFIG_MMC_DW=y
551 +CONFIG_MMC_DW_ROCKCHIP=y
552 +CONFIG_SF_DEFAULT_SPEED=20000000
553 +CONFIG_DM_ETH=y
554 +CONFIG_ETH_DESIGNWARE=y
555 +CONFIG_GMAC_ROCKCHIP=y
556 +CONFIG_PINCTRL=y
557 +CONFIG_SPL_PINCTRL=y
558 +CONFIG_DM_PMIC=y
559 +CONFIG_PMIC_RK8XX=y
560 +CONFIG_SPL_DM_REGULATOR=y
561 +CONFIG_REGULATOR_PWM=y
562 +CONFIG_DM_REGULATOR_FIXED=y
563 +CONFIG_SPL_DM_REGULATOR_FIXED=y
564 +CONFIG_REGULATOR_RK8XX=y
565 +CONFIG_PWM_ROCKCHIP=y
566 +CONFIG_RAM=y
567 +CONFIG_SPL_RAM=y
568 +CONFIG_TPL_RAM=y
569 +CONFIG_DM_RESET=y
570 +CONFIG_BAUDRATE=1500000
571 +CONFIG_DEBUG_UART_SHIFT=2
572 +CONFIG_SYSRESET=y
573 +# CONFIG_TPL_SYSRESET is not set
574 +CONFIG_USB=y
575 +CONFIG_USB_XHCI_HCD=y
576 +CONFIG_USB_XHCI_DWC3=y
577 +CONFIG_USB_EHCI_HCD=y
578 +CONFIG_USB_EHCI_GENERIC=y
579 +CONFIG_USB_OHCI_HCD=y
580 +CONFIG_USB_OHCI_GENERIC=y
581 +CONFIG_USB_DWC2=y
582 +CONFIG_USB_DWC3=y
583 +# CONFIG_USB_DWC3_GADGET is not set
584 +CONFIG_USB_GADGET=y
585 +CONFIG_USB_GADGET_DWC2_OTG=y
586 +CONFIG_SPL_TINY_MEMSET=y
587 +CONFIG_TPL_TINY_MEMSET=y
588 +CONFIG_ERRNO_STR=y
589 +CONFIG_SMBIOS_MANUFACTURER="pine64"
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