package/boot/uboot-rockchip/patches/100-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch

   1 From 67f4c228c2bf515386cd54073104dc2e6eae85ea Mon Sep 17 00:00:00 2001
   2 From: David Bauer <mail@david-bauer.net>
   3 Date: Fri, 10 Jul 2020 14:58:30 +0200
   4 Subject: [PATCH] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
   5
   6 This adds support for the NanoPi R2S from FriendlyArm.
   7
   8 Rockchip RK3328 SoC
   9 1GB DDR4 RAM
  10 Gigabit Ethernet (WAN)
  11 Gigabit Ethernet (USB3) (LAN)
  12 USB 2.0 Host Port
  13 MicroSD slot
  14 Reset button
  15 WAN - LAN - SYS LED
  16
  17 Signed-off-by: David Bauer <mail@david-bauer.net>
  18 ---
  19  arch/arm/dts/Makefile                      |   1 +
  20  arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi |  34 +++
  21  arch/arm/dts/rk3328-nanopi-r2s.dts         | 334 +++++++++++++++++++++
  22  board/rockchip/evb_rk3328/MAINTAINERS      |   7 +
  23  configs/nanopi-r2s-rk3328_defconfig        |  99 ++++++
  24  5 files changed, 475 insertions(+)
  25  create mode 100644 arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
  26  create mode 100644 arch/arm/dts/rk3328-nanopi-r2s.dts
  27  create mode 100644 configs/nanopi-r2s-rk3328_defconfig
  28
  29 --- a/arch/arm/dts/Makefile
  30 +++ b/arch/arm/dts/Makefile
  31 @@ -110,6 +110,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
  32
  33  dtb-$(CONFIG_ROCKCHIP_RK3328) += \
  34         rk3328-evb.dtb \
  35 +       rk3328-nanopi-r2s.dtb \
  36         rk3328-roc-cc.dtb \
  37         rk3328-rock64.dtb \
  38         rk3328-rock-pi-e.dtb
  39 --- /dev/null
  40 +++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
  41 @@ -0,0 +1,34 @@
  42 +// SPDX-License-Identifier: GPL-2.0+
  43 +/*
  44 + * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
  45 + * (C) Copyright 2020 David Bauer
  46 + */
  47 +
  48 +#include "rk3328-u-boot.dtsi"
  49 +#include "rk3328-sdram-ddr4-666.dtsi"
  50 +/ {
  51 +       chosen {
  52 +               u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
  53 +       };
  54 +};
  55 +
  56 +&gpio0 {
  57 +       u-boot,dm-spl;
  58 +};
  59 +
  60 +&pinctrl {
  61 +       u-boot,dm-spl;
  62 +};
  63 +
  64 +&sdmmc0m1_gpio {
  65 +       u-boot,dm-spl;
  66 +};
  67 +
  68 +&pcfg_pull_up_4ma {
  69 +       u-boot,dm-spl;
  70 +};
  71 +
  72 +/* Need this and all the pinctrl/gpio stuff above to set pinmux */
  73 +&vcc_sd {
  74 +       u-boot,dm-spl;
  75 +};
  76 --- /dev/null
  77 +++ b/arch/arm/dts/rk3328-nanopi-r2s.dts
  78 @@ -0,0 +1,334 @@
  79 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  80 +/*
  81 + * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
  82 + */
  83 +
  84 +/dts-v1/;
  85 +
  86 +#include <dt-bindings/input/input.h>
  87 +#include <dt-bindings/gpio/gpio.h>
  88 +#include "rk3328.dtsi"
  89 +
  90 +/ {
  91 +       model = "FriendlyARM NanoPi R2S";
  92 +       compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
  93 +
  94 +       chosen {
  95 +               stdout-path = "serial2:1500000n8";
  96 +       };
  97 +
  98 +       gmac_clkin: external-gmac-clock {
  99 +               compatible = "fixed-clock";
 100 +               clock-frequency = <125000000>;
 101 +               clock-output-names = "gmac_clkin";
 102 +               #clock-cells = <0>;
 103 +       };
 104 +
 105 +       vcc_sd: sdmmc-regulator {
 106 +               compatible = "regulator-fixed";
 107 +               gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
 108 +               pinctrl-names = "default";
 109 +               pinctrl-0 = <&sdmmc0m1_gpio>;
 110 +               regulator-name = "vcc_sd";
 111 +               regulator-min-microvolt = <3300000>;
 112 +               regulator-max-microvolt = <3300000>;
 113 +               vin-supply = <&vcc_io>;
 114 +       };
 115 +
 116 +       vcc_sdio: sdmmcio-regulator {
 117 +               compatible = "regulator-gpio";
 118 +               gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
 119 +               enable-active-high;
 120 +               states = <1800000 0x1
 121 +                         3300000 0x0>;
 122 +               pinctrl-names = "default";
 123 +               pinctrl-0 = <&sdio_vcc_pin>;
 124 +               regulator-always-on;
 125 +               regulator-min-microvolt = <1800000>;
 126 +               regulator-max-microvolt = <3300000>;
 127 +               regulator-name = "vcc_sdio";
 128 +               regulator-settling-time-us = <5000>;
 129 +               regulator-type = "voltage";
 130 +               vin-supply = <&vcc_io>;
 131 +       };
 132 +
 133 +       vcc_sys: vcc-sys {
 134 +               compatible = "regulator-fixed";
 135 +               regulator-name = "vcc_sys";
 136 +               regulator-always-on;
 137 +               regulator-boot-on;
 138 +               regulator-min-microvolt = <5000000>;
 139 +               regulator-max-microvolt = <5000000>;
 140 +       };
 141 +
 142 +       leds {
 143 +               compatible = "gpio-leds";
 144 +
 145 +               pinctrl-names = "default";
 146 +               pinctrl-0 = <&led_pins>;
 147 +
 148 +               sys {
 149 +                       gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
 150 +                       label = "nanopi-r2s:red:sys";
 151 +               };
 152 +
 153 +               lan {
 154 +                       gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
 155 +                       label = "nanopi-r2s:green:lan";
 156 +               };
 157 +
 158 +               wan {
 159 +                       gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
 160 +                       label = "nanopi-r2s:green:wan";
 161 +               };
 162 +       };
 163 +
 164 +       gpio_keys {
 165 +               compatible = "gpio-keys-polled";
 166 +               poll-interval = <100>;
 167 +
 168 +               pinctrl-names = "default";
 169 +               pinctrl-0 = <&button_pins>;
 170 +
 171 +               reset {
 172 +                       label = "Reset Button";
 173 +                       gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
 174 +                       linux,code = <KEY_RESTART>;
 175 +                       debounce-interval = <50>;
 176 +               };
 177 +       };
 178 +};
 179 +
 180 +&cpu0 {
 181 +       cpu-supply = <&vdd_arm>;
 182 +};
 183 +
 184 +&cpu1 {
 185 +       cpu-supply = <&vdd_arm>;
 186 +};
 187 +
 188 +&cpu2 {
 189 +       cpu-supply = <&vdd_arm>;
 190 +};
 191 +
 192 +&cpu3 {
 193 +       cpu-supply = <&vdd_arm>;
 194 +};
 195 +
 196 +&gmac2io {
 197 +       assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
 198 +       assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
 199 +       clock_in_out = "input";
 200 +       phy-supply = <&vcc_io>;
 201 +       phy-handle = <&rtl8211e>;
 202 +       phy-mode = "rgmii";
 203 +       pinctrl-names = "default";
 204 +       pinctrl-0 = <&rgmiim1_pins>;
 205 +       snps,aal;
 206 +       snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
 207 +       snps,reset-active-low;
 208 +       snps,reset-delays-us = <0 10000 50000>;
 209 +       tx_delay = <0x24>;
 210 +       rx_delay = <0x18>;
 211 +       status = "okay";
 212 +
 213 +       mdio {
 214 +               compatible = "snps,dwmac-mdio";
 215 +               #address-cells = <1>;
 216 +               #size-cells = <0>;
 217 +
 218 +               rtl8211e: ethernet-phy@0 {
 219 +                       reg = <0>;
 220 +               };
 221 +       };
 222 +};
 223 +
 224 +&i2c1 {
 225 +       status = "okay";
 226 +
 227 +       rk805: rk805@18 {
 228 +               compatible = "rockchip,rk805";
 229 +               reg = <0x18>;
 230 +               interrupt-parent = <&gpio2>;
 231 +               interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
 232 +               #clock-cells = <1>;
 233 +               clock-output-names = "xin32k", "rk805-clkout2";
 234 +               gpio-controller;
 235 +               #gpio-cells = <2>;
 236 +               pinctrl-names = "default";
 237 +               pinctrl-0 = <&pmic_int_l>;
 238 +               rockchip,system-power-controller;
 239 +               wakeup-source;
 240 +
 241 +               vcc1-supply = <&vcc_sys>;
 242 +               vcc2-supply = <&vcc_sys>;
 243 +               vcc3-supply = <&vcc_sys>;
 244 +               vcc4-supply = <&vcc_sys>;
 245 +               vcc5-supply = <&vcc_io>;
 246 +               vcc6-supply = <&vcc_sys>;
 247 +
 248 +               regulators {
 249 +                       vdd_logic: DCDC_REG1 {
 250 +                               regulator-name = "vdd_logic";
 251 +                               regulator-min-microvolt = <712500>;
 252 +                               regulator-max-microvolt = <1450000>;
 253 +                               regulator-ramp-delay = <12500>;
 254 +                               regulator-always-on;
 255 +                               regulator-boot-on;
 256 +                               regulator-state-mem {
 257 +                                       regulator-on-in-suspend;
 258 +                                       regulator-suspend-microvolt = <1000000>;
 259 +                               };
 260 +                       };
 261 +
 262 +                       vdd_arm: DCDC_REG2 {
 263 +                               regulator-name = "vdd_arm";
 264 +                               regulator-min-microvolt = <712500>;
 265 +                               regulator-max-microvolt = <1450000>;
 266 +                               regulator-ramp-delay = <12500>;
 267 +                               regulator-always-on;
 268 +                               regulator-boot-on;
 269 +                               regulator-state-mem {
 270 +                                       regulator-on-in-suspend;
 271 +                                       regulator-suspend-microvolt = <950000>;
 272 +                               };
 273 +                       };
 274 +
 275 +                       vcc_ddr: DCDC_REG3 {
 276 +                               regulator-name = "vcc_ddr";
 277 +                               regulator-always-on;
 278 +                               regulator-boot-on;
 279 +                               regulator-state-mem {
 280 +                                       regulator-on-in-suspend;
 281 +                               };
 282 +                       };
 283 +
 284 +                       vcc_io: DCDC_REG4 {
 285 +                               regulator-name = "vcc_io";
 286 +                               regulator-min-microvolt = <3300000>;
 287 +                               regulator-max-microvolt = <3300000>;
 288 +                               regulator-always-on;
 289 +                               regulator-boot-on;
 290 +                               regulator-state-mem {
 291 +                                       regulator-on-in-suspend;
 292 +                                       regulator-suspend-microvolt = <3300000>;
 293 +                               };
 294 +                       };
 295 +
 296 +                       vcc_18: LDO_REG1 {
 297 +                               regulator-name = "vcc_18";
 298 +                               regulator-min-microvolt = <1800000>;
 299 +                               regulator-max-microvolt = <1800000>;
 300 +                               regulator-always-on;
 301 +                               regulator-boot-on;
 302 +                               regulator-state-mem {
 303 +                                       regulator-on-in-suspend;
 304 +                                       regulator-suspend-microvolt = <1800000>;
 305 +                               };
 306 +                       };
 307 +
 308 +                       vcc18_emmc: LDO_REG2 {
 309 +                               regulator-name = "vcc18_emmc";
 310 +                               regulator-min-microvolt = <1800000>;
 311 +                               regulator-max-microvolt = <1800000>;
 312 +                               regulator-always-on;
 313 +                               regulator-boot-on;
 314 +                               regulator-state-mem {
 315 +                                       regulator-on-in-suspend;
 316 +                                       regulator-suspend-microvolt = <1800000>;
 317 +                               };
 318 +                       };
 319 +
 320 +                       vdd_10: LDO_REG3 {
 321 +                               regulator-name = "vdd_10";
 322 +                               regulator-min-microvolt = <1000000>;
 323 +                               regulator-max-microvolt = <1000000>;
 324 +                               regulator-always-on;
 325 +                               regulator-boot-on;
 326 +                               regulator-state-mem {
 327 +                                       regulator-on-in-suspend;
 328 +                                       regulator-suspend-microvolt = <1000000>;
 329 +                               };
 330 +                       };
 331 +               };
 332 +       };
 333 +};
 334 +
 335 +&io_domains {
 336 +       status = "okay";
 337 +
 338 +       vccio1-supply = <&vcc_io>;
 339 +       vccio2-supply = <&vcc18_emmc>;
 340 +       vccio3-supply = <&vcc_sdio>;
 341 +       vccio4-supply = <&vcc_18>;
 342 +       vccio5-supply = <&vcc_io>;
 343 +       vccio6-supply = <&vcc_io>;
 344 +       pmuio-supply = <&vcc_io>;
 345 +};
 346 +
 347 +&pinctrl {
 348 +       leds {
 349 +               led_pins: led-pins {
 350 +                       rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>,
 351 +                                                       <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
 352 +                                                       <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
 353 +               };
 354 +       };
 355 +
 356 +       button {
 357 +               button_pins: button-pins {
 358 +                       rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
 359 +               };
 360 +       };
 361 +
 362 +       pmic {
 363 +               pmic_int_l: pmic-int-l {
 364 +                       rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
 365 +               };
 366 +       };
 367 +
 368 +       sd {
 369 +               sdio_vcc_pin: sdio-vcc-pin {
 370 +                       rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
 371 +               };
 372 +       };
 373 +};
 374 +
 375 +&sdmmc {
 376 +       bus-width = <4>;
 377 +       cap-mmc-highspeed;
 378 +       cap-sd-highspeed;
 379 +       disable-wp;
 380 +       max-frequency = <150000000>;
 381 +       pinctrl-names = "default";
 382 +       pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
 383 +       vmmc-supply = <&vcc_sd>;
 384 +       vqmmc-supply = <&vcc_sdio>;
 385 +       status = "okay";
 386 +};
 387 +
 388 +&tsadc {
 389 +       rockchip,hw-tshut-mode = <0>;
 390 +       rockchip,hw-tshut-polarity = <0>;
 391 +       status = "okay";
 392 +};
 393 +
 394 +&uart2 {
 395 +       status = "okay";
 396 +};
 397 +
 398 +&u2phy {
 399 +       status = "okay";
 400 +
 401 +       u2phy_host: host-port {
 402 +               status = "okay";
 403 +       };
 404 +};
 405 +
 406 +&usb_host0_ehci {
 407 +       status = "okay";
 408 +};
 409 +
 410 +&usb_host0_ohci {
 411 +       status = "okay";
 412 +};
 413 --- a/board/rockchip/evb_rk3328/MAINTAINERS
 414 +++ b/board/rockchip/evb_rk3328/MAINTAINERS
 415 @@ -5,6 +5,13 @@ F:      board/rockchip/evb_rk3328
 416  F:      include/configs/evb_rk3328.h
 417  F:      configs/evb-rk3328_defconfig
 418
 419 +NANOPI-R2S-RK3328
 420 +M:      David Bauer <mail@david-bauer.net>
 421 +S:      Maintained
 422 +F:      configs/nanopi-r2s-rk3328_defconfig
 423 +F:      arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
 424 +F:      arch/arm/dts/rk3328-nanopi-r2s.dts
 425 +
 426  ROC-RK3328-CC
 427  M:      Loic Devulder <ldevulder@suse.com>
 428  M:      Chen-Yu Tsai <wens@csie.org>
 429 --- /dev/null
 430 +++ b/configs/nanopi-r2s-rk3328_defconfig
 431 @@ -0,0 +1,99 @@
 432 +CONFIG_ARM=y
 433 +CONFIG_ARCH_ROCKCHIP=y
 434 +CONFIG_SYS_TEXT_BASE=0x00200000
 435 +CONFIG_SPL_GPIO_SUPPORT=y
 436 +CONFIG_ENV_OFFSET=0x3F8000
 437 +CONFIG_ROCKCHIP_RK3328=y
 438 +CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
 439 +CONFIG_TPL_LIBCOMMON_SUPPORT=y
 440 +CONFIG_TPL_LIBGENERIC_SUPPORT=y
 441 +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 442 +CONFIG_SPL_STACK_R_ADDR=0x600000
 443 +CONFIG_NR_DRAM_BANKS=1
 444 +CONFIG_DEBUG_UART_BASE=0xFF130000
 445 +CONFIG_DEBUG_UART_CLOCK=24000000
 446 +CONFIG_SMBIOS_PRODUCT_NAME="nanopi_r2s_rk3328"
 447 +CONFIG_DEBUG_UART=y
 448 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
 449 +# CONFIG_ANDROID_BOOT_IMAGE is not set
 450 +CONFIG_FIT=y
 451 +CONFIG_FIT_VERBOSE=y
 452 +CONFIG_SPL_LOAD_FIT=y
 453 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2s.dtb"
 454 +CONFIG_MISC_INIT_R=y
 455 +# CONFIG_DISPLAY_CPUINFO is not set
 456 +CONFIG_DISPLAY_BOARDINFO_LATE=y
 457 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 458 +CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 459 +CONFIG_SPL_STACK_R=y
 460 +CONFIG_SPL_I2C_SUPPORT=y
 461 +CONFIG_SPL_POWER_SUPPORT=y
 462 +CONFIG_SPL_ATF=y
 463 +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 464 +CONFIG_CMD_BOOTZ=y
 465 +CONFIG_CMD_GPT=y
 466 +CONFIG_CMD_MMC=y
 467 +CONFIG_CMD_USB=y
 468 +# CONFIG_CMD_SETEXPR is not set
 469 +CONFIG_CMD_TIME=y
 470 +CONFIG_SPL_OF_CONTROL=y
 471 +CONFIG_TPL_OF_CONTROL=y
 472 +CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2s"
 473 +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 474 +CONFIG_TPL_OF_PLATDATA=y
 475 +CONFIG_ENV_IS_IN_MMC=y
 476 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 477 +CONFIG_NET_RANDOM_ETHADDR=y
 478 +CONFIG_TPL_DM=y
 479 +CONFIG_REGMAP=y
 480 +CONFIG_SPL_REGMAP=y
 481 +CONFIG_TPL_REGMAP=y
 482 +CONFIG_SYSCON=y
 483 +CONFIG_SPL_SYSCON=y
 484 +CONFIG_TPL_SYSCON=y
 485 +CONFIG_CLK=y
 486 +CONFIG_SPL_CLK=y
 487 +CONFIG_FASTBOOT_BUF_ADDR=0x800800
 488 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 489 +CONFIG_ROCKCHIP_GPIO=y
 490 +CONFIG_SYS_I2C_ROCKCHIP=y
 491 +CONFIG_MMC_DW=y
 492 +CONFIG_MMC_DW_ROCKCHIP=y
 493 +CONFIG_SF_DEFAULT_SPEED=20000000
 494 +CONFIG_DM_ETH=y
 495 +CONFIG_ETH_DESIGNWARE=y
 496 +CONFIG_GMAC_ROCKCHIP=y
 497 +CONFIG_PINCTRL=y
 498 +CONFIG_SPL_PINCTRL=y
 499 +CONFIG_DM_PMIC=y
 500 +CONFIG_PMIC_RK8XX=y
 501 +CONFIG_SPL_DM_REGULATOR=y
 502 +CONFIG_REGULATOR_PWM=y
 503 +CONFIG_DM_REGULATOR_FIXED=y
 504 +CONFIG_SPL_DM_REGULATOR_FIXED=y
 505 +CONFIG_REGULATOR_RK8XX=y
 506 +CONFIG_PWM_ROCKCHIP=y
 507 +CONFIG_RAM=y
 508 +CONFIG_SPL_RAM=y
 509 +CONFIG_TPL_RAM=y
 510 +CONFIG_DM_RESET=y
 511 +CONFIG_BAUDRATE=1500000
 512 +CONFIG_DEBUG_UART_SHIFT=2
 513 +CONFIG_SYSRESET=y
 514 +# CONFIG_TPL_SYSRESET is not set
 515 +CONFIG_USB=y
 516 +CONFIG_USB_XHCI_HCD=y
 517 +CONFIG_USB_XHCI_DWC3=y
 518 +CONFIG_USB_EHCI_HCD=y
 519 +CONFIG_USB_EHCI_GENERIC=y
 520 +CONFIG_USB_OHCI_HCD=y
 521 +CONFIG_USB_OHCI_GENERIC=y
 522 +CONFIG_USB_DWC2=y
 523 +CONFIG_USB_DWC3=y
 524 +# CONFIG_USB_DWC3_GADGET is not set
 525 +CONFIG_USB_GADGET=y
 526 +CONFIG_USB_GADGET_DWC2_OTG=y
 527 +CONFIG_SPL_TINY_MEMSET=y
 528 +CONFIG_TPL_TINY_MEMSET=y
 529 +CONFIG_ERRNO_STR=y
 530 +CONFIG_SMBIOS_MANUFACTURER="pine64"