package/broadcom-diag/src/gpio.h

   1 #ifndef __DIAG_GPIO_H
   2 #define __DIAG_GPIO_H
   3 #include <linux/interrupt.h>
   4
   5 #ifndef BCMDRIVER
   6 #include <linux/ssb/ssb.h>
   7 #include <linux/ssb/ssb_driver_chipcommon.h>
   8 #include <linux/ssb/ssb_driver_extif.h>
   9
  10 extern struct ssb_bus ssb;
  11
  12 #define gpio_op(op, param...) \
  13         do { \
  14                 if (ssb.chipco.dev) \
  15                         return ssb_chipco_gpio_##op(&ssb.chipco, param); \
  16                 else if (ssb.extif.dev) \
  17                         return ssb_extif_gpio_##op(&ssb.extif, param); \
  18                 else \
  19                         return 0; \
  20         } while (0);
  21
  22
  23 static inline u32 gpio_in(void)
  24 {
  25         gpio_op(in, ~0);
  26 }
  27
  28 static inline u32 gpio_out(u32 mask, u32 value)
  29 {
  30         gpio_op(out, mask, value);
  31 }
  32
  33 static inline u32 gpio_outen(u32 mask, u32 value)
  34 {
  35         gpio_op(outen, mask, value);
  36 }
  37
  38 static inline u32 gpio_control(u32 mask, u32 value)
  39 {
  40         if (ssb.chipco.dev)
  41                 return ssb_chipco_gpio_control(&ssb.chipco, mask, value);
  42         else
  43                 return 0;
  44 }
  45
  46 static inline u32 gpio_intmask(u32 mask, u32 value)
  47 {
  48         gpio_op(intmask, mask, value);
  49 }
  50
  51 static inline u32 gpio_intpolarity(u32 mask, u32 value)
  52 {
  53         gpio_op(polarity, mask, value);
  54 }
  55
  56 static inline u32 __ssb_write32_masked(struct ssb_device *dev, u16 offset,
  57                                        u32 mask, u32 value)
  58 {
  59         value &= mask;
  60         value |= ssb_read32(dev, offset) & ~mask;
  61         ssb_write32(dev, offset, value);
  62         return value;
  63 }
  64
  65 static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *))
  66 {
  67         int irq;
  68
  69         if (ssb.chipco.dev)
  70                 irq = ssb_mips_irq(ssb.chipco.dev) + 2;
  71         else if (ssb.extif.dev)
  72                 irq = ssb_mips_irq(ssb.extif.dev) + 2;
  73         else return;
  74
  75         if (enabled) {
  76                 if (request_irq(irq, handler, IRQF_SHARED | IRQF_SAMPLE_RANDOM, "gpio", handler))
  77                         return;
  78         } else {
  79                 free_irq(irq, handler);
  80         }
  81
  82         if (ssb.chipco.dev)
  83                 __ssb_write32_masked(ssb.chipco.dev, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO, (enabled ? SSB_CHIPCO_IRQ_GPIO : 0));
  84 }
  85
  86 #else
  87
  88 #include <typedefs.h>
  89 #include <osl.h>
  90 #include <bcmdevs.h>
  91 #include <sbutils.h>
  92 #include <sbconfig.h>
  93 #include <sbchipc.h>
  94 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
  95 #include <sbmips.h>
  96 #else
  97 #include <hndcpu.h>
  98 #endif
  99
 100 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
 101 #define sbh bcm947xx_sbh
 102 #define sbh_lock bcm947xx_sbh_lock
 103 #endif
 104
 105 extern void *sbh;
 106 extern spinlock_t sbh_lock;
 107
 108 #define gpio_in()       sb_gpioin(sbh)
 109 #define gpio_out(mask, value)   sb_gpioout(sbh, mask, ((value) & (mask)), GPIO_DRV_PRIORITY)
 110 #define gpio_outen(mask, value)         sb_gpioouten(sbh, mask, value, GPIO_DRV_PRIORITY)
 111 #define gpio_control(mask, value)       sb_gpiocontrol(sbh, mask, value, GPIO_DRV_PRIORITY)
 112 #define gpio_intmask(mask, value)       sb_gpiointmask(sbh, mask, value, GPIO_DRV_PRIORITY)
 113 #define gpio_intpolarity(mask, value)   sb_gpiointpolarity(sbh, mask, value, GPIO_DRV_PRIORITY)
 114
 115 static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *, struct pt_regs *))
 116 {
 117         unsigned int coreidx;
 118         unsigned long flags;
 119         chipcregs_t *cc;
 120         int irq;
 121
 122         spin_lock_irqsave(sbh_lock, flags);
 123         coreidx = sb_coreidx(sbh);
 124
 125         irq = sb_irq(sbh) + 2;
 126         if (enabled)
 127                 request_irq(irq, handler, SA_SHIRQ | SA_SAMPLE_RANDOM, "gpio", handler);
 128         else
 129                 free_irq(irq, handler);
 130
 131         if ((cc = sb_setcore(sbh, SB_CC, 0))) {
 132                 int intmask;
 133
 134                 intmask = readl(&cc->intmask);
 135                 if (enabled)
 136                         intmask |= CI_GPIO;
 137                 else
 138                         intmask &= ~CI_GPIO;
 139                 writel(intmask, &cc->intmask);
 140         }
 141         sb_setcoreidx(sbh, coreidx);
 142         spin_unlock_irqrestore(sbh_lock, flags);
 143 }
 144
 145 #endif /* BCMDRIVER */
 146
 147 #define EXTIF_ADDR 0x1f000000
 148 #define EXTIF_UART (EXTIF_ADDR + 0x00800000)
 149
 150 #define GPIO_TYPE_NORMAL        (0x0 << 24)
 151 #define GPIO_TYPE_EXTIF         (0x1 << 24)
 152 #define GPIO_TYPE_MASK          (0xf << 24)
 153
 154 static inline void gpio_set_extif(int gpio, int value)
 155 {
 156         volatile u8 *addr = (volatile u8 *) KSEG1ADDR(EXTIF_UART) + (gpio & ~GPIO_TYPE_MASK);
 157         if (value)
 158                 *addr = 0xFF;
 159         else
 160                 *addr;
 161 }
 162
 163 #endif /* __DIAG_GPIO_H */