package/kernel/mac80211/patches/302-ath9k_hw-add-low-power-tx-gain-table-for-AR953x.patch

   1 From: Felix Fietkau <nbd@openwrt.org>
   2 Date: Thu, 14 Jan 2016 03:14:03 +0100
   3 Subject: [PATCH] ath9k_hw: add low power tx gain table for AR953x
   4
   5 Used in some newer TP-Link AR9533 devices.
   6
   7 Signed-off-by: Felix Fietkau <nbd@openwrt.org>
   8 ---
   9
  10 --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
  11 +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
  12 @@ -698,6 +698,9 @@ static void ar9003_tx_gain_table_mode2(s
  13         else if (AR_SREV_9340(ah))
  14                 INIT_INI_ARRAY(&ah->iniModesTxGain,
  15                         ar9340Modes_low_ob_db_tx_gain_table_1p0);
  16 +       else if (AR_SREV_9531_11(ah))
  17 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
  18 +                              qca953x_1p1_modes_no_xpa_low_power_tx_gain_table);
  19         else if (AR_SREV_9485_11_OR_LATER(ah))
  20                 INIT_INI_ARRAY(&ah->iniModesTxGain,
  21                         ar9485Modes_low_ob_db_tx_gain_1_1);
  22 --- a/drivers/net/wireless/ath/ath9k/ar953x_initvals.h
  23 +++ b/drivers/net/wireless/ath/ath9k/ar953x_initvals.h
  24 @@ -757,6 +757,71 @@ static const u32 qca953x_1p1_modes_xpa_t
  25         {0x00016448, 0x6c927a70},
  26  };
  27
  28 +static const u32 qca953x_1p1_modes_no_xpa_low_power_tx_gain_table[][2] = {
  29 +       /* Addr      allmodes  */
  30 +       {0x0000a2dc, 0xfff55592},
  31 +       {0x0000a2e0, 0xfff99924},
  32 +       {0x0000a2e4, 0xfffe1e00},
  33 +       {0x0000a2e8, 0xffffe000},
  34 +       {0x0000a410, 0x000050d6},
  35 +       {0x0000a500, 0x00000069},
  36 +       {0x0000a504, 0x0400006b},
  37 +       {0x0000a508, 0x0800006d},
  38 +       {0x0000a50c, 0x0c000269},
  39 +       {0x0000a510, 0x1000026b},
  40 +       {0x0000a514, 0x1400026d},
  41 +       {0x0000a518, 0x18000669},
  42 +       {0x0000a51c, 0x1c00066b},
  43 +       {0x0000a520, 0x1d000a68},
  44 +       {0x0000a524, 0x21000a6a},
  45 +       {0x0000a528, 0x25000a6c},
  46 +       {0x0000a52c, 0x29000a6e},
  47 +       {0x0000a530, 0x2d0012a9},
  48 +       {0x0000a534, 0x310012ab},
  49 +       {0x0000a538, 0x350012ad},
  50 +       {0x0000a53c, 0x39001b0a},
  51 +       {0x0000a540, 0x3d001b0c},
  52 +       {0x0000a544, 0x41001b0e},
  53 +       {0x0000a548, 0x43001bae},
  54 +       {0x0000a54c, 0x45001914},
  55 +       {0x0000a550, 0x47001916},
  56 +       {0x0000a554, 0x49001b96},
  57 +       {0x0000a558, 0x49001b96},
  58 +       {0x0000a55c, 0x49001b96},
  59 +       {0x0000a560, 0x49001b96},
  60 +       {0x0000a564, 0x49001b96},
  61 +       {0x0000a568, 0x49001b96},
  62 +       {0x0000a56c, 0x49001b96},
  63 +       {0x0000a570, 0x49001b96},
  64 +       {0x0000a574, 0x49001b96},
  65 +       {0x0000a578, 0x49001b96},
  66 +       {0x0000a57c, 0x49001b96},
  67 +       {0x0000a600, 0x00000000},
  68 +       {0x0000a604, 0x00000000},
  69 +       {0x0000a608, 0x00000000},
  70 +       {0x0000a60c, 0x00000000},
  71 +       {0x0000a610, 0x00000000},
  72 +       {0x0000a614, 0x00000000},
  73 +       {0x0000a618, 0x00804201},
  74 +       {0x0000a61c, 0x01408201},
  75 +       {0x0000a620, 0x01408502},
  76 +       {0x0000a624, 0x01408502},
  77 +       {0x0000a628, 0x01408502},
  78 +       {0x0000a62c, 0x01408502},
  79 +       {0x0000a630, 0x01408502},
  80 +       {0x0000a634, 0x01408502},
  81 +       {0x0000a638, 0x01408502},
  82 +       {0x0000a63c, 0x01408502},
  83 +       {0x0000b2dc, 0xfff55592},
  84 +       {0x0000b2e0, 0xfff99924},
  85 +       {0x0000b2e4, 0xfffe1e00},
  86 +       {0x0000b2e8, 0xffffe000},
  87 +       {0x00016044, 0x044922db},
  88 +       {0x00016048, 0x6c927a70},
  89 +       {0x00016444, 0x044922db},
  90 +       {0x00016448, 0x6c927a70},
  91 +};
  92 +
  93  static const u32 qca953x_2p0_baseband_core[][2] = {
  94         /* Addr      allmodes  */
  95         {0x00009800, 0xafe68e30},