ath10k: merge some pending stability fixes
[openwrt/openwrt.git] / package / kernel / mac80211 / patches / 309-ath10k-fix-CCK-h-w-rates-for-QCA99X0-and-newer-chips.patch
1 From: Mohammed Shafi Shajakhan <mohammed@qti.qualcomm.com>
2 Date: Thu, 2 Jun 2016 19:54:42 +0530
3 Subject: [PATCH] ath10k: fix CCK h/w rates for QCA99X0 and newer chipsets
4
5 CCK hardware table mapping from QCA99X0 onwards got revised.
6 The CCK hardware rate values are in a proper order wrt. to
7 rate and preamble as below
8
9 ATH10K_HW_RATE_REV2_CCK_LP_1M = 1,
10 ATH10K_HW_RATE_REV2_CCK_LP_2M = 2,
11 ATH10K_HW_RATE_REV2_CCK_LP_5_5M = 3,
12 ATH10K_HW_RATE_REV2_CCK_LP_11M = 4,
13 ATH10K_HW_RATE_REV2_CCK_SP_2M = 5,
14 ATH10K_HW_RATE_REV2_CCK_SP_5_5M = 6,
15 ATH10K_HW_RATE_REV2_CCK_SP_11M = 7,
16
17 This results in reporting of rx frames (with CCK rates)
18 totally wrong for QCA99X0, QCA4019. Fix this by having
19 separate CCK rate table for these chipsets with rev2 suffix
20 and registering the correct rate mapping to mac80211 based on
21 the new hw_param (introduced) 'cck_rate_map_rev2' which shall
22 be true for any newchipsets from QCA99X0 onwards
23
24 Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qti.qualcomm.com>
25 ---
26
27 --- a/drivers/net/wireless/ath/ath10k/core.c
28 +++ b/drivers/net/wireless/ath/ath10k/core.c
29 @@ -148,6 +148,8 @@ static const struct ath10k_hw_params ath
30 .uart_pin = 7,
31 .otp_exe_param = 0x00000700,
32 .continuous_frag_desc = true,
33 + .cck_rate_map_rev2 = true,
34 + .cck_rate_map_rev2 = true,
35 .channel_counters_freq_hz = 150000,
36 .max_probe_resp_desc_thres = 24,
37 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE,
38 @@ -205,6 +207,7 @@ static const struct ath10k_hw_params ath
39 .has_shifted_cc_wraparound = true,
40 .otp_exe_param = 0x0010000,
41 .continuous_frag_desc = true,
42 + .cck_rate_map_rev2 = true,
43 .channel_counters_freq_hz = 125000,
44 .max_probe_resp_desc_thres = 24,
45 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE,
46 --- a/drivers/net/wireless/ath/ath10k/core.h
47 +++ b/drivers/net/wireless/ath/ath10k/core.h
48 @@ -716,6 +716,12 @@ struct ath10k {
49 */
50 bool continuous_frag_desc;
51
52 + /* CCK hardware rate table mapping for the newer chipsets
53 + * like QCA99X0, QCA4019 got revised. The CCK h/w rate values
54 + * are in a proper order with respect to the rate/preamble
55 + */
56 + bool cck_rate_map_rev2;
57 +
58 u32 channel_counters_freq_hz;
59
60 /* Mgmt tx descriptors threshold for limiting probe response
61 --- a/drivers/net/wireless/ath/ath10k/hw.h
62 +++ b/drivers/net/wireless/ath/ath10k/hw.h
63 @@ -315,6 +315,16 @@ enum ath10k_hw_rate_cck {
64 ATH10K_HW_RATE_CCK_SP_2M,
65 };
66
67 +enum ath10k_hw_rate_rev2_cck {
68 + ATH10K_HW_RATE_REV2_CCK_LP_1M = 1,
69 + ATH10K_HW_RATE_REV2_CCK_LP_2M,
70 + ATH10K_HW_RATE_REV2_CCK_LP_5_5M,
71 + ATH10K_HW_RATE_REV2_CCK_LP_11M,
72 + ATH10K_HW_RATE_REV2_CCK_SP_2M,
73 + ATH10K_HW_RATE_REV2_CCK_SP_5_5M,
74 + ATH10K_HW_RATE_REV2_CCK_SP_11M,
75 +};
76 +
77 enum ath10k_hw_4addr_pad {
78 ATH10K_HW_4ADDR_PAD_AFTER,
79 ATH10K_HW_4ADDR_PAD_BEFORE,
80 --- a/drivers/net/wireless/ath/ath10k/mac.c
81 +++ b/drivers/net/wireless/ath/ath10k/mac.c
82 @@ -62,6 +62,32 @@ static struct ieee80211_rate ath10k_rate
83 { .bitrate = 540, .hw_value = ATH10K_HW_RATE_OFDM_54M },
84 };
85
86 +static struct ieee80211_rate ath10k_rates_rev2[] = {
87 + { .bitrate = 10,
88 + .hw_value = ATH10K_HW_RATE_REV2_CCK_LP_1M },
89 + { .bitrate = 20,
90 + .hw_value = ATH10K_HW_RATE_REV2_CCK_LP_2M,
91 + .hw_value_short = ATH10K_HW_RATE_REV2_CCK_SP_2M,
92 + .flags = IEEE80211_RATE_SHORT_PREAMBLE },
93 + { .bitrate = 55,
94 + .hw_value = ATH10K_HW_RATE_REV2_CCK_LP_5_5M,
95 + .hw_value_short = ATH10K_HW_RATE_REV2_CCK_SP_5_5M,
96 + .flags = IEEE80211_RATE_SHORT_PREAMBLE },
97 + { .bitrate = 110,
98 + .hw_value = ATH10K_HW_RATE_REV2_CCK_LP_11M,
99 + .hw_value_short = ATH10K_HW_RATE_REV2_CCK_SP_11M,
100 + .flags = IEEE80211_RATE_SHORT_PREAMBLE },
101 +
102 + { .bitrate = 60, .hw_value = ATH10K_HW_RATE_OFDM_6M },
103 + { .bitrate = 90, .hw_value = ATH10K_HW_RATE_OFDM_9M },
104 + { .bitrate = 120, .hw_value = ATH10K_HW_RATE_OFDM_12M },
105 + { .bitrate = 180, .hw_value = ATH10K_HW_RATE_OFDM_18M },
106 + { .bitrate = 240, .hw_value = ATH10K_HW_RATE_OFDM_24M },
107 + { .bitrate = 360, .hw_value = ATH10K_HW_RATE_OFDM_36M },
108 + { .bitrate = 480, .hw_value = ATH10K_HW_RATE_OFDM_48M },
109 + { .bitrate = 540, .hw_value = ATH10K_HW_RATE_OFDM_54M },
110 +};
111 +
112 #define ATH10K_MAC_FIRST_OFDM_RATE_IDX 4
113
114 #define ath10k_a_rates (ath10k_rates + ATH10K_MAC_FIRST_OFDM_RATE_IDX)
115 @@ -70,6 +96,9 @@ static struct ieee80211_rate ath10k_rate
116 #define ath10k_g_rates (ath10k_rates + 0)
117 #define ath10k_g_rates_size (ARRAY_SIZE(ath10k_rates))
118
119 +#define ath10k_g_rates_rev2 (ath10k_rates_rev2 + 0)
120 +#define ath10k_g_rates_rev2_size (ARRAY_SIZE(ath10k_rates_rev2))
121 +
122 static bool ath10k_mac_bitrate_is_cck(int bitrate)
123 {
124 switch (bitrate) {
125 @@ -7720,8 +7749,14 @@ int ath10k_mac_register(struct ath10k *a
126 band = &ar->mac.sbands[NL80211_BAND_2GHZ];
127 band->n_channels = ARRAY_SIZE(ath10k_2ghz_channels);
128 band->channels = channels;
129 - band->n_bitrates = ath10k_g_rates_size;
130 - band->bitrates = ath10k_g_rates;
131 +
132 + if (ar->hw_params.cck_rate_map_rev2) {
133 + band->n_bitrates = ath10k_g_rates_rev2_size;
134 + band->bitrates = ath10k_g_rates_rev2;
135 + } else {
136 + band->n_bitrates = ath10k_g_rates_size;
137 + band->bitrates = ath10k_g_rates;
138 + }
139
140 ar->hw->wiphy->bands[NL80211_BAND_2GHZ] = band;
141 }