mac80211: Update to version 5.6.8-1
[openwrt/openwrt.git] / package / kernel / mac80211 / patches / rt2x00 / 650-rt2x00-add-support-for-external-PA-on-MT7620.patch
1 From 9782a7f7488443568fa4d6088b73c9aff7eb8510 Mon Sep 17 00:00:00 2001
2 From: Daniel Golle <daniel@makrotopia.org>
3 Date: Wed, 19 Apr 2017 16:14:53 +0200
4 Subject: [PATCH] rt2x00: add support for external PA on MT7620
5 To: Stanislaw Gruszka <sgruszka@redhat.com>
6 Cc: Helmut Schaa <helmut.schaa@googlemail.com>,
7 linux-wireless@vger.kernel.org,
8 Kalle Valo <kvalo@codeaurora.org>
9 Content-Type: text/plain; charset="UTF-8"
10 Content-Transfer-Encoding: quoted-printable
11
12 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
13 Signed-off-by: Tomislav Po=C5=BEega <pozega.tomislav@gmail.com>
14 [pozega.tomislav@gmail.com: use chanreg and dccal helpers.]
15
16 ---
17 drivers/net/wireless/ralink/rt2x00/rt2800.h | 1 +
18 drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 70 +++++++++++++++++++++++++-
19 2 files changed, 70 insertions(+), 1 deletion(-)
20
21 --- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
22 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
23 @@ -2739,6 +2739,7 @@ enum rt2800_eeprom_word {
24 #define EEPROM_NIC_CONF2_RX_STREAM FIELD16(0x000f)
25 #define EEPROM_NIC_CONF2_TX_STREAM FIELD16(0x00f0)
26 #define EEPROM_NIC_CONF2_CRYSTAL FIELD16(0x0600)
27 +#define EEPROM_NIC_CONF2_EXTERNAL_PA FIELD16(0xc000)
28
29 /*
30 * EEPROM LNA
31 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
32 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
33 @@ -4356,6 +4356,45 @@ static void rt2800_config_channel(struct
34 rt2800_iq_calibrate(rt2x00dev, rf->channel);
35 }
36
37 + if (rt2x00_rt(rt2x00dev, RT6352)) {
38 + if (test_bit(CAPABILITY_EXTERNAL_PA_TX0,
39 + &rt2x00dev->cap_flags)) {
40 + rt2x00_warn(rt2x00dev, "Using incomplete support for " \
41 + "external PA\n");
42 + reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
43 + reg |= 0x00000101;
44 + rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
45 +
46 + reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
47 + reg |= 0x00000101;
48 + rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
49 +
50 + rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0x73);
51 + rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0x73);
52 + rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0x73);
53 + rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
54 + rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0xC8);
55 + rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xA4);
56 + rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x05);
57 + rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
58 + rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0xC8);
59 + rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xA4);
60 + rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x05);
61 + rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x27);
62 + rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0xC8);
63 + rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xA4);
64 + rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x05);
65 + rt2800_rfcsr_write_dccal(rt2x00dev, 05, 0x00);
66 +
67 + rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT,
68 + 0x36303636);
69 + rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN,
70 + 0x6C6C6B6C);
71 + rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN,
72 + 0x6C6C6B6C);
73 + }
74 + }
75 +
76 bbp = rt2800_bbp_read(rt2x00dev, 4);
77 rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf));
78 rt2800_bbp_write(rt2x00dev, 4, bbp);
79 @@ -9557,7 +9596,8 @@ static int rt2800_init_eeprom(struct rt2
80 */
81 eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1);
82
83 - if (rt2x00_rt(rt2x00dev, RT3352)) {
84 + if (rt2x00_rt(rt2x00dev, RT3352) ||
85 + rt2x00_rt(rt2x00dev, RT6352)) {
86 if (rt2x00_get_field16(eeprom,
87 EEPROM_NIC_CONF1_EXTERNAL_TX0_PA_3352))
88 __set_bit(CAPABILITY_EXTERNAL_PA_TX0,
89 @@ -9568,6 +9608,18 @@ static int rt2800_init_eeprom(struct rt2
90 &rt2x00dev->cap_flags);
91 }
92
93 + eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF2);
94 +
95 + if (rt2x00_rt(rt2x00dev, RT6352) && eeprom != 0 && eeprom != 0xffff) {
96 + if (rt2x00_get_field16(eeprom,
97 + EEPROM_NIC_CONF2_EXTERNAL_PA)) {
98 + __set_bit(CAPABILITY_EXTERNAL_PA_TX0,
99 + &rt2x00dev->cap_flags);
100 + __set_bit(CAPABILITY_EXTERNAL_PA_TX1,
101 + &rt2x00dev->cap_flags);
102 + }
103 + }
104 +
105 return 0;
106 }
107