mac80211: Update to version 5.6.8-1
[openwrt/openwrt.git] / package / kernel / mac80211 / patches / rt2x00 / 983-rt2x00-add-r-calibration.patch
1 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
2 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
3 @@ -8469,6 +8469,155 @@ static void rt2800_rf_self_txdc_cal(stru
4 rt2x00_info(rt2x00dev, "RF Tx self calibration end\n");
5 }
6
7 +static int rt2800_calcrcalibrationcode(struct rt2x00_dev *rt2x00dev, int d1, int d2)
8 +{
9 + int calcode;
10 + calcode = ((d2 - d1) * 1000) / 43;
11 + if ((calcode%10) >= 5)
12 + calcode += 10;
13 + calcode = (calcode / 10);
14 +
15 + return calcode;
16 +}
17 +
18 +static void rt2800_r_calibration(struct rt2x00_dev *rt2x00dev)
19 +{
20 + u32 savemacsysctrl;
21 + u8 saverfb0r1, saverfb0r34, saverfb0r35;
22 + u8 saverfb5r4, saverfb5r17, saverfb5r18;
23 + u8 saverfb5r19, saverfb5r20;
24 + u8 savebbpr22, savebbpr47, savebbpr49;
25 + u8 bytevalue = 0;
26 + int rcalcode;
27 + u8 r_cal_code = 0;
28 + char d1 = 0, d2 = 0;
29 + u8 rfvalue;
30 + u32 MAC_RF_BYPASS0, MAC_RF_CONTROL0, MAC_PWR_PIN_CFG;
31 + u32 maccfg, macstatus;
32 + int i;
33 +
34 + saverfb0r1 = rt2800_rfcsr_read_bank(rt2x00dev, 0, 1);
35 + saverfb0r34 = rt2800_rfcsr_read_bank(rt2x00dev, 0, 34);
36 + saverfb0r35 = rt2800_rfcsr_read_bank(rt2x00dev, 0, 35);
37 + saverfb5r4 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 4);
38 + saverfb5r17 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 17);
39 + saverfb5r18 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 18);
40 + saverfb5r19 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 19);
41 + saverfb5r20 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 20);
42 +
43 + savebbpr22 = rt2800_bbp_read(rt2x00dev, 22);
44 + savebbpr47 = rt2800_bbp_read(rt2x00dev, 47);
45 + savebbpr49 = rt2800_bbp_read(rt2x00dev, 49);
46 +
47 + savemacsysctrl = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
48 + MAC_RF_BYPASS0 = rt2800_register_read(rt2x00dev, RF_BYPASS0);
49 + MAC_RF_CONTROL0 = rt2800_register_read(rt2x00dev, RF_CONTROL0);
50 + MAC_PWR_PIN_CFG = rt2800_register_read(rt2x00dev, PWR_PIN_CFG);
51 +
52 + maccfg = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
53 + maccfg &= (~0x04);
54 + rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, maccfg);
55 +
56 + for (i = 0; i < 10000; i++) {
57 + macstatus = rt2800_register_read(rt2x00dev, MAC_STATUS_CFG);
58 + if (macstatus & 0x1)
59 + udelay(50);
60 + else
61 + break;
62 + }
63 +
64 + if (i == 10000)
65 + rt2x00_warn(rt2x00dev, "Wait MAC Tx Status to MAX !!!\n");
66 +
67 + maccfg = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
68 + maccfg &= (~0x04);
69 + rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, maccfg);
70 +
71 + for (i = 0; i < 10000; i++) {
72 + macstatus = rt2800_register_read(rt2x00dev, MAC_STATUS_CFG);
73 + if (macstatus & 0x2)
74 + udelay(50);
75 + else
76 + break;
77 + }
78 +
79 + if (i == 10000)
80 + rt2x00_warn(rt2x00dev, "Wait MAC Rx Status to MAX !!!\n");
81 +
82 + rfvalue = (MAC_RF_BYPASS0 | 0x3004);
83 + rt2800_register_write(rt2x00dev, RF_BYPASS0, rfvalue);
84 + rfvalue = (MAC_RF_CONTROL0 | (~0x3002));
85 + rt2800_register_write(rt2x00dev, RF_CONTROL0, rfvalue);
86 +
87 + rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, 0x27);
88 + rt2800_rfcsr_write_bank(rt2x00dev, 5, 17, 0x80);
89 + rt2800_rfcsr_write_bank(rt2x00dev, 5, 18, 0x83);
90 + rt2800_rfcsr_write_bank(rt2x00dev, 5, 19, 0x00);
91 + rt2800_rfcsr_write_bank(rt2x00dev, 5, 20, 0x20);
92 +
93 + rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, 0x00);
94 + rt2800_rfcsr_write_bank(rt2x00dev, 0, 34, 0x13);
95 + rt2800_rfcsr_write_bank(rt2x00dev, 0, 35, 0x00);
96 +
97 + rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x1);
98 +
99 + rt2800_bbp_write(rt2x00dev, 47, 0x04);
100 + rt2800_bbp_write(rt2x00dev, 22, 0x80);
101 + udelay(100);
102 + bytevalue = rt2800_bbp_read(rt2x00dev, 49);
103 + if (bytevalue > 128)
104 + d1 = bytevalue - 256;
105 + else
106 + d1 = (char)bytevalue;
107 + rt2800_bbp_write(rt2x00dev, 22, 0x0);
108 + rt2800_rfcsr_write_bank(rt2x00dev, 0, 35, 0x01);
109 +
110 + rt2800_bbp_write(rt2x00dev, 22, 0x80);
111 + udelay(100);
112 + bytevalue = rt2800_bbp_read(rt2x00dev, 49);
113 + if (bytevalue > 128)
114 + d2 = bytevalue - 256;
115 + else
116 + d2 = (char)bytevalue;
117 + rt2800_bbp_write(rt2x00dev, 22, 0x0);
118 +
119 + rcalcode = rt2800_calcrcalibrationcode(rt2x00dev, d1, d2);
120 + if (rcalcode < 0)
121 + r_cal_code = 256 + rcalcode;
122 + else
123 + r_cal_code = (u8)rcalcode;
124 +
125 + rt2800_rfcsr_write_bank(rt2x00dev, 0, 7, r_cal_code);
126 +
127 + rt2800_bbp_write(rt2x00dev, 22, 0x0);
128 +
129 + bytevalue = rt2800_bbp_read(rt2x00dev, 21);
130 + bytevalue |= 0x1;
131 + rt2800_bbp_write(rt2x00dev, 21, bytevalue);
132 + bytevalue = rt2800_bbp_read(rt2x00dev, 21);
133 + bytevalue &= (~0x1);
134 + rt2800_bbp_write(rt2x00dev, 21, bytevalue);
135 +
136 + rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, saverfb0r1);
137 + rt2800_rfcsr_write_bank(rt2x00dev, 0, 34, saverfb0r34);
138 + rt2800_rfcsr_write_bank(rt2x00dev, 0, 35, saverfb0r35);
139 + rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, saverfb5r4);
140 + rt2800_rfcsr_write_bank(rt2x00dev, 5, 17, saverfb5r17);
141 + rt2800_rfcsr_write_bank(rt2x00dev, 5, 18, saverfb5r18);
142 + rt2800_rfcsr_write_bank(rt2x00dev, 5, 19, saverfb5r19);
143 + rt2800_rfcsr_write_bank(rt2x00dev, 5, 20, saverfb5r20);
144 +
145 + rt2800_bbp_write(rt2x00dev, 22, savebbpr22);
146 + rt2800_bbp_write(rt2x00dev, 47, savebbpr47);
147 + rt2800_bbp_write(rt2x00dev, 49, savebbpr49);
148 +
149 + rt2800_register_write(rt2x00dev, RF_BYPASS0, MAC_RF_BYPASS0);
150 + rt2800_register_write(rt2x00dev, RF_CONTROL0, MAC_RF_CONTROL0);
151 +
152 + rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, savemacsysctrl);
153 + rt2800_register_write(rt2x00dev, PWR_PIN_CFG, MAC_PWR_PIN_CFG);
154 +}
155 +
156 static void rt2800_bbp_core_soft_reset(struct rt2x00_dev *rt2x00dev,
157 bool set_bw, bool is_ht40)
158 {
159 @@ -9076,6 +9225,7 @@ static void rt2800_init_rfcsr_6352(struc
160 rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
161 rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
162
163 + rt2800_r_calibration(rt2x00dev);
164 rt2800_rf_self_txdc_cal(rt2x00dev);
165 rt2800_bw_filter_calibration(rt2x00dev, true);
166 rt2800_bw_filter_calibration(rt2x00dev, false);