target/linux/adm5120-2.6/files/arch/mips/adm5120/irq.c

   1 /*
   2  *      Copyright (C) ADMtek Incorporated.
   3  *              Creator : daniell@admtek.com.tw
   4  *      Carsten Langgaard, carstenl@mips.com
   5  *      Copyright (C) 2000, 2001 MIPS Technologies, Inc.
   6  *      Copyright (C) 2001 Ralf Baechle
   7  *      Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
   8  */
   9
  10 #include <linux/autoconf.h>
  11 #include <linux/init.h>
  12 #include <linux/kernel_stat.h>
  13 #include <linux/signal.h>
  14 #include <linux/sched.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/slab.h>
  17 #include <linux/random.h>
  18 #include <linux/pm.h>
  19
  20 #include <asm/irq.h>
  21 #include <asm/time.h>
  22 #include <asm/mipsregs.h>
  23 #include <asm/gdb-stub.h>
  24 #include <asm/irq_cpu.h>
  25
  26 #define MIPS_CPU_TIMER_IRQ 7
  27
  28 extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
  29 extern irq_desc_t irq_desc[];
  30 extern asmlinkage void mipsIRQ(void);
  31
  32 int mips_int_lock(void);
  33 void mips_int_unlock(int);
  34
  35 unsigned int mips_counter_frequency;
  36
  37 #define ADM5120_INTC_REG(reg)   (*(volatile u32 *)(KSEG1ADDR(0x12200000+(reg))))
  38 #define ADM5120_INTC_STATUS     ADM5120_INTC_REG(0x00)
  39 #define ADM5120_INTC_ENABLE     ADM5120_INTC_REG(0x08)
  40 #define ADM5120_INTC_DISABLE    ADM5120_INTC_REG(0x0c)
  41 #define ADM5120_IRQ_MAX         9
  42 #define ADM5120_IRQ_MASK        0x3ff
  43
  44 void adm5120_hw0_irqdispatch(struct pt_regs *regs)
  45 {
  46         unsigned long intsrc;
  47         int i;
  48
  49         intsrc = ADM5120_INTC_STATUS & ADM5120_IRQ_MASK;
  50
  51         if (intsrc) {
  52                 for (i = 0; intsrc; intsrc >>= 1, i++)
  53                         if (intsrc & 0x1)
  54                                 do_IRQ(i);
  55         } else
  56                 spurious_interrupt();
  57 }
  58
  59 void mips_timer_interrupt(struct pt_regs *regs)
  60 {
  61         write_c0_compare(read_c0_count()+ mips_counter_frequency/HZ);
  62         ll_timer_interrupt(MIPS_CPU_TIMER_IRQ);
  63 }
  64
  65 /* Main interrupt dispatcher */
  66 asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
  67 {
  68         unsigned int cp0_cause = read_c0_cause() & read_c0_status();
  69
  70         if (cp0_cause & CAUSEF_IP7) {
  71                 mips_timer_interrupt( regs);
  72         } else if (cp0_cause & CAUSEF_IP2) {
  73                 adm5120_hw0_irqdispatch( regs);
  74         }
  75 }
  76
  77 void enable_adm5120_irq(unsigned int irq)
  78 {
  79         int s;
  80
  81         /* Disable all interrupts (FIQ/IRQ) */
  82         s = mips_int_lock();
  83
  84         if ((irq < 0) || (irq > ADM5120_IRQ_MAX))
  85                 goto err_exit;
  86
  87         ADM5120_INTC_ENABLE = (1<<irq);
  88
  89 err_exit:
  90
  91         /* Restore the interrupts states */
  92         mips_int_unlock(s);
  93 }
  94
  95
  96 void disable_adm5120_irq(unsigned int irq)
  97 {
  98         int s;
  99
 100         /* Disable all interrupts (FIQ/IRQ) */
 101         s = mips_int_lock();
 102
 103         if ((irq < 0) || (irq > ADM5120_IRQ_MAX))
 104                 goto err_exit;
 105
 106         ADM5120_INTC_DISABLE = (1<<irq);
 107
 108 err_exit:
 109         /* Restore the interrupts states */
 110         mips_int_unlock(s);
 111 }
 112
 113 unsigned int startup_adm5120_irq(unsigned int irq)
 114 {
 115         enable_adm5120_irq(irq);
 116         return 0;
 117 }
 118
 119 void shutdown_adm5120_irq(unsigned int irq)
 120 {
 121         disable_adm5120_irq(irq);
 122 }
 123
 124 static inline void ack_adm5120_irq(unsigned int irq_nr)
 125 {
 126         ADM5120_INTC_DISABLE = (1 << irq_nr);
 127 }
 128
 129
 130 static void end_adm5120_irq(unsigned int irq_nr)
 131 {
 132         ADM5120_INTC_ENABLE = (1 << irq_nr);
 133 }
 134
 135 static hw_irq_controller adm5120_irq_type = {
 136         .typename       = "MIPS",
 137         .startup        = startup_adm5120_irq,
 138         .shutdown       = shutdown_adm5120_irq,
 139         .enable         = enable_adm5120_irq,
 140         .disable        = disable_adm5120_irq,
 141         .ack            = ack_adm5120_irq,
 142         .end            = end_adm5120_irq,
 143         .set_affinity   = NULL,
 144 };
 145
 146
 147 void __init arch_init_irq(void)
 148 {
 149         int i;
 150
 151         for (i = 0; i <= ADM5120_IRQ_MAX; i++) {
 152                 irq_desc[i].status = IRQ_DISABLED;
 153                 irq_desc[i].action = 0;
 154                 irq_desc[i].depth = 1;
 155                 irq_desc[i].chip = &adm5120_irq_type;
 156         }
 157 }