target/linux/apm821xx/dts/apm82181.dtsi

   1 /*
   2  * Device Tree for Bluestone (APM821xx) board.
   3  *
   4  * Copyright (c) 2010, Applied Micro Circuits Corporation
   5  * Author: Tirumala R Marri <tmarri@apm.com>
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  *
  22  */
  23
  24 #include <dt-bindings/input/input.h>
  25 #include <dt-bindings/interrupt-controller/irq.h>
  26 #include <dt-bindings/gpio/gpio.h>
  27
  28 / {
  29         #address-cells = <2>;
  30         #size-cells = <1>;
  31         dcr-parent = <&{/cpus/cpu@0}>;
  32         compatible = "apm,bluestone";
  33
  34         aliases {
  35                 ethernet0 = &EMAC0;
  36         };
  37
  38         cpus {
  39                 #address-cells = <1>;
  40                 #size-cells = <0>;
  41
  42                 CPU00: cpu@0 {
  43                         device_type = "cpu";
  44                         model = "PowerPC,apm82181";
  45                         reg = <0x00000000>;
  46                         clock-frequency = <0>; /* Filled in by U-Boot */
  47                         timebase-frequency = <0>; /* Filled in by U-Boot */
  48                         i-cache-line-size = <32>;
  49                         d-cache-line-size = <32>;
  50                         i-cache-size = <32768>;
  51                         d-cache-size = <32768>;
  52                         dcr-controller;
  53                         dcr-access-method = "native";
  54                         next-level-cache = <&L2C0>;
  55                 };
  56         };
  57
  58         memory {
  59                 device_type = "memory";
  60                 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
  61         };
  62
  63         UIC0: interrupt-controller0 {
  64                 compatible = "apm,uic-apm82181","ibm,uic";
  65                 interrupt-controller;
  66                 cell-index = <0>;
  67                 dcr-reg = <0x0c0 0x009>;
  68                 #address-cells = <0>;
  69                 #size-cells = <0>;
  70                 #interrupt-cells = <2>;
  71         };
  72
  73         UIC1: interrupt-controller1 {
  74                 compatible = "apm,uic-apm82181","ibm,uic";
  75                 interrupt-controller;
  76                 cell-index = <1>;
  77                 dcr-reg = <0x0d0 0x009>;
  78                 #address-cells = <0>;
  79                 #size-cells = <0>;
  80                 #interrupt-cells = <2>;
  81                 interrupts = <0x1e IRQ_TYPE_LEVEL_HIGH
  82                               0x1f IRQ_TYPE_LEVEL_HIGH>; /* cascade */
  83                 interrupt-parent = <&UIC0>;
  84         };
  85
  86         UIC2: interrupt-controller2 {
  87                 compatible = "apm,uic-apm82181","ibm,uic";
  88                 interrupt-controller;
  89                 cell-index = <2>;
  90                 dcr-reg = <0x0e0 0x009>;
  91                 #address-cells = <0>;
  92                 #size-cells = <0>;
  93                 #interrupt-cells = <2>;
  94                 interrupts = <0x0a IRQ_TYPE_LEVEL_HIGH
  95                               0x0b IRQ_TYPE_LEVEL_HIGH>; /* cascade */
  96                 interrupt-parent = <&UIC0>;
  97         };
  98
  99         UIC3: interrupt-controller3 {
 100                 compatible = "apm,uic-apm82181","ibm,uic";
 101                 interrupt-controller;
 102                 cell-index = <3>;
 103                 dcr-reg = <0x0f0 0x009>;
 104                 #address-cells = <0>;
 105                 #size-cells = <0>;
 106                 #interrupt-cells = <2>;
 107                 interrupts = <0x10 IRQ_TYPE_LEVEL_HIGH
 108                               0x11 IRQ_TYPE_LEVEL_HIGH>; /* cascade */
 109                 interrupt-parent = <&UIC0>;
 110         };
 111
 112         OCM1: ocm@400040000 {
 113                 compatible = "apm,ocm-apm82181", "ibm,ocm";
 114                 status = "okay";
 115                 cell-index = <1>;
 116                 /* configured in U-Boot */
 117                 reg = <4 0x00040000 0x8000>; /* 32K */
 118         };
 119
 120         SDR0: sdr {
 121                 compatible = "apm,sdr-apm82181", "ibm,sdr-460ex";
 122                 dcr-reg = <0x00e 0x002>;
 123         };
 124
 125         CPR0: cpr {
 126                 compatible = "apm,cpr-apm82181", "ibm,cpr-460ex";
 127                 dcr-reg = <0x00c 0x002>;
 128         };
 129
 130         L2C0: l2c {
 131                 compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache";
 132                 dcr-reg = <0x020 0x008
 133                            0x030 0x008>;
 134                 cache-line-size = <32>;
 135                 cache-size = <262144>;
 136                 interrupt-parent = <&UIC1>;
 137                 interrupts = <0x0b IRQ_TYPE_EDGE_RISING>;
 138         };
 139
 140         CPM0: cpm {
 141                 compatible = "ibm,cpm-apm821xx", "ibm,cpm";
 142                 cell-index = <0>;
 143                 dcr-reg = <0x160 0x003>;
 144                 pm-cpu = <0x02000000>;
 145                 pm-doze = <0x302570F0>;
 146                 pm-nap = <0x302570F0>;
 147                 pm-deepsleep = <0x302570F0>;
 148                 pm-iic-device = <&IIC0>;
 149                 pm-emac-device = <&EMAC0>;
 150                 unused-units = <0x00000100>;
 151                 idle-doze = <0x02000000>;
 152                 standby = <0xfeff791d>;
 153         };
 154
 155         plb {
 156                 compatible = "apm,plb-apm82181", "ibm,plb-460ex", "ibm,plb4";
 157                 #address-cells = <2>;
 158                 #size-cells = <1>;
 159                 ranges;
 160                 clock-frequency = <0>; /* Filled in by U-Boot */
 161
 162                 SDRAM0: sdram {
 163                         compatible = "apm,sdram-apm82181", "ibm,sdram-460ex", "ibm,sdram-405gp";
 164                         dcr-reg = <0x010 0x002>;
 165                 };
 166
 167                 RTC: rtc {
 168                         compatible = "ibm,rtc";
 169                         dcr-reg = <0x240 0x009>;
 170                         interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
 171                         interrupt-parent = <&UIC2>;
 172
 173                 };
 174
 175                 CRYPTO: crypto@180000 {
 176                         compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";
 177                         reg = <4 0x00180000 0x80400>;
 178                         interrupt-parent = <&UIC0>;
 179                         interrupts = <0x1d IRQ_TYPE_LEVEL_HIGH>;
 180                         status = "disabled";
 181                 };
 182
 183                 PKA: pka@114000 {
 184                         device_type = "pka";
 185                         compatible = "ppc4xx-pka", "amcc,ppc4xx-pka", "amcc, ppc4xx-pka";
 186                         reg = <4 0x00114000 0x4000>;
 187                         interrupt-parent = <&UIC0>;
 188                         interrupts = <0x14 IRQ_TYPE_EDGE_RISING>;
 189                         status = "disabled";
 190                 };
 191
 192                 TRNG: trng@110000 {
 193                         device_type = "trng";
 194                         compatible = "amcc,ppc460ex-rng", "ppc4xx-rng", "amcc, ppc4xx-trng";
 195                         reg = <4 0x00110000 0x100>;
 196                         interrupt-parent = <&UIC1>;
 197                         interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
 198                         status = "disabled";
 199                 };
 200
 201                 MAL0: mcmal {
 202                         compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
 203                         descriptor-memory = "ocm";
 204                         dcr-reg = <0x180 0x062>;
 205                         num-tx-chans = <1>;
 206                         num-rx-chans = <1>;
 207                         #address-cells = <0>;
 208                         #size-cells = <0>;
 209                         interrupt-parent = <&UIC2>;
 210                         interrupts = <  0x06 IRQ_TYPE_LEVEL_HIGH /*TXEOB*/
 211                                         0x07 IRQ_TYPE_LEVEL_HIGH /*RXEOB*/
 212                                         0x03 IRQ_TYPE_LEVEL_HIGH /*SERR*/
 213                                         0x04 IRQ_TYPE_LEVEL_HIGH /*TXDE*/
 214                                         0x05 IRQ_TYPE_LEVEL_HIGH /*RXDE*/
 215                                         0x08 IRQ_TYPE_EDGE_FALLING /*TX0 COAL*/
 216                                       /*0x09 IRQ_TYPE_EDGE_FALLING   TX1 COAL*/
 217                                         0x0c IRQ_TYPE_EDGE_FALLING /*RX0 COAL*/
 218                                       /*0x0d IRQ_TYPE_EDGE_FALLING   RX1 COAL*/>;
 219                 };
 220
 221                 AHBDMA0: dma@bffd0800 {
 222                         compatible = "snps,dma-spear1340";
 223                         reg = <4 0xbffd0800 0x400>;
 224                         interrupt-parent = <&UIC0>;
 225                         interrupts = <0x19 IRQ_TYPE_LEVEL_HIGH>;
 226                         #dma-cells = <3>;
 227                         /* use autoconfiguration for the dma setup */
 228                 };
 229
 230                 SATA0: sata@bffd1000 {
 231                         compatible = "amcc,sata-460ex";
 232                         reg = <4 0xbffd1000 0x800>;
 233                         interrupt-parent = <&UIC0>;
 234                         interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
 235                         dmas = <&AHBDMA0 0 0 1>;
 236                         dma-names = "sata-dma";
 237                         status = "disabled";
 238                 };
 239
 240                 SATA1: sata@bffd1800 {
 241                         compatible = "amcc,sata-460ex";
 242                         reg = <4 0xbffd1800 0x800>;
 243                         interrupt-parent = <&UIC0>;
 244                         interrupts = <0x1b IRQ_TYPE_LEVEL_HIGH>;
 245                         dmas = <&AHBDMA0 1 0 2>;
 246                         dma-names = "sata-dma";
 247                         status = "disabled";
 248                 };
 249
 250                 USBOTG0: usbotg@bff80000 {
 251                         compatible = "amcc,dwc-otg";
 252                         reg = <4 0xbff80000 0x10000>;
 253                         interrupt-parent = <&USBOTG0>;
 254                         interrupts = <0 1 2>;
 255                         #interrupt-cells = <1>;
 256                         #address-cells = <0>;
 257                         #size-cells = <0>;
 258                         interrupt-map = <0 &UIC2 0x1c IRQ_TYPE_LEVEL_HIGH /* USB-OTG */
 259                                          1 &UIC1 0x1a IRQ_TYPE_LEVEL_LOW /* HIGH-POWER */
 260                                          2 &UIC0 0x0c IRQ_TYPE_LEVEL_HIGH /* DMA */>;
 261                         dr_mode = "host";
 262                         status = "disabled";
 263                 };
 264
 265                 POB0: opb {
 266                         compatible = "ibm,opb-460ex", "ibm,opb";
 267                         #address-cells = <1>;
 268                         #size-cells = <1>;
 269                         ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
 270                         clock-frequency = <0>; /* Filled in by U-Boot */
 271
 272                         EBC0: ebc {
 273                                 compatible = "ibm,ebc-460ex", "ibm,ebc";
 274                                 dcr-reg = <0x012 0x002>;
 275                                 #address-cells = <2>;
 276                                 #size-cells = <1>;
 277                                 clock-frequency = <0>; /* Filled in by U-Boot */
 278                                 /* ranges property is supplied by U-Boot */
 279                                 ranges = <0x00000003 0x00000000 0xe0000000 0x8000000>;
 280                                 interrupts = <0x06 IRQ_TYPE_LEVEL_HIGH>;
 281                                 interrupt-parent = <&UIC1>;
 282
 283                                 nor_flash@0,0 {
 284                                         compatible = "cfi-flash";
 285                                         bank-width = <1>;
 286                                         reg = <0x00000000 0x00000000 0x00100000>;
 287                                         #address-cells = <1>;
 288                                         #size-cells = <1>;
 289                                         status = "disabled";
 290                                 };
 291
 292                                 ndfc@1,0 {
 293                                         compatible = "ibm,ndfc";
 294                                         reg = <00000003 00000000 00002000>;
 295                                         ccr = <0x00001000>;
 296                                         bank-settings = <0x80002222>;
 297                                         #address-cells = <1>;
 298                                         #size-cells = <1>;
 299                                         status = "disabled";
 300
 301                                         nand {
 302                                                 #address-cells = <1>;
 303                                                 #size-cells = <1>;
 304                                         };
 305                                 };
 306                         };
 307
 308                         UART0: serial@ef600300 {
 309                                 /*
 310                                  * AMCC's BSP u-boot scans for the "ns16550"
 311                                  * compatible, without it, u-boot wouldn't
 312                                  * set the "clock-frequency" which is required.
 313                                  *
 314                                  * However, the hardware documentation lists:
 315                                  * "Register compatibility with 16750 register set"
 316                                  */
 317                                 compatible = "ns16750", "ns16550";
 318                                 reg = <0xef600300 0x00000008>;
 319                                 virtual-reg = <0xef600300>;
 320                                 clock-frequency = <0>; /* Filled in by U-Boot */
 321                                 interrupt-parent = <&UIC1>;
 322                                 interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
 323                                 status = "disabled";
 324                         };
 325
 326                         UART1: serial@ef600400 {
 327                                 /* same "ns16750" as with UART0 */
 328                                 compatible = "ns16750", "ns16550";
 329                                 reg = <0xef600400 0x00000008>;
 330                                 virtual-reg = <0xef600400>;
 331                                 clock-frequency = <0>; /* Filled in by U-Boot */
 332                                 interrupt-parent = <&UIC0>;
 333                                 interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
 334                                 status = "disabled";
 335                         };
 336
 337                         GPIO0: gpio@ef600b00 {
 338                                 compatible = "ibm,ppc4xx-gpio";
 339                                 reg = <0xef600b00 0x00000048>;
 340                                 #gpio-cells = <2>;
 341                                 gpio-controller;
 342                                 status = "disabled";
 343                         };
 344
 345                         IIC0: i2c@ef600700 {
 346                                 compatible = "ibm,iic-460ex", "ibm,iic";
 347                                 reg = <0xef600700 0x00000014>;
 348                                 interrupt-parent = <&UIC0>;
 349                                 interrupts = <0x02 IRQ_TYPE_LEVEL_HIGH>;
 350                                 #address-cells = <1>;
 351                                 #size-cells = <0>;
 352                                 status = "disabled";
 353                         };
 354
 355                         IIC1: i2c@ef600800 {
 356                                 compatible = "ibm,iic-460ex", "ibm,iic";
 357                                 reg = <0xef600800 0x00000014>;
 358                                 interrupt-parent = <&UIC0>;
 359                                 interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
 360                                 status = "disabled";
 361                         };
 362
 363                         RGMII0: emac-rgmii@ef601500 {
 364                                 compatible = "ibm,rgmii-405ex", "ibm,rgmii";
 365                                 reg = <0xef601500 0x00000008>;
 366                                 has-mdio;
 367                         };
 368
 369                         TAH0: emac-tah@ef601350 {
 370                                 compatible = "ibm,tah-460ex", "ibm,tah";
 371                                 reg = <0xef601350 0x00000030>;
 372                         };
 373
 374                         EMAC0: ethernet@ef600c00 {
 375                                 device_type = "network";
 376                                 compatible = "ibm,emac-apm821xx", "ibm,emac4sync";
 377                                 interrupt-parent = <&EMAC0>;
 378                                 interrupts = <0 1>;
 379                                 #interrupt-cells = <1>;
 380                                 #address-cells = <0>;
 381                                 #size-cells = <0>;
 382                                 interrupt-map = <0 &UIC2 0x10 IRQ_TYPE_LEVEL_HIGH /* Status */
 383                                                  1 &UIC2 0x14 IRQ_TYPE_LEVEL_HIGH /* Wake */>;
 384                                 reg = <0xef600c00 0x000000c4>;
 385                                 local-mac-address = [000000000000]; /* Filled in by U-Boot */
 386                                 mal-device = <&MAL0>;
 387                                 mal-tx-channel = <0>;
 388                                 mal-rx-channel = <0>;
 389                                 cell-index = <0>;
 390                                 max-frame-size = <9000>;
 391                                 rx-fifo-size = <16384>;
 392                                 tx-fifo-size = <2048>;
 393                                 fifo-entry-size = <10>;
 394                                 phy-mode = "rgmii";
 395                                 phy-map = <0x00000000>;
 396                                 rgmii-device = <&RGMII0>;
 397                                 rgmii-channel = <0>;
 398                                 tah-device = <&TAH0>;
 399                                 tah-channel = <0>;
 400                                 has-inverted-stacr-oc;
 401                                 has-new-stacr-staopc;
 402                                 status = "disabled";
 403                         };
 404                 };
 405
 406                 PCIE0: pciex@d00000000 {
 407                         device_type = "pci";
 408                         #interrupt-cells = <1>;
 409                         #size-cells = <2>;
 410                         #address-cells = <3>;
 411                         compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex";
 412                         primary;
 413                         port = <0x0>; /* port number */
 414                         reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
 415                                0x0000000c 0x08010000 0x00001000>;       /* Registers */
 416                         dcr-reg = <0x100 0x020>;
 417                         sdr-base = <0x300>;
 418
 419                         /* Outbound ranges, one memory and one IO,
 420                          * later cannot be changed
 421                          */
 422                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
 423                                   0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
 424                                   0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
 425
 426                         /* Inbound 2GB range starting at 0 */
 427                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
 428
 429                         /* This drives busses 0x40 to 0x7f */
 430                         bus-range = <0x40 0x7f>;
 431
 432                         /* Legacy interrupts (note the weird polarity, the bridge seems
 433                          * to invert PCIe legacy interrupts).
 434                          * We are de-swizzling here because the numbers are actually for
 435                          * port of the root complex virtual P2P bridge. But I want
 436                          * to avoid putting a node for it in the tree, so the numbers
 437                          * below are basically de-swizzled numbers.
 438                          * The real slot is on idsel 0, so the swizzling is 1:1
 439                          */
 440                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 441                         interrupt-map = <
 442                                 0x0 0x0 0x0 0x1 &UIC3 0x0c IRQ_TYPE_LEVEL_HIGH /* swizzled int A */
 443                                 0x0 0x0 0x0 0x2 &UIC3 0x0d IRQ_TYPE_LEVEL_HIGH /* swizzled int B */
 444                                 0x0 0x0 0x0 0x3 &UIC3 0x0e IRQ_TYPE_LEVEL_HIGH /* swizzled int C */
 445                                 0x0 0x0 0x0 0x4 &UIC3 0x0f IRQ_TYPE_LEVEL_HIGH /* swizzled int D */>;
 446                         status = "disabled";
 447                 };
 448
 449                 MSI: ppc4xx-msi@C10000000 {
 450                         compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
 451                         reg = < 0xC 0x10000000 0x100
 452                                 0xC 0x10000000 0x100>;
 453                         sdr-base = <0x36C>;
 454                         msi-data = <0x00004440>;
 455                         msi-mask = <0x0000ffe0>;
 456                         interrupts =<0 1 2 3 4 5 6 7>;
 457                         interrupt-parent = <&MSI>;
 458                         #interrupt-cells = <1>;
 459                         #address-cells = <0>;
 460                         #size-cells = <0>;
 461                         msi-available-ranges = <0x0 0x100>;
 462                         interrupt-map = <
 463                                 0 &UIC3 0x18 IRQ_TYPE_EDGE_RISING
 464                                 1 &UIC3 0x19 IRQ_TYPE_EDGE_RISING
 465                                 2 &UIC3 0x1a IRQ_TYPE_EDGE_RISING
 466                                 3 &UIC3 0x1b IRQ_TYPE_EDGE_RISING
 467                                 4 &UIC3 0x1c IRQ_TYPE_EDGE_RISING
 468                                 5 &UIC3 0x1d IRQ_TYPE_EDGE_RISING
 469                                 6 &UIC3 0x1e IRQ_TYPE_EDGE_RISING
 470                                 7 &UIC3 0x1f IRQ_TYPE_EDGE_RISING
 471                         >;
 472                         status = "disabled";
 473                 };
 474         };
 475 };