target/linux/apm821xx/dts/apm82181.dtsi

   1 /*
   2  * Device Tree for Bluestone (APM821xx) board.
   3  *
   4  * Copyright (c) 2010, Applied Micro Circuits Corporation
   5  * Author: Tirumala R Marri <tmarri@apm.com>
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  *
  22  */
  23
  24 #include <dt-bindings/input/input.h>
  25 #include <dt-bindings/interrupt-controller/irq.h>
  26 #include <dt-bindings/gpio/gpio.h>
  27
  28 / {
  29         #address-cells = <2>;
  30         #size-cells = <1>;
  31         dcr-parent = <&{/cpus/cpu@0}>;
  32         compatible = "apm,bluestone";
  33
  34         aliases {
  35                 ethernet0 = &EMAC0; /* needed for BSP u-boot */
  36         };
  37
  38         cpus {
  39                 #address-cells = <1>;
  40                 #size-cells = <0>;
  41
  42                 CPU00: cpu@0 {
  43                         device_type = "cpu";
  44                         model = "PowerPC,apm82181";
  45                         reg = <0x00000000>;
  46                         clock-frequency = <0>; /* Filled in by U-Boot */
  47                         timebase-frequency = <0>; /* Filled in by U-Boot */
  48                         i-cache-line-size = <32>;
  49                         d-cache-line-size = <32>;
  50                         i-cache-size = <32768>;
  51                         d-cache-size = <32768>;
  52                         dcr-controller;
  53                         dcr-access-method = "native";
  54                         next-level-cache = <&L2C0>;
  55                 };
  56         };
  57
  58         memory {
  59                 device_type = "memory";
  60                 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
  61         };
  62
  63         UIC0: interrupt-controller0 {
  64                 compatible = "apm,uic-apm82181", "ibm,uic";
  65                 interrupt-controller;
  66                 cell-index = <0>;
  67                 dcr-reg = <0x0c0 0x009>;
  68                 #address-cells = <0>;
  69                 #size-cells = <0>;
  70                 #interrupt-cells = <2>;
  71         };
  72
  73         UIC1: interrupt-controller1 {
  74                 compatible = "apm,uic-apm82181", "ibm,uic";
  75                 interrupt-controller;
  76                 cell-index = <1>;
  77                 dcr-reg = <0x0d0 0x009>;
  78                 #address-cells = <0>;
  79                 #size-cells = <0>;
  80                 #interrupt-cells = <2>;
  81                 interrupts = <0x1e IRQ_TYPE_LEVEL_HIGH>,
  82                              <0x1f IRQ_TYPE_LEVEL_HIGH>; /* cascade */
  83                 interrupt-parent = <&UIC0>;
  84         };
  85
  86         UIC2: interrupt-controller2 {
  87                 compatible = "apm,uic-apm82181", "ibm,uic";
  88                 interrupt-controller;
  89                 cell-index = <2>;
  90                 dcr-reg = <0x0e0 0x009>;
  91                 #address-cells = <0>;
  92                 #size-cells = <0>;
  93                 #interrupt-cells = <2>;
  94                 interrupts = <0x0a IRQ_TYPE_LEVEL_HIGH>,
  95                              <0x0b IRQ_TYPE_LEVEL_HIGH>; /* cascade */
  96                 interrupt-parent = <&UIC0>;
  97         };
  98
  99         UIC3: interrupt-controller3 {
 100                 compatible = "apm,uic-apm82181","ibm,uic";
 101                 interrupt-controller;
 102                 cell-index = <3>;
 103                 dcr-reg = <0x0f0 0x009>;
 104                 #address-cells = <0>;
 105                 #size-cells = <0>;
 106                 #interrupt-cells = <2>;
 107                 interrupts = <0x10 IRQ_TYPE_LEVEL_HIGH>,
 108                              <0x11 IRQ_TYPE_LEVEL_HIGH>; /* cascade */
 109                 interrupt-parent = <&UIC0>;
 110         };
 111
 112         OCM1: ocm@400040000 {
 113                 compatible = "apm,ocm-apm82181", "ibm,ocm";
 114                 status = "okay";
 115                 cell-index = <1>;
 116                 /* configured in U-Boot */
 117                 reg = <4 0x00040000 0x8000>; /* 32K */
 118         };
 119
 120         SDR0: sdr {
 121                 compatible = "apm,sdr-apm82181", "ibm,sdr-460ex";
 122                 dcr-reg = <0x00e 0x002>;
 123         };
 124
 125         CPR0: cpr {
 126                 compatible = "apm,cpr-apm82181", "ibm,cpr-460ex";
 127                 dcr-reg = <0x00c 0x002>;
 128         };
 129
 130         L2C0: l2c {
 131                 compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache";
 132                 dcr-reg = <0x020 0x008
 133                            0x030 0x008>;
 134                 cache-line-size = <32>;
 135                 cache-size = <262144>;
 136                 interrupt-parent = <&UIC1>;
 137                 interrupts = <0x0b IRQ_TYPE_EDGE_RISING>;
 138         };
 139
 140         CPM0: cpm {
 141                 compatible = "ibm,cpm-apm821xx", "ibm,cpm";
 142                 cell-index = <0>;
 143                 dcr-reg = <0x160 0x003>;
 144                 pm-cpu = <0x02000000>;
 145                 pm-doze = <0x302570F0>;
 146                 pm-nap = <0x302570F0>;
 147                 pm-deepsleep = <0x302570F0>;
 148                 pm-iic-device = <&IIC0>;
 149                 pm-emac-device = <&EMAC0>;
 150                 unused-units = <0x00000100>;
 151                 idle-doze = <0x02000000>;
 152                 standby = <0xfeff791d>;
 153         };
 154
 155         plb {
 156                 compatible = "apm,plb-apm82181", "ibm,plb-460ex", "ibm,plb4";
 157                 #address-cells = <2>;
 158                 #size-cells = <1>;
 159                 ranges; /* Filled in by U-Boot */
 160                 clock-frequency = <0>; /* Filled in by U-Boot */
 161
 162                 SDRAM0: sdram {
 163                         compatible = "apm,sdram-apm82181", "ibm,sdram-460ex", "ibm,sdram-405gp";
 164                         dcr-reg = <0x010 0x002>;
 165                 };
 166
 167                 RTC: rtc {
 168                         compatible = "ibm,rtc";
 169                         dcr-reg = <0x240 0x009>;
 170                         interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
 171                         interrupt-parent = <&UIC2>;
 172
 173                 };
 174
 175                 TRNG: trng@110000 {
 176                         compatible = "amcc,ppc460ex-rng", "ppc4xx-rng", "amcc, ppc4xx-trng";
 177                         reg = <4 0x00110000 0x100>;
 178                         interrupt-parent = <&UIC1>;
 179                         interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
 180                         status = "disabled";
 181                 };
 182
 183                 PKA: pka@114000 {
 184                         compatible = "ppc4xx-pka", "amcc,ppc4xx-pka", "amcc, ppc4xx-pka";
 185                         reg = <4 0x00114000 0x4000>;
 186                         interrupt-parent = <&UIC0>;
 187                         interrupts = <0x14 IRQ_TYPE_EDGE_RISING>;
 188                         status = "disabled";
 189                 };
 190
 191                 CRYPTO: crypto@180000 {
 192                         compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";
 193                         reg = <4 0x00180000 0x80400>;
 194                         interrupt-parent = <&UIC0>;
 195                         interrupts = <0x1d IRQ_TYPE_LEVEL_HIGH>;
 196                         status = "disabled"; /* hardware option */
 197                 };
 198
 199                 MAL0: mcmal {
 200                         compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
 201                         descriptor-memory = "ocm";
 202                         dcr-reg = <0x180 0x062>;
 203                         num-tx-chans = <1>;
 204                         num-rx-chans = <1>;
 205                         #address-cells = <0>;
 206                         #size-cells = <0>;
 207                         interrupt-parent = <&UIC2>;
 208                         interrupts = <0x06 IRQ_TYPE_LEVEL_HIGH>,
 209                                      <0x07 IRQ_TYPE_LEVEL_HIGH>,
 210                                      <0x03 IRQ_TYPE_LEVEL_HIGH>,
 211                                      <0x04 IRQ_TYPE_LEVEL_HIGH>,
 212                                      <0x05 IRQ_TYPE_LEVEL_HIGH>,
 213                                      <0x08 IRQ_TYPE_EDGE_FALLING>,
 214                                      <0x09 IRQ_TYPE_EDGE_FALLING>,
 215                                      <0x0c IRQ_TYPE_EDGE_FALLING>,
 216                                      <0x0d IRQ_TYPE_EDGE_FALLING>;
 217                         interrupt-names = "txeob", "rxeob", "serr",
 218                                           "txde", "rxde",
 219                                           "tx0coal", "tx1coal",
 220                                           "rx0coal", "rx1coal";
 221                 };
 222
 223                 POB0: opb {
 224                         compatible = "ibm,opb-460ex", "ibm,opb";
 225                         #address-cells = <1>;
 226                         #size-cells = <1>;
 227                         ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
 228                         clock-frequency = <0>; /* Filled in by U-Boot */
 229
 230                         EBC0: ebc {
 231                                 compatible = "ibm,ebc-460ex", "ibm,ebc";
 232                                 dcr-reg = <0x012 0x002>;
 233                                 #address-cells = <2>;
 234                                 #size-cells = <1>;
 235                                 clock-frequency = <0>; /* Filled in by U-Boot */
 236                                 /* ranges property is supplied by U-Boot */
 237                                 ranges = <0x00000003 0x00000000 0xe0000000 0x8000000>;
 238                                 interrupts = <0x06 IRQ_TYPE_LEVEL_HIGH>;
 239                                 interrupt-parent = <&UIC1>;
 240
 241                                 nor_flash@0,0 {
 242                                         compatible = "cfi-flash";
 243                                         bank-width = <1>;
 244                                         reg = <0x00000000 0x00000000 0x00100000>;
 245                                         #address-cells = <1>;
 246                                         #size-cells = <1>;
 247                                         status = "disabled";
 248                                 };
 249
 250                                 ndfc@1,0 {
 251                                         compatible = "ibm,ndfc";
 252                                         reg = <00000003 00000000 00002000>;
 253                                         ccr = <0x00001000>;
 254                                         bank-settings = <0x80002222>;
 255                                         #address-cells = <1>;
 256                                         #size-cells = <1>;
 257                                         status = "disabled";
 258
 259                                         nand {
 260                                                 #address-cells = <1>;
 261                                                 #size-cells = <1>;
 262                                         };
 263                                 };
 264                         };
 265
 266                         UART0: serial@ef600300 {
 267                                 /*
 268                                  * AMCC's BSP u-boot scans for the "ns16550"
 269                                  * compatible, without it, u-boot wouldn't
 270                                  * set the required "clock-frequency".
 271                                  *
 272                                  * The hardware documentation states:
 273                                  * "Register compatibility with 16750 register set"
 274                                  */
 275                                 compatible = "ns16750", "ns16550";
 276                                 reg = <0xef600300 0x00000008>;
 277                                 virtual-reg = <0xef600300>;
 278                                 clock-frequency = <0>; /* Filled in by U-Boot */
 279                                 interrupt-parent = <&UIC1>;
 280                                 interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
 281                                 status = "disabled";
 282                         };
 283
 284                         UART1: serial@ef600400 {
 285                                 /* same "ns16750" as with UART0 */
 286                                 compatible = "ns16750", "ns16550";
 287                                 reg = <0xef600400 0x00000008>;
 288                                 virtual-reg = <0xef600400>;
 289                                 clock-frequency = <0>; /* Filled in by U-Boot */
 290                                 interrupt-parent = <&UIC0>;
 291                                 interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
 292                                 status = "disabled";
 293                         };
 294
 295                         IIC0: i2c@ef600700 {
 296                                 compatible = "ibm,iic-460ex", "ibm,iic";
 297                                 reg = <0xef600700 0x00000014>;
 298                                 interrupt-parent = <&UIC0>;
 299                                 interrupts = <0x02 IRQ_TYPE_LEVEL_HIGH>;
 300                                 #address-cells = <1>;
 301                                 #size-cells = <0>;
 302                                 status = "disabled";
 303                         };
 304
 305                         IIC1: i2c@ef600800 {
 306                                 compatible = "ibm,iic-460ex", "ibm,iic";
 307                                 reg = <0xef600800 0x00000014>;
 308                                 interrupt-parent = <&UIC0>;
 309                                 interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
 310                                 status = "disabled";
 311                         };
 312
 313                         GPIO0: gpio@ef600b00 {
 314                                 compatible = "ibm,ppc4xx-gpio";
 315                                 reg = <0xef600b00 0x00000048>;
 316                                 #gpio-cells = <2>;
 317                                 gpio-controller;
 318                                 status = "disabled";
 319                         };
 320
 321                         EMAC0: ethernet@ef600c00 {
 322                                 device_type = "network";
 323                                 compatible = "ibm,emac-apm821xx", "ibm,emac4sync";
 324                                 interrupt-parent = <&EMAC0>;
 325                                 interrupts = <0 1>;
 326                                 #interrupt-cells = <1>;
 327                                 #address-cells = <0>;
 328                                 #size-cells = <0>;
 329                                 interrupt-map = <0 &UIC2 0x10 IRQ_TYPE_LEVEL_HIGH>,
 330                                                 <1 &UIC2 0x14 IRQ_TYPE_LEVEL_HIGH>;
 331                                 interrupt-names = "status", "wake";
 332
 333                                 reg = <0xef600c00 0x000000c4>;
 334                                 local-mac-address = [000000000000]; /* Filled in by U-Boot */
 335                                 mal-device = <&MAL0>;
 336                                 mal-tx-channel = <0>;
 337                                 mal-rx-channel = <0>;
 338                                 cell-index = <0>;
 339                                 max-frame-size = <9000>;
 340                                 rx-fifo-size = <16384>;
 341                                 tx-fifo-size = <2048>;
 342                                 phy-mode = "rgmii";
 343                                 phy-map = <0x00000000>;
 344                                 rgmii-device = <&RGMII0>;
 345                                 rgmii-channel = <0>;
 346                                 tah-device = <&TAH0>;
 347                                 tah-channel = <0>;
 348                                 has-inverted-stacr-oc;
 349                                 has-new-stacr-staopc;
 350                                 status = "disabled";
 351                         };
 352
 353                         TAH0: emac-tah@ef601350 {
 354                                 compatible = "ibm,tah-460ex", "ibm,tah";
 355                                 reg = <0xef601350 0x00000030>;
 356                         };
 357
 358                         RGMII0: emac-rgmii@ef601500 {
 359                                 compatible = "ibm,rgmii-405ex", "ibm,rgmii";
 360                                 reg = <0xef601500 0x00000008>;
 361                                 has-mdio;
 362                         };
 363                 };
 364
 365                 USBOTG0: usbotg@bff80000 {
 366                         compatible = "amcc,dwc-otg";
 367                         reg = <4 0xbff80000 0x10000>;
 368                         interrupt-parent = <&USBOTG0>;
 369                         interrupts = <0 1 2>;
 370                         #interrupt-cells = <1>;
 371                         #address-cells = <0>;
 372                         #size-cells = <0>;
 373                         interrupt-map = <0 &UIC2 0x1c IRQ_TYPE_LEVEL_HIGH>,
 374                                         <1 &UIC1 0x1a IRQ_TYPE_LEVEL_LOW>,
 375                                         <2 &UIC0 0x0c IRQ_TYPE_LEVEL_HIGH>;
 376                         interrupt-names = "usb-otg", "high-power", "dma";
 377                         dr_mode = "host";
 378                         status = "disabled";
 379                 };
 380
 381                 AHBDMA0: dma@bffd0800 {
 382                         compatible = "snps,dma-spear1340";
 383                         reg = <4 0xbffd0800 0x400>;
 384                         interrupt-parent = <&UIC0>;
 385                         interrupts = <0x19 IRQ_TYPE_LEVEL_HIGH>;
 386                         #dma-cells = <3>;
 387                         /* use autoconfiguration for the dma setup */
 388                 };
 389
 390                 SATA0: sata@bffd1000 {
 391                         compatible = "amcc,sata-460ex";
 392                         reg = <4 0xbffd1000 0x800>;
 393                         interrupt-parent = <&UIC0>;
 394                         interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
 395                         dmas = <&AHBDMA0 0 0 1>;
 396                         dma-names = "sata-dma";
 397                         status = "disabled";
 398                 };
 399
 400                 SATA1: sata@bffd1800 {
 401                         compatible = "amcc,sata-460ex";
 402                         reg = <4 0xbffd1800 0x800>;
 403                         interrupt-parent = <&UIC0>;
 404                         interrupts = <0x1b IRQ_TYPE_LEVEL_HIGH>;
 405                         dmas = <&AHBDMA0 1 0 2>;
 406                         dma-names = "sata-dma";
 407                         status = "disabled";
 408                 };
 409
 410                 MSI: ppc4xx-msi@c10000000 {
 411                         compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
 412                         reg = <0xc 0x10000000 0x100
 413                                0xc 0x10000000 0x100>;
 414                         sdr-base = <0x36C>;
 415                         msi-data = <0x00004440>;
 416                         msi-mask = <0x0000ffe0>;
 417                         interrupts =<0 1 2 3 4 5 6 7>;
 418                         interrupt-parent = <&MSI>;
 419                         #interrupt-cells = <1>;
 420                         #address-cells = <0>;
 421                         #size-cells = <0>;
 422                         msi-available-ranges = <0x0 0x100>;
 423                         interrupt-map =
 424                                 <0 &UIC3 0x18 IRQ_TYPE_EDGE_RISING>,
 425                                 <1 &UIC3 0x19 IRQ_TYPE_EDGE_RISING>,
 426                                 <2 &UIC3 0x1a IRQ_TYPE_EDGE_RISING>,
 427                                 <3 &UIC3 0x1b IRQ_TYPE_EDGE_RISING>,
 428                                 <4 &UIC3 0x1c IRQ_TYPE_EDGE_RISING>,
 429                                 <5 &UIC3 0x1d IRQ_TYPE_EDGE_RISING>,
 430                                 <6 &UIC3 0x1e IRQ_TYPE_EDGE_RISING>,
 431                                 <7 &UIC3 0x1f IRQ_TYPE_EDGE_RISING>;
 432                         status = "disabled";
 433                 };
 434
 435                 PCIE0: pciex@d00000000 {
 436                         device_type = "pci"; /* see ppc4xx_pci_find_bridge */
 437                         #interrupt-cells = <1>;
 438                         #size-cells = <2>;
 439                         #address-cells = <3>;
 440                         compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex";
 441                         primary;
 442                         port = <0x0>; /* port number */
 443                         reg = <0x0000000d 0x00000000 0x20000000>, /* Config space access */
 444                               <0x0000000c 0x08010000 0x00001000>; /* Registers */
 445                         dcr-reg = <0x100 0x020>;
 446                         sdr-base = <0x300>;
 447
 448                         /* Outbound ranges, one memory and one IO,
 449                          * later cannot be changed
 450                          */
 451                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000>,
 452                                  <0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000>,
 453                                  <0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
 454
 455                         /* Inbound 2GB range starting at 0 */
 456                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
 457
 458                         /* This drives busses 0x40 to 0x7f */
 459                         bus-range = <0x40 0x7f>;
 460
 461                         /* Legacy interrupts (note the weird polarity, the bridge seems
 462                          * to invert PCIe legacy interrupts).
 463                          * We are de-swizzling here because the numbers are actually for
 464                          * port of the root complex virtual P2P bridge. But I want
 465                          * to avoid putting a node for it in the tree, so the numbers
 466                          * below are basically de-swizzled numbers.
 467                          * The real slot is on idsel 0, so the swizzling is 1:1
 468                          */
 469                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 470                         interrupt-map =
 471                                 <0x0 0x0 0x0 0x1 &UIC3 0x0c IRQ_TYPE_LEVEL_HIGH>, /* swizzled int A */
 472                                 <0x0 0x0 0x0 0x2 &UIC3 0x0d IRQ_TYPE_LEVEL_HIGH>, /* swizzled int B */
 473                                 <0x0 0x0 0x0 0x3 &UIC3 0x0e IRQ_TYPE_LEVEL_HIGH>, /* swizzled int C */
 474                                 <0x0 0x0 0x0 0x4 &UIC3 0x0f IRQ_TYPE_LEVEL_HIGH>; /* swizzled int D */
 475                         status = "disabled";
 476                 };
 477         };
 478 };