target/linux/ar7/files/arch/mips/ar7/platform.c

   1 /*
   2  * $Id$
   3  *
   4  * Copyright (C) 2006, 2007 OpenWrt.org
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  */
  20
  21 #include <linux/autoconf.h>
  22 #include <linux/init.h>
  23 #include <linux/types.h>
  24 #include <linux/module.h>
  25 #include <linux/delay.h>
  26 #include <linux/platform_device.h>
  27 #include <linux/mtd/physmap.h>
  28 #include <linux/serial.h>
  29 #include <linux/serial_8250.h>
  30 #include <linux/ioport.h>
  31 #include <asm/addrspace.h>
  32 #include <asm/io.h>
  33 #include <asm/ar7/ar7.h>
  34 #include <asm/ar7/gpio.h>
  35 #include <asm/ar7/prom.h>
  36 #include <asm/ar7/vlynq.h>
  37
  38 struct plat_vlynq_data {
  39         struct plat_vlynq_ops ops;
  40         int gpio_bit;
  41         int reset_bit;
  42 };
  43
  44
  45 static int vlynq_on(struct vlynq_device *dev)
  46 {
  47         int result;
  48         struct plat_vlynq_data *pdata = dev->dev.platform_data;
  49
  50         if ((result = gpio_request(pdata->gpio_bit, "vlynq")))
  51                 goto out;
  52
  53         ar7_device_reset(pdata->reset_bit);
  54
  55         if ((result = ar7_gpio_disable(pdata->gpio_bit)))
  56                 goto out_enabled;
  57
  58         if ((result = ar7_gpio_enable(pdata->gpio_bit)))
  59                 goto out_enabled;
  60
  61         if ((result = gpio_direction_output(pdata->gpio_bit)))
  62                 goto out_gpio_enabled;
  63
  64         gpio_set_value(pdata->gpio_bit, 0);
  65         mdelay(50);
  66
  67         gpio_set_value(pdata->gpio_bit, 1);
  68         mdelay(50);
  69
  70         return 0;
  71
  72 out_gpio_enabled:
  73         ar7_gpio_disable(pdata->gpio_bit);
  74 out_enabled:
  75         ar7_device_disable(pdata->reset_bit);
  76         gpio_free(pdata->gpio_bit);
  77 out:
  78         return result;
  79 }
  80
  81 static void vlynq_off(struct vlynq_device *dev)
  82 {
  83         struct plat_vlynq_data *pdata = dev->dev.platform_data;
  84         ar7_gpio_disable(pdata->gpio_bit);
  85         gpio_free(pdata->gpio_bit);
  86         ar7_device_disable(pdata->reset_bit);
  87 }
  88
  89 static struct resource physmap_flash_resource = {
  90         .name = "mem",
  91         .flags = IORESOURCE_MEM,
  92         .start = 0x10000000,
  93         .end = 0x107fffff,
  94 };
  95
  96 static struct resource cpmac_low_res[] = {
  97         {
  98                 .name = "regs",
  99                 .flags = IORESOURCE_MEM,
 100                 .start = AR7_REGS_MAC0,
 101                 .end = AR7_REGS_MAC0 + 0x7FF,
 102         },
 103         {
 104                 .name = "irq",
 105                 .flags = IORESOURCE_IRQ,
 106                 .start = 27,
 107                 .end = 27,
 108         },
 109 };
 110
 111 static struct resource cpmac_high_res[] = {
 112         {
 113                 .name = "regs",
 114                 .flags = IORESOURCE_MEM,
 115                 .start = AR7_REGS_MAC1,
 116                 .end = AR7_REGS_MAC1 + 0x7FF,
 117         },
 118         {
 119                 .name = "irq",
 120                 .flags = IORESOURCE_IRQ,
 121                 .start = 41,
 122                 .end = 41,
 123         },
 124 };
 125
 126 static struct resource vlynq_low_res[] = {
 127         {
 128                 .name = "regs",
 129                 .flags = IORESOURCE_MEM,
 130                 .start = AR7_REGS_VLYNQ0,
 131                 .end = AR7_REGS_VLYNQ0 + 0xff,
 132         },
 133         {
 134                 .name = "irq",
 135                 .flags = IORESOURCE_IRQ,
 136                 .start = 29,
 137                 .end = 29,
 138         },
 139         {
 140                 .name = "mem",
 141                 .flags = IORESOURCE_MEM,
 142                 .start = 0x04000000,
 143                 .end = 0x04ffffff,
 144         },
 145         {
 146                 .name = "devirq",
 147                 .flags = IORESOURCE_IRQ,
 148                 .start = 80,
 149                 .end = 111,
 150         },
 151 };
 152
 153 static struct resource vlynq_high_res[] = {
 154         {
 155                 .name = "regs",
 156                 .flags = IORESOURCE_MEM,
 157                 .start = AR7_REGS_VLYNQ1,
 158                 .end = AR7_REGS_VLYNQ1 + 0xFF,
 159         },
 160         {
 161                 .name = "irq",
 162                 .flags = IORESOURCE_IRQ,
 163                 .start = 33,
 164                 .end = 33,
 165         },
 166         {
 167                 .name = "mem",
 168                 .flags = IORESOURCE_MEM,
 169                 .start = 0x0c000000,
 170                 .end = 0x0cffffff,
 171         },
 172         {
 173                 .name = "devirq",
 174                 .flags = IORESOURCE_IRQ,
 175                 .start = 112,
 176                 .end = 143,
 177         },
 178 };
 179
 180 static struct physmap_flash_data physmap_flash_data = {
 181         .width = 2,
 182 };
 183
 184 static struct plat_cpmac_data cpmac_low_data = {
 185         .reset_bit = 17,
 186         .power_bit = 20,
 187         .phy_mask = 0x80000000,
 188 };
 189
 190 static struct plat_cpmac_data cpmac_high_data = {
 191         .reset_bit = 21,
 192         .power_bit = 22,
 193         .phy_mask = 0x7fffffff,
 194 };
 195
 196 static struct plat_vlynq_data vlynq_low_data = {
 197         .ops.on = vlynq_on,
 198         .ops.off = vlynq_off,
 199         .reset_bit = 20,
 200         .gpio_bit = 18,
 201 };
 202
 203 static struct plat_vlynq_data vlynq_high_data = {
 204         .ops.on = vlynq_on,
 205         .ops.off = vlynq_off,
 206         .reset_bit = 16,
 207         .gpio_bit = 19,
 208 };
 209
 210 static struct platform_device physmap_flash = {
 211         .id = 0,
 212         .name = "physmap-flash",
 213         .dev.platform_data = &physmap_flash_data,
 214         .resource = &physmap_flash_resource,
 215         .num_resources = 1,
 216 };
 217
 218 static struct platform_device cpmac_low = {
 219         .id = 0,
 220         .name = "cpmac",
 221         .dev.platform_data = &cpmac_low_data,
 222         .resource = cpmac_low_res,
 223         .num_resources = ARRAY_SIZE(cpmac_low_res),
 224 };
 225
 226 static struct platform_device cpmac_high = {
 227         .id = 1,
 228         .name = "cpmac",
 229         .dev.platform_data = &cpmac_high_data,
 230         .resource = cpmac_high_res,
 231         .num_resources = ARRAY_SIZE(cpmac_high_res),
 232 };
 233
 234 static struct platform_device vlynq_low = {
 235         .id = 0,
 236         .name = "vlynq",
 237         .dev.platform_data = &vlynq_low_data,
 238         .resource = vlynq_low_res,
 239         .num_resources = ARRAY_SIZE(vlynq_low_res),
 240 };
 241
 242 static struct platform_device vlynq_high = {
 243         .id = 1,
 244         .name = "vlynq",
 245         .dev.platform_data = &vlynq_high_data,
 246         .resource = vlynq_high_res,
 247         .num_resources = ARRAY_SIZE(vlynq_high_res),
 248 };
 249
 250
 251 /* This is proper way to define uart ports, but they are then detected
 252  * as xscale and, obviously, don't work...
 253  */
 254 #if !defined(CONFIG_SERIAL_8250)
 255
 256 static struct plat_serial8250_port uart0_data =
 257 {
 258         .mapbase = AR7_REGS_UART0,
 259         .irq = AR7_IRQ_UART0,
 260         .regshift = 2,
 261         .iotype = UPIO_MEM,
 262         .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 263 };
 264
 265 static struct plat_serial8250_port uart1_data =
 266 {
 267         .mapbase = UR8_REGS_UART1,
 268         .irq = AR7_IRQ_UART1,
 269         .regshift = 2,
 270         .iotype = UPIO_MEM,
 271         .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 272 };
 273
 274 static struct plat_serial8250_port uart_data[] = {
 275     uart0_data,
 276     uart1_data,
 277         { .flags = 0 }
 278 };
 279
 280 static struct plat_serial8250_port uart_data_single[] = {
 281     uart0_data,
 282         { .flags = 0 }
 283 };
 284
 285 static struct platform_device uart = {
 286         .id = 0,
 287         .name = "serial8250",
 288         .dev.platform_data = uart_data_single
 289 };
 290 #endif
 291
 292 static inline unsigned char char2hex(char h)
 293 {
 294         switch (h) {
 295         case '0': case '1': case '2': case '3': case '4':
 296         case '5': case '6': case '7': case '8': case '9':
 297                 return h - '0';
 298         case 'A': case 'B': case 'C': case 'D': case 'E': case 'F':
 299                 return h - 'A' + 10;
 300         case 'a': case 'b': case 'c': case 'd': case 'e': case 'f':
 301                 return h - 'a' + 10;
 302         default:
 303                 return 0;
 304         }
 305 }
 306
 307 static void cpmac_get_mac(int instance, unsigned char *dev_addr)
 308 {
 309         int i;
 310         char name[5], default_mac[] = "00:00:00:12:34:56", *mac;
 311
 312         mac = NULL;
 313         sprintf(name, "mac%c", 'a' + instance);
 314         mac = prom_getenv(name);
 315         if (!mac) {
 316                 sprintf(name, "mac%c", 'a');
 317                 mac = prom_getenv(name);
 318         }
 319         if (!mac)
 320                 mac = default_mac;
 321         for (i = 0; i < 6; i++)
 322                 dev_addr[i] = (char2hex(mac[i * 3]) << 4) +
 323                         char2hex(mac[i * 3 + 1]);
 324 }
 325
 326 static int __init ar7_register_devices(void)
 327 {
 328         int res;
 329
 330 #ifdef CONFIG_SERIAL_8250
 331
 332         static struct uart_port uart_port[2];
 333
 334         memset(uart_port, 0, sizeof(struct uart_port) * 2);
 335
 336         uart_port[0].type = PORT_AR7;
 337         uart_port[0].line = 0;
 338         uart_port[0].irq = AR7_IRQ_UART0;
 339         uart_port[0].uartclk = ar7_bus_freq() / 2;
 340         uart_port[0].iotype = UPIO_MEM;
 341         uart_port[0].mapbase = AR7_REGS_UART0;
 342         uart_port[0].membase = ioremap(uart_port[0].mapbase, 256);
 343         uart_port[0].regshift = 2;
 344         res = early_serial_setup(&uart_port[0]);
 345         if (res)
 346                 return res;
 347
 348
 349     // Only TNETD73xx have a second serial port
 350     if (ar7_has_second_uart()) {
 351         uart_port[1].type = PORT_AR7;
 352         uart_port[1].line = 1;
 353         uart_port[1].irq = AR7_IRQ_UART1;
 354         uart_port[1].uartclk = ar7_bus_freq() / 2;
 355         uart_port[1].iotype = UPIO_MEM;
 356         uart_port[1].mapbase = UR8_REGS_UART1;
 357         uart_port[1].membase = ioremap(uart_port[1].mapbase, 256);
 358         uart_port[1].regshift = 2;
 359         res = early_serial_setup(&uart_port[1]);
 360         if (res)
 361                 return res;
 362     }
 363
 364 #else // !CONFIG_SERIAL_8250
 365
 366         uart_data[0].uartclk = ar7_bus_freq() / 2;
 367         uart_data[1].uartclk = uart_data[0].uartclk;
 368
 369     // Only TNETD73xx have a second serial port
 370     if (ar7_has_second_uart()) {
 371         uart.dev.platform_data = uart_data;
 372     }
 373
 374         res = platform_device_register(&uart);
 375         if (res)
 376                 return res;
 377
 378 #endif // CONFIG_SERIAL_8250
 379
 380         res = platform_device_register(&physmap_flash);
 381         if (res)
 382                 return res;
 383
 384         res = platform_device_register(&vlynq_low);
 385         if (res)
 386                 return res;
 387
 388         ar7_device_disable(vlynq_low_data.reset_bit);
 389         if (ar7_has_high_vlynq()) {
 390                 ar7_device_disable(vlynq_high_data.reset_bit);
 391                 res = platform_device_register(&vlynq_high);
 392                 if (res)
 393                         return res;
 394         }
 395
 396         if (ar7_has_high_cpmac()) {
 397                 cpmac_get_mac(1, cpmac_high_data.dev_addr);
 398                 res = platform_device_register(&cpmac_high);
 399                 if (res)
 400                         return res;
 401         } else {
 402                 cpmac_low_data.phy_mask = 0xffffffff;
 403         }
 404
 405         cpmac_get_mac(0, cpmac_low_data.dev_addr);
 406         res = platform_device_register(&cpmac_low);
 407
 408         return res;
 409 }
 410
 411
 412 arch_initcall(ar7_register_devices);