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ar71xx: add support for external mii_bus
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ar71xx / devices.c
1 /*
2 * Atheros AR71xx SoC platform devices
3 *
4 * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * Parts of this file are based on Atheros' 2.6.15 BSP
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/etherdevice.h>
19 #include <linux/platform_device.h>
20 #include <linux/serial_8250.h>
21 #include <linux/ath9k_platform.h>
22
23 #include <asm/mach-ar71xx/ar71xx.h>
24
25 #include "devices.h"
26
27 static u8 ar71xx_mac_base[ETH_ALEN] __initdata;
28
29 /*
30 * OHCI (USB full speed host controller)
31 */
32 static struct resource ar71xx_ohci_resources[] = {
33 [0] = {
34 .start = AR71XX_OHCI_BASE,
35 .end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1,
36 .flags = IORESOURCE_MEM,
37 },
38 [1] = {
39 .start = AR71XX_MISC_IRQ_OHCI,
40 .end = AR71XX_MISC_IRQ_OHCI,
41 .flags = IORESOURCE_IRQ,
42 },
43 };
44
45 static struct resource ar7240_ohci_resources[] = {
46 [0] = {
47 .start = AR7240_OHCI_BASE,
48 .end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1,
49 .flags = IORESOURCE_MEM,
50 },
51 [1] = {
52 .start = AR71XX_CPU_IRQ_USB,
53 .end = AR71XX_CPU_IRQ_USB,
54 .flags = IORESOURCE_IRQ,
55 },
56 };
57
58 static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
59 static struct platform_device ar71xx_ohci_device = {
60 .name = "ar71xx-ohci",
61 .id = -1,
62 .resource = ar71xx_ohci_resources,
63 .num_resources = ARRAY_SIZE(ar71xx_ohci_resources),
64 .dev = {
65 .dma_mask = &ar71xx_ohci_dmamask,
66 .coherent_dma_mask = DMA_BIT_MASK(32),
67 },
68 };
69
70 /*
71 * EHCI (USB full speed host controller)
72 */
73 static struct resource ar71xx_ehci_resources[] = {
74 [0] = {
75 .start = AR71XX_EHCI_BASE,
76 .end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1,
77 .flags = IORESOURCE_MEM,
78 },
79 [1] = {
80 .start = AR71XX_CPU_IRQ_USB,
81 .end = AR71XX_CPU_IRQ_USB,
82 .flags = IORESOURCE_IRQ,
83 },
84 };
85
86
87 static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32);
88 static struct ar71xx_ehci_platform_data ar71xx_ehci_data;
89
90 static struct platform_device ar71xx_ehci_device = {
91 .name = "ar71xx-ehci",
92 .id = -1,
93 .resource = ar71xx_ehci_resources,
94 .num_resources = ARRAY_SIZE(ar71xx_ehci_resources),
95 .dev = {
96 .dma_mask = &ar71xx_ehci_dmamask,
97 .coherent_dma_mask = DMA_BIT_MASK(32),
98 .platform_data = &ar71xx_ehci_data,
99 },
100 };
101
102 #define AR71XX_USB_RESET_MASK \
103 (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
104 | RESET_MODULE_USB_OHCI_DLL)
105
106 #define AR7240_USB_RESET_MASK \
107 (RESET_MODULE_USB_HOST | RESET_MODULE_USB_OHCI_DLL_7240)
108
109 static void __init ar71xx_usb_setup(void)
110 {
111 ar71xx_device_stop(AR71XX_USB_RESET_MASK);
112 mdelay(1000);
113 ar71xx_device_start(AR71XX_USB_RESET_MASK);
114
115 /* Turning on the Buff and Desc swap bits */
116 ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000);
117
118 /* WAR for HW bug. Here it adjusts the duration between two SOFS */
119 ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00);
120
121 mdelay(900);
122 }
123
124 static void __init ar7240_usb_setup(void)
125 {
126 ar71xx_ohci_device.resource = ar7240_ohci_resources;
127
128 ar71xx_device_stop(AR7240_USB_RESET_MASK);
129 mdelay(1000);
130 ar71xx_device_start(AR7240_USB_RESET_MASK);
131
132 /* WAR for HW bug. Here it adjusts the duration between two SOFS */
133 ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x3);
134 }
135
136 static void __init ar91xx_usb_setup(void)
137 {
138 ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE);
139 mdelay(10);
140
141 ar71xx_device_start(RESET_MODULE_USB_HOST);
142 mdelay(10);
143
144 ar71xx_device_start(RESET_MODULE_USB_PHY);
145 mdelay(10);
146 }
147
148 void __init ar71xx_add_device_usb(void)
149 {
150 switch (ar71xx_soc) {
151 case AR71XX_SOC_AR7240:
152 ar7240_usb_setup();
153 platform_device_register(&ar71xx_ohci_device);
154 break;
155
156 case AR71XX_SOC_AR7130:
157 case AR71XX_SOC_AR7141:
158 case AR71XX_SOC_AR7161:
159 ar71xx_usb_setup();
160 platform_device_register(&ar71xx_ohci_device);
161 platform_device_register(&ar71xx_ehci_device);
162 break;
163
164 case AR71XX_SOC_AR9130:
165 case AR71XX_SOC_AR9132:
166 ar91xx_usb_setup();
167 ar71xx_ehci_data.is_ar91xx = 1;
168 platform_device_register(&ar71xx_ehci_device);
169 break;
170
171 default:
172 BUG();
173 }
174 }
175
176 static struct resource ar71xx_uart_resources[] = {
177 {
178 .start = AR71XX_UART_BASE,
179 .end = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
180 .flags = IORESOURCE_MEM,
181 },
182 };
183
184 #define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
185 static struct plat_serial8250_port ar71xx_uart_data[] = {
186 {
187 .mapbase = AR71XX_UART_BASE,
188 .irq = AR71XX_MISC_IRQ_UART,
189 .flags = AR71XX_UART_FLAGS,
190 .iotype = UPIO_MEM32,
191 .regshift = 2,
192 }, {
193 /* terminating entry */
194 }
195 };
196
197 static struct platform_device ar71xx_uart_device = {
198 .name = "serial8250",
199 .id = PLAT8250_DEV_PLATFORM,
200 .resource = ar71xx_uart_resources,
201 .num_resources = ARRAY_SIZE(ar71xx_uart_resources),
202 .dev = {
203 .platform_data = ar71xx_uart_data
204 },
205 };
206
207 void __init ar71xx_add_device_uart(void)
208 {
209 ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
210 platform_device_register(&ar71xx_uart_device);
211 }
212
213 static struct resource ar71xx_mdio_resources[] = {
214 {
215 .name = "mdio_base",
216 .flags = IORESOURCE_MEM,
217 .start = AR71XX_GE0_BASE,
218 .end = AR71XX_GE0_BASE + 0x200 - 1,
219 }
220 };
221
222 static struct ag71xx_mdio_platform_data ar71xx_mdio_data;
223
224 static struct platform_device ar71xx_mdio_device = {
225 .name = "ag71xx-mdio",
226 .id = -1,
227 .resource = ar71xx_mdio_resources,
228 .num_resources = ARRAY_SIZE(ar71xx_mdio_resources),
229 .dev = {
230 .platform_data = &ar71xx_mdio_data,
231 },
232 };
233
234 void __init ar71xx_add_device_mdio(u32 phy_mask)
235 {
236 if (ar71xx_soc == AR71XX_SOC_AR7240)
237 ar71xx_mdio_data.is_ar7240 = 1;
238
239 ar71xx_mdio_data.phy_mask = phy_mask;
240
241 platform_device_register(&ar71xx_mdio_device);
242 }
243
244 static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift)
245 {
246 void __iomem *base;
247 u32 t;
248
249 base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE);
250
251 t = __raw_readl(base + cfg_reg);
252 t &= ~(3 << shift);
253 t |= (2 << shift);
254 __raw_writel(t, base + cfg_reg);
255 udelay(100);
256
257 __raw_writel(pll_val, base + pll_reg);
258
259 t |= (3 << shift);
260 __raw_writel(t, base + cfg_reg);
261 udelay(100);
262
263 t &= ~(3 << shift);
264 __raw_writel(t, base + cfg_reg);
265 udelay(100);
266
267 printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n",
268 (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg));
269
270 iounmap(base);
271 }
272
273 struct ar71xx_eth_pll_data ar71xx_eth0_pll_data;
274 struct ar71xx_eth_pll_data ar71xx_eth1_pll_data;
275
276 static u32 ar71xx_get_eth_pll(unsigned int mac, int speed)
277 {
278 struct ar71xx_eth_pll_data *pll_data;
279 u32 pll_val;
280
281 switch (mac) {
282 case 0:
283 pll_data = &ar71xx_eth0_pll_data;
284 break;
285 case 1:
286 pll_data = &ar71xx_eth1_pll_data;
287 break;
288 default:
289 BUG();
290 }
291
292 switch (speed) {
293 case SPEED_10:
294 pll_val = pll_data->pll_10;
295 break;
296 case SPEED_100:
297 pll_val = pll_data->pll_100;
298 break;
299 case SPEED_1000:
300 pll_val = pll_data->pll_1000;
301 break;
302 default:
303 BUG();
304 }
305
306 return pll_val;
307 }
308
309 static void ar71xx_set_pll_ge0(int speed)
310 {
311 u32 val = ar71xx_get_eth_pll(0, speed);
312
313 ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK,
314 val, AR71XX_ETH0_PLL_SHIFT);
315 }
316
317 static void ar71xx_set_pll_ge1(int speed)
318 {
319 u32 val = ar71xx_get_eth_pll(1, speed);
320
321 ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK,
322 val, AR71XX_ETH1_PLL_SHIFT);
323 }
324
325 static void ar724x_set_pll_ge0(int speed)
326 {
327 /* TODO */
328 }
329
330 static void ar724x_set_pll_ge1(int speed)
331 {
332 /* TODO */
333 }
334
335 static void ar91xx_set_pll_ge0(int speed)
336 {
337 u32 val = ar71xx_get_eth_pll(0, speed);
338
339 ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH0_INT_CLOCK,
340 val, AR91XX_ETH0_PLL_SHIFT);
341 }
342
343 static void ar91xx_set_pll_ge1(int speed)
344 {
345 u32 val = ar71xx_get_eth_pll(1, speed);
346
347 ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH1_INT_CLOCK,
348 val, AR91XX_ETH1_PLL_SHIFT);
349 }
350
351 static void ar71xx_ddr_flush_ge0(void)
352 {
353 ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0);
354 }
355
356 static void ar71xx_ddr_flush_ge1(void)
357 {
358 ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE1);
359 }
360
361 static void ar724x_ddr_flush_ge0(void)
362 {
363 ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0);
364 }
365
366 static void ar724x_ddr_flush_ge1(void)
367 {
368 ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE1);
369 }
370
371 static void ar91xx_ddr_flush_ge0(void)
372 {
373 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
374 }
375
376 static void ar91xx_ddr_flush_ge1(void)
377 {
378 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
379 }
380
381 static struct resource ar71xx_eth0_resources[] = {
382 {
383 .name = "mac_base",
384 .flags = IORESOURCE_MEM,
385 .start = AR71XX_GE0_BASE,
386 .end = AR71XX_GE0_BASE + 0x200 - 1,
387 }, {
388 .name = "mii_ctrl",
389 .flags = IORESOURCE_MEM,
390 .start = AR71XX_MII_BASE + MII_REG_MII0_CTRL,
391 .end = AR71XX_MII_BASE + MII_REG_MII0_CTRL + 3,
392 }, {
393 .name = "mac_irq",
394 .flags = IORESOURCE_IRQ,
395 .start = AR71XX_CPU_IRQ_GE0,
396 .end = AR71XX_CPU_IRQ_GE0,
397 },
398 };
399
400 struct ag71xx_platform_data ar71xx_eth0_data = {
401 .reset_bit = RESET_MODULE_GE0_MAC,
402 };
403
404 static struct platform_device ar71xx_eth0_device = {
405 .name = "ag71xx",
406 .id = 0,
407 .resource = ar71xx_eth0_resources,
408 .num_resources = ARRAY_SIZE(ar71xx_eth0_resources),
409 .dev = {
410 .platform_data = &ar71xx_eth0_data,
411 },
412 };
413
414 static struct resource ar71xx_eth1_resources[] = {
415 {
416 .name = "mac_base",
417 .flags = IORESOURCE_MEM,
418 .start = AR71XX_GE1_BASE,
419 .end = AR71XX_GE1_BASE + 0x200 - 1,
420 }, {
421 .name = "mii_ctrl",
422 .flags = IORESOURCE_MEM,
423 .start = AR71XX_MII_BASE + MII_REG_MII1_CTRL,
424 .end = AR71XX_MII_BASE + MII_REG_MII1_CTRL + 3,
425 }, {
426 .name = "mac_irq",
427 .flags = IORESOURCE_IRQ,
428 .start = AR71XX_CPU_IRQ_GE1,
429 .end = AR71XX_CPU_IRQ_GE1,
430 },
431 };
432
433 struct ag71xx_platform_data ar71xx_eth1_data = {
434 .reset_bit = RESET_MODULE_GE1_MAC,
435 };
436
437 static struct platform_device ar71xx_eth1_device = {
438 .name = "ag71xx",
439 .id = 1,
440 .resource = ar71xx_eth1_resources,
441 .num_resources = ARRAY_SIZE(ar71xx_eth1_resources),
442 .dev = {
443 .platform_data = &ar71xx_eth1_data,
444 },
445 };
446
447 #define AR71XX_PLL_VAL_1000 0x00110000
448 #define AR71XX_PLL_VAL_100 0x00001099
449 #define AR71XX_PLL_VAL_10 0x00991099
450
451 #define AR724X_PLL_VAL_1000 0x00110000
452 #define AR724X_PLL_VAL_100 0x00001099
453 #define AR724X_PLL_VAL_10 0x00991099
454
455 #define AR91XX_PLL_VAL_1000 0x1a000000
456 #define AR91XX_PLL_VAL_100 0x13000a44
457 #define AR91XX_PLL_VAL_10 0x00441099
458
459 static void __init ar71xx_init_eth_pll_data(unsigned int id)
460 {
461 struct ar71xx_eth_pll_data *pll_data;
462 u32 pll_10, pll_100, pll_1000;
463
464 switch (id) {
465 case 0:
466 pll_data = &ar71xx_eth0_pll_data;
467 break;
468 case 1:
469 pll_data = &ar71xx_eth1_pll_data;
470 break;
471 default:
472 BUG();
473 }
474
475 switch (ar71xx_soc) {
476 case AR71XX_SOC_AR7130:
477 case AR71XX_SOC_AR7141:
478 case AR71XX_SOC_AR7161:
479 pll_10 = AR71XX_PLL_VAL_10;
480 pll_100 = AR71XX_PLL_VAL_100;
481 pll_1000 = AR71XX_PLL_VAL_1000;
482 break;
483
484 case AR71XX_SOC_AR7240:
485 pll_10 = AR724X_PLL_VAL_10;
486 pll_100 = AR724X_PLL_VAL_100;
487 pll_1000 = AR724X_PLL_VAL_1000;
488 break;
489
490 case AR71XX_SOC_AR9130:
491 case AR71XX_SOC_AR9132:
492 pll_10 = AR91XX_PLL_VAL_10;
493 pll_100 = AR91XX_PLL_VAL_100;
494 pll_1000 = AR91XX_PLL_VAL_1000;
495 break;
496 default:
497 BUG();
498 }
499
500 if (!pll_data->pll_10)
501 pll_data->pll_10 = pll_10;
502
503 if (!pll_data->pll_100)
504 pll_data->pll_100 = pll_100;
505
506 if (!pll_data->pll_1000)
507 pll_data->pll_1000 = pll_1000;
508 }
509
510 static int ar71xx_eth_instance __initdata;
511 void __init ar71xx_add_device_eth(unsigned int id)
512 {
513 struct platform_device *pdev;
514 struct ag71xx_platform_data *pdata;
515
516 ar71xx_init_eth_pll_data(id);
517
518 switch (id) {
519 case 0:
520 switch (ar71xx_eth0_data.phy_if_mode) {
521 case PHY_INTERFACE_MODE_MII:
522 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_MII;
523 break;
524 case PHY_INTERFACE_MODE_GMII:
525 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_GMII;
526 break;
527 case PHY_INTERFACE_MODE_RGMII:
528 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RGMII;
529 break;
530 case PHY_INTERFACE_MODE_RMII:
531 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RMII;
532 break;
533 default:
534 printk(KERN_ERR "ar71xx: invalid PHY interface mode "
535 "for eth0\n");
536 return;
537 }
538 pdev = &ar71xx_eth0_device;
539 break;
540 case 1:
541 switch (ar71xx_eth1_data.phy_if_mode) {
542 case PHY_INTERFACE_MODE_RMII:
543 ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RMII;
544 break;
545 case PHY_INTERFACE_MODE_RGMII:
546 ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RGMII;
547 break;
548 default:
549 printk(KERN_ERR "ar71xx: invalid PHY interface mode "
550 "for eth1\n");
551 return;
552 }
553 pdev = &ar71xx_eth1_device;
554 break;
555 default:
556 printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id);
557 return;
558 }
559
560 pdata = pdev->dev.platform_data;
561
562 switch (ar71xx_soc) {
563 case AR71XX_SOC_AR7130:
564 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
565 : ar71xx_ddr_flush_ge0;
566 pdata->set_pll = id ? ar71xx_set_pll_ge1
567 : ar71xx_set_pll_ge0;
568 break;
569
570 case AR71XX_SOC_AR7141:
571 case AR71XX_SOC_AR7161:
572 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
573 : ar71xx_ddr_flush_ge0;
574 pdata->set_pll = id ? ar71xx_set_pll_ge1
575 : ar71xx_set_pll_ge0;
576 pdata->has_gbit = 1;
577 break;
578
579 case AR71XX_SOC_AR7240:
580 pdata->ddr_flush = id ? ar724x_ddr_flush_ge1
581 : ar724x_ddr_flush_ge0;
582 pdata->set_pll = id ? ar724x_set_pll_ge1
583 : ar724x_set_pll_ge0;
584 pdata->is_ar724x = 1;
585 break;
586
587 case AR71XX_SOC_AR9130:
588 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
589 : ar91xx_ddr_flush_ge0;
590 pdata->set_pll = id ? ar91xx_set_pll_ge1
591 : ar91xx_set_pll_ge0;
592 pdata->is_ar91xx = 1;
593 break;
594
595 case AR71XX_SOC_AR9132:
596 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
597 : ar91xx_ddr_flush_ge0;
598 pdata->set_pll = id ? ar91xx_set_pll_ge1
599 : ar91xx_set_pll_ge0;
600 pdata->is_ar91xx = 1;
601 pdata->has_gbit = 1;
602 break;
603
604 default:
605 BUG();
606 }
607
608 switch (pdata->phy_if_mode) {
609 case PHY_INTERFACE_MODE_GMII:
610 case PHY_INTERFACE_MODE_RGMII:
611 if (!pdata->has_gbit) {
612 printk(KERN_ERR "ar71xx: no gbit available on eth%d\n",
613 id);
614 return;
615 }
616 /* fallthrough */
617 default:
618 break;
619 }
620
621 if (is_valid_ether_addr(ar71xx_mac_base)) {
622 memcpy(pdata->mac_addr, ar71xx_mac_base, ETH_ALEN);
623 pdata->mac_addr[5] += ar71xx_eth_instance;
624 } else {
625 random_ether_addr(pdata->mac_addr);
626 printk(KERN_DEBUG
627 "ar71xx: using random MAC address for eth%d\n",
628 ar71xx_eth_instance);
629 }
630
631 if (pdata->mii_bus_dev == NULL)
632 pdata->mii_bus_dev = &ar71xx_mdio_device.dev;
633
634 /* Reset the device */
635 ar71xx_device_stop(pdata->reset_bit);
636 mdelay(100);
637
638 ar71xx_device_start(pdata->reset_bit);
639 mdelay(100);
640
641 platform_device_register(pdev);
642 ar71xx_eth_instance++;
643 }
644
645 static struct resource ar71xx_spi_resources[] = {
646 [0] = {
647 .start = AR71XX_SPI_BASE,
648 .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
649 .flags = IORESOURCE_MEM,
650 },
651 };
652
653 static struct platform_device ar71xx_spi_device = {
654 .name = "ar71xx-spi",
655 .id = -1,
656 .resource = ar71xx_spi_resources,
657 .num_resources = ARRAY_SIZE(ar71xx_spi_resources),
658 };
659
660 void __init ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata,
661 struct spi_board_info const *info,
662 unsigned n)
663 {
664 spi_register_board_info(info, n);
665 ar71xx_spi_device.dev.platform_data = pdata;
666 platform_device_register(&ar71xx_spi_device);
667 }
668
669 void __init ar71xx_add_device_leds_gpio(int id, unsigned num_leds,
670 struct gpio_led *leds)
671 {
672 struct platform_device *pdev;
673 struct gpio_led_platform_data pdata;
674 struct gpio_led *p;
675 int err;
676
677 p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
678 if (!p)
679 return;
680
681 memcpy(p, leds, num_leds * sizeof(*p));
682
683 pdev = platform_device_alloc("leds-gpio", id);
684 if (!pdev)
685 goto err_free_leds;
686
687 memset(&pdata, 0, sizeof(pdata));
688 pdata.num_leds = num_leds;
689 pdata.leds = p;
690
691 err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
692 if (err)
693 goto err_put_pdev;
694
695 err = platform_device_add(pdev);
696 if (err)
697 goto err_put_pdev;
698
699 return;
700
701 err_put_pdev:
702 platform_device_put(pdev);
703
704 err_free_leds:
705 kfree(p);
706 }
707
708 void __init ar71xx_add_device_gpio_buttons(int id,
709 unsigned poll_interval,
710 unsigned nbuttons,
711 struct gpio_button *buttons)
712 {
713 struct platform_device *pdev;
714 struct gpio_buttons_platform_data pdata;
715 struct gpio_button *p;
716 int err;
717
718 p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
719 if (!p)
720 return;
721
722 memcpy(p, buttons, nbuttons * sizeof(*p));
723
724 pdev = platform_device_alloc("gpio-buttons", id);
725 if (!pdev)
726 goto err_free_buttons;
727
728 memset(&pdata, 0, sizeof(pdata));
729 pdata.poll_interval = poll_interval;
730 pdata.nbuttons = nbuttons;
731 pdata.buttons = p;
732
733 err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
734 if (err)
735 goto err_put_pdev;
736
737
738 err = platform_device_add(pdev);
739 if (err)
740 goto err_put_pdev;
741
742 return;
743
744 err_put_pdev:
745 platform_device_put(pdev);
746
747 err_free_buttons:
748 kfree(p);
749 }
750
751 void __init ar71xx_add_device_wdt(void)
752 {
753 platform_device_register_simple("ar71xx-wdt", -1, NULL, 0);
754 }
755
756 void __init ar71xx_set_mac_base(unsigned char *mac)
757 {
758 memcpy(ar71xx_mac_base, mac, ETH_ALEN);
759 }
760
761 void __init ar71xx_parse_mac_addr(char *mac_str)
762 {
763 u8 tmp[ETH_ALEN];
764 int t;
765
766 t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
767 &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
768
769 if (t != ETH_ALEN)
770 t = sscanf(mac_str, "%02hhx.%02hhx.%02hhx.%02hhx.%02hhx.%02hhx",
771 &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
772
773 if (t == ETH_ALEN)
774 ar71xx_set_mac_base(tmp);
775 else
776 printk(KERN_DEBUG "ar71xx: failed to parse mac address "
777 "\"%s\"\n", mac_str);
778 }
779
780 static struct resource ar91xx_wmac_resources[] = {
781 {
782 .start = AR91XX_WMAC_BASE,
783 .end = AR91XX_WMAC_BASE + AR91XX_WMAC_SIZE - 1,
784 .flags = IORESOURCE_MEM,
785 }, {
786 .start = AR71XX_CPU_IRQ_WMAC,
787 .end = AR71XX_CPU_IRQ_WMAC,
788 .flags = IORESOURCE_IRQ,
789 },
790 };
791
792 static struct ath9k_platform_data ar91xx_wmac_data;
793
794 static struct platform_device ar91xx_wmac_device = {
795 .name = "ath9k",
796 .id = -1,
797 .resource = ar91xx_wmac_resources,
798 .num_resources = ARRAY_SIZE(ar91xx_wmac_resources),
799 .dev = {
800 .platform_data = &ar91xx_wmac_data,
801 },
802 };
803
804 void __init ar91xx_add_device_wmac(void)
805 {
806 u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
807
808 memcpy(ar91xx_wmac_data.eeprom_data, ee,
809 sizeof(ar91xx_wmac_data.eeprom_data));
810
811 ar71xx_device_stop(RESET_MODULE_AMBA2WMAC);
812 mdelay(10);
813
814 ar71xx_device_start(RESET_MODULE_AMBA2WMAC);
815 mdelay(10);
816
817 platform_device_register(&ar91xx_wmac_device);
818 }
819
820 static struct platform_device ar71xx_dsa_switch_device = {
821 .name = "dsa",
822 .id = 0,
823 };
824
825 void __init ar71xx_add_device_dsa(unsigned int id,
826 struct dsa_platform_data *d)
827 {
828 switch (id) {
829 case 0:
830 d->netdev = &ar71xx_eth0_device.dev;
831 break;
832 case 1:
833 d->netdev = &ar71xx_eth1_device.dev;
834 break;
835 default:
836 printk(KERN_ERR
837 "ar71xx: invalid ethernet id %d for DSA switch\n",
838 id);
839 return;
840 }
841 d->mii_bus = &ar71xx_mdio_device.dev;
842 ar71xx_dsa_switch_device.dev.platform_data = d;
843
844 platform_device_register(&ar71xx_dsa_switch_device);
845 }
OpenWrt Source Repository