uclient: update to Git HEAD (2024-04-19)
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / dev-ap9x-pci.c
1 /*
2 * Atheros AP9X reference board PCI initialization
3 *
4 * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11 #include <linux/pci.h>
12 #include <linux/ath9k_platform.h>
13 #include <linux/delay.h>
14
15 #include <asm/mach-ath79/ath79.h>
16
17 #include "dev-ap9x-pci.h"
18 #include "pci-ath9k-fixup.h"
19 #include "pci.h"
20
21 static struct ath9k_platform_data ap9x_wmac0_data = {
22 .led_pin = -1,
23 };
24 static struct ath9k_platform_data ap9x_wmac1_data = {
25 .led_pin = -1,
26 };
27 static char ap9x_wmac0_mac[6];
28 static char ap9x_wmac1_mac[6];
29
30 __init void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin)
31 {
32 switch (wmac) {
33 case 0:
34 ap9x_wmac0_data.led_pin = pin;
35 break;
36 case 1:
37 ap9x_wmac1_data.led_pin = pin;
38 break;
39 }
40 }
41
42 __init struct ath9k_platform_data *ap9x_pci_get_wmac_data(unsigned wmac)
43 {
44 switch (wmac) {
45 case 0:
46 return &ap9x_wmac0_data;
47
48 case 1:
49 return &ap9x_wmac1_data;
50 }
51
52 return NULL;
53 }
54
55 __init void ap9x_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val)
56 {
57 switch (wmac) {
58 case 0:
59 ap9x_wmac0_data.gpio_mask = mask;
60 ap9x_wmac0_data.gpio_val = val;
61 break;
62 case 1:
63 ap9x_wmac1_data.gpio_mask = mask;
64 ap9x_wmac1_data.gpio_val = val;
65 break;
66 }
67 }
68
69 __init void ap9x_pci_setup_wmac_leds(unsigned wmac, struct gpio_led *leds,
70 int num_leds)
71 {
72 switch (wmac) {
73 case 0:
74 ap9x_wmac0_data.leds = leds;
75 ap9x_wmac0_data.num_leds = num_leds;
76 break;
77 case 1:
78 ap9x_wmac1_data.leds = leds;
79 ap9x_wmac1_data.num_leds = num_leds;
80 break;
81 }
82 }
83
84 __init void ap9x_pci_setup_wmac_btns(unsigned wmac,
85 struct gpio_keys_button *btns,
86 unsigned num_btns, unsigned poll_interval)
87 {
88 struct ath9k_platform_data *ap9x_wmac_data;
89
90 if (!(ap9x_wmac_data = ap9x_pci_get_wmac_data(wmac)))
91 return;
92
93 ap9x_wmac_data->btns = btns;
94 ap9x_wmac_data->num_btns = num_btns;
95 ap9x_wmac_data->btn_poll_interval = poll_interval;
96 }
97
98 static int ap91_pci_plat_dev_init(struct pci_dev *dev)
99 {
100 switch (PCI_SLOT(dev->devfn)) {
101 case 0:
102 dev->dev.platform_data = &ap9x_wmac0_data;
103 break;
104 }
105
106 return 0;
107 }
108
109 __init void ap91_pci_init(u8 *cal_data, u8 *mac_addr)
110 {
111 if (cal_data)
112 memcpy(ap9x_wmac0_data.eeprom_data, cal_data,
113 sizeof(ap9x_wmac0_data.eeprom_data));
114
115 if (mac_addr) {
116 memcpy(ap9x_wmac0_mac, mac_addr, sizeof(ap9x_wmac0_mac));
117 ap9x_wmac0_data.macaddr = ap9x_wmac0_mac;
118 }
119
120 ath79_pci_set_plat_dev_init(ap91_pci_plat_dev_init);
121 ath79_register_pci();
122
123 pci_enable_ath9k_fixup(0, ap9x_wmac0_data.eeprom_data);
124 }
125
126 __init void ap91_pci_init_simple(void)
127 {
128 ap91_pci_init(NULL, NULL);
129 ap9x_wmac0_data.eeprom_name = "pci_wmac0.eeprom";
130 }
131
132 static int ap94_pci_plat_dev_init(struct pci_dev *dev)
133 {
134 switch (PCI_SLOT(dev->devfn)) {
135 case 17:
136 dev->dev.platform_data = &ap9x_wmac0_data;
137 break;
138
139 case 18:
140 dev->dev.platform_data = &ap9x_wmac1_data;
141 break;
142 }
143
144 return 0;
145 }
146
147 __init void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0,
148 u8 *cal_data1, u8 *mac_addr1)
149 {
150 if (cal_data0)
151 memcpy(ap9x_wmac0_data.eeprom_data, cal_data0,
152 sizeof(ap9x_wmac0_data.eeprom_data));
153
154 if (cal_data1)
155 memcpy(ap9x_wmac1_data.eeprom_data, cal_data1,
156 sizeof(ap9x_wmac1_data.eeprom_data));
157
158 if (mac_addr0) {
159 memcpy(ap9x_wmac0_mac, mac_addr0, sizeof(ap9x_wmac0_mac));
160 ap9x_wmac0_data.macaddr = ap9x_wmac0_mac;
161 }
162
163 if (mac_addr1) {
164 memcpy(ap9x_wmac1_mac, mac_addr1, sizeof(ap9x_wmac1_mac));
165 ap9x_wmac1_data.macaddr = ap9x_wmac1_mac;
166 }
167
168 ath79_pci_set_plat_dev_init(ap94_pci_plat_dev_init);
169 ath79_register_pci();
170
171 pci_enable_ath9k_fixup(17, ap9x_wmac0_data.eeprom_data);
172 pci_enable_ath9k_fixup(18, ap9x_wmac1_data.eeprom_data);
173 }