ar71xx: add support for MikroTik hAP ac
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-ap143.c
1 /*
2 * Atheros AP143 reference board support
3 *
4 * Copyright (c) 2013-2015 The Linux Foundation. All rights reserved.
5 * Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org>
6 *
7 * Permission to use, copy, modify, and/or distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 *
19 */
20
21 #include <linux/platform_device.h>
22 #include <linux/ath9k_platform.h>
23 #include <linux/ar8216_platform.h>
24
25 #include <asm/mach-ath79/ar71xx_regs.h>
26
27 #include "common.h"
28 #include "dev-eth.h"
29 #include "dev-gpio-buttons.h"
30 #include "dev-leds-gpio.h"
31 #include "dev-m25p80.h"
32 #include "dev-spi.h"
33 #include "dev-usb.h"
34 #include "dev-wmac.h"
35 #include "machtypes.h"
36
37 #define AP143_GPIO_LED_WLAN 12
38 #define AP143_GPIO_LED_WPS 13
39 #define AP143_GPIO_LED_STATUS 13
40
41 #define AP143_GPIO_LED_WAN 4
42 #define AP143_GPIO_LED_LAN1 16
43 #define AP143_GPIO_LED_LAN2 15
44 #define AP143_GPIO_LED_LAN3 14
45 #define AP143_GPIO_LED_LAN4 11
46
47 #define AP143_GPIO_BTN_WPS 17
48
49 #define AP143_KEYS_POLL_INTERVAL 20 /* msecs */
50 #define AP143_KEYS_DEBOUNCE_INTERVAL (3 * AP143_KEYS_POLL_INTERVAL)
51
52 #define AP143_MAC0_OFFSET 0
53 #define AP143_MAC1_OFFSET 6
54 #define AP143_WMAC_CALDATA_OFFSET 0x1000
55
56 static struct gpio_led ap143_leds_gpio[] __initdata = {
57 {
58 .name = "ap143:green:status",
59 .gpio = AP143_GPIO_LED_STATUS,
60 .active_low = 1,
61 },
62 {
63 .name = "ap143:green:wlan",
64 .gpio = AP143_GPIO_LED_WLAN,
65 .active_low = 1,
66 }
67 };
68
69 static struct gpio_keys_button ap143_gpio_keys[] __initdata = {
70 {
71 .desc = "WPS button",
72 .type = EV_KEY,
73 .code = KEY_WPS_BUTTON,
74 .debounce_interval = AP143_KEYS_DEBOUNCE_INTERVAL,
75 .gpio = AP143_GPIO_BTN_WPS,
76 .active_low = 1,
77 },
78 };
79
80 static void __init ap143_gpio_led_setup(void)
81 {
82 ath79_gpio_direction_select(AP143_GPIO_LED_WAN, true);
83 ath79_gpio_direction_select(AP143_GPIO_LED_LAN1, true);
84 ath79_gpio_direction_select(AP143_GPIO_LED_LAN2, true);
85 ath79_gpio_direction_select(AP143_GPIO_LED_LAN3, true);
86 ath79_gpio_direction_select(AP143_GPIO_LED_LAN4, true);
87
88 ath79_gpio_output_select(AP143_GPIO_LED_WAN,
89 QCA953X_GPIO_OUT_MUX_LED_LINK5);
90 ath79_gpio_output_select(AP143_GPIO_LED_LAN1,
91 QCA953X_GPIO_OUT_MUX_LED_LINK1);
92 ath79_gpio_output_select(AP143_GPIO_LED_LAN2,
93 QCA953X_GPIO_OUT_MUX_LED_LINK2);
94 ath79_gpio_output_select(AP143_GPIO_LED_LAN3,
95 QCA953X_GPIO_OUT_MUX_LED_LINK3);
96 ath79_gpio_output_select(AP143_GPIO_LED_LAN4,
97 QCA953X_GPIO_OUT_MUX_LED_LINK4);
98
99 ath79_register_leds_gpio(-1, ARRAY_SIZE(ap143_leds_gpio),
100 ap143_leds_gpio);
101 ath79_register_gpio_keys_polled(-1, AP143_KEYS_POLL_INTERVAL,
102 ARRAY_SIZE(ap143_gpio_keys),
103 ap143_gpio_keys);
104 }
105
106 static void __init ap143_setup(void)
107 {
108 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
109
110 ath79_register_m25p80(NULL);
111
112 ap143_gpio_led_setup();
113
114 ath79_register_usb();
115
116 ath79_wmac_set_led_pin(AP143_GPIO_LED_WLAN);
117 ath79_register_wmac(art + AP143_WMAC_CALDATA_OFFSET, NULL);
118
119 ath79_register_mdio(0, 0x0);
120 ath79_register_mdio(1, 0x0);
121
122 ath79_init_mac(ath79_eth0_data.mac_addr, art + AP143_MAC0_OFFSET, 0);
123 ath79_init_mac(ath79_eth1_data.mac_addr, art + AP143_MAC1_OFFSET, 0);
124
125 /* WAN port */
126 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
127 ath79_eth0_data.speed = SPEED_100;
128 ath79_eth0_data.duplex = DUPLEX_FULL;
129 ath79_eth0_data.phy_mask = BIT(4);
130 ath79_register_eth(0);
131
132 /* LAN ports */
133 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
134 ath79_eth1_data.speed = SPEED_1000;
135 ath79_eth1_data.duplex = DUPLEX_FULL;
136 ath79_switch_data.phy_poll_mask |= BIT(4);
137 ath79_switch_data.phy4_mii_en = 1;
138 ath79_register_eth(1);
139 }
140
141 MIPS_MACHINE(ATH79_MACH_AP143, "AP143", "Qualcomm Atheros AP143 reference board",
142 ap143_setup);