ar71xx: add support for MikroTik hAP ac
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-ap96.c
1 /*
2 * Atheros AP96 board support
3 *
4 * Copyright (C) 2009 Marco Porsch
5 * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2010 Atheros Communications
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12
13 #include <linux/platform_device.h>
14 #include <linux/delay.h>
15
16 #include <asm/mach-ath79/ath79.h>
17
18 #include "dev-ap9x-pci.h"
19 #include "dev-eth.h"
20 #include "dev-gpio-buttons.h"
21 #include "dev-leds-gpio.h"
22 #include "dev-m25p80.h"
23 #include "dev-usb.h"
24 #include "machtypes.h"
25
26 #define AP96_GPIO_LED_12_GREEN 0
27 #define AP96_GPIO_LED_3_GREEN 1
28 #define AP96_GPIO_LED_2_GREEN 2
29 #define AP96_GPIO_LED_WPS_GREEN 4
30 #define AP96_GPIO_LED_5_GREEN 5
31 #define AP96_GPIO_LED_4_ORANGE 6
32
33 /* Reset button - next to the power connector */
34 #define AP96_GPIO_BTN_RESET 3
35 /* WPS button - next to a led on right */
36 #define AP96_GPIO_BTN_WPS 8
37
38 #define AP96_KEYS_POLL_INTERVAL 20 /* msecs */
39 #define AP96_KEYS_DEBOUNCE_INTERVAL (3 * AP96_KEYS_POLL_INTERVAL)
40
41 #define AP96_WMAC0_MAC_OFFSET 0x120c
42 #define AP96_WMAC1_MAC_OFFSET 0x520c
43 #define AP96_CALDATA0_OFFSET 0x1000
44 #define AP96_CALDATA1_OFFSET 0x5000
45
46 /*
47 * AP96 has 12 unlabeled leds in the front; these are numbered from 1 to 12
48 * below (from left to right on the board). Led 1 seems to be on whenever the
49 * board is powered. Led 11 shows LAN link activity actity. Led 3 is orange;
50 * others are green.
51 *
52 * In addition, there is one led next to a button on the right side for WPS.
53 */
54 static struct gpio_led ap96_leds_gpio[] __initdata = {
55 {
56 .name = "ap96:green:led2",
57 .gpio = AP96_GPIO_LED_2_GREEN,
58 .active_low = 1,
59 }, {
60 .name = "ap96:green:led3",
61 .gpio = AP96_GPIO_LED_3_GREEN,
62 .active_low = 1,
63 }, {
64 .name = "ap96:orange:led4",
65 .gpio = AP96_GPIO_LED_4_ORANGE,
66 .active_low = 1,
67 }, {
68 .name = "ap96:green:led5",
69 .gpio = AP96_GPIO_LED_5_GREEN,
70 .active_low = 1,
71 }, {
72 .name = "ap96:green:led12",
73 .gpio = AP96_GPIO_LED_12_GREEN,
74 .active_low = 1,
75 }, { /* next to a button on right */
76 .name = "ap96:green:wps",
77 .gpio = AP96_GPIO_LED_WPS_GREEN,
78 .active_low = 1,
79 }
80 };
81
82 static struct gpio_keys_button ap96_gpio_keys[] __initdata = {
83 {
84 .desc = "reset",
85 .type = EV_KEY,
86 .code = KEY_RESTART,
87 .debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL,
88 .gpio = AP96_GPIO_BTN_RESET,
89 .active_low = 1,
90 }, {
91 .desc = "wps",
92 .type = EV_KEY,
93 .code = KEY_WPS_BUTTON,
94 .debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL,
95 .gpio = AP96_GPIO_BTN_WPS,
96 .active_low = 1,
97 }
98 };
99
100 #define AP96_WAN_PHYMASK 0x10
101 #define AP96_LAN_PHYMASK 0x0f
102
103 static void __init ap96_setup(void)
104 {
105 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
106
107 ath79_register_mdio(0, ~(AP96_WAN_PHYMASK | AP96_LAN_PHYMASK));
108
109 ath79_init_mac(ath79_eth0_data.mac_addr, art, 0);
110 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
111 ath79_eth0_data.phy_mask = AP96_LAN_PHYMASK;
112 ath79_eth0_data.speed = SPEED_1000;
113 ath79_eth0_data.duplex = DUPLEX_FULL;
114
115 ath79_register_eth(0);
116
117 ath79_init_mac(ath79_eth1_data.mac_addr, art, 1);
118 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
119 ath79_eth1_data.phy_mask = AP96_WAN_PHYMASK;
120
121 ath79_eth1_pll_data.pll_1000 = 0x1f000000;
122
123 ath79_register_eth(1);
124
125 ath79_register_usb();
126
127 ath79_register_m25p80(NULL);
128
129 ath79_register_leds_gpio(-1, ARRAY_SIZE(ap96_leds_gpio),
130 ap96_leds_gpio);
131
132 ath79_register_gpio_keys_polled(-1, AP96_KEYS_POLL_INTERVAL,
133 ARRAY_SIZE(ap96_gpio_keys),
134 ap96_gpio_keys);
135
136 ap94_pci_init(art + AP96_CALDATA0_OFFSET,
137 art + AP96_WMAC0_MAC_OFFSET,
138 art + AP96_CALDATA1_OFFSET,
139 art + AP96_WMAC1_MAC_OFFSET);
140 }
141
142 MIPS_MACHINE(ATH79_MACH_AP96, "AP96", "Atheros AP96", ap96_setup);