ar71xx: add support for MikroTik hAP ac
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-archer-c59-v1.c
1 /*
2 * TP-Link Archer C59 v1 board support
3 *
4 * Copyright (C) 2016 Henryk Heisig <hyniu@o2.pl>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10 #include <linux/platform_device.h>
11 #include <linux/ath9k_platform.h>
12 #include <linux/ar8216_platform.h>
13 #include <asm/mach-ath79/ar71xx_regs.h>
14 #include <linux/gpio.h>
15 #include <linux/init.h>
16 #include <linux/spi/spi_gpio.h>
17 #include <linux/spi/74x164.h>
18
19 #include "common.h"
20 #include "dev-m25p80.h"
21 #include "machtypes.h"
22 #include "pci.h"
23 #include "dev-ap9x-pci.h"
24 #include "dev-eth.h"
25 #include "dev-gpio-buttons.h"
26 #include "dev-leds-gpio.h"
27 #include "dev-spi.h"
28 #include "dev-usb.h"
29 #include "dev-wmac.h"
30
31 #define ARCHER_C59_V1_KEYS_POLL_INTERVAL 20
32 #define ARCHER_C59_V1_KEYS_DEBOUNCE_INTERVAL (3 * ARCHER_C59_V1_KEYS_POLL_INTERVAL)
33
34 #define ARCHER_C59_V1_GPIO_BTN_RESET 21
35 #define ARCHER_C59_V1_GPIO_BTN_RFKILL 2
36 #define ARCHER_C59_V1_GPIO_BTN_WPS 1
37
38 #define ARCHER_C59_V1_GPIO_USB_POWER 22
39
40 #define ARCHER_C59_GPIO_SHIFT_OE 16
41 #define ARCHER_C59_GPIO_SHIFT_SER 17
42 #define ARCHER_C59_GPIO_SHIFT_SRCLK 18
43 #define ARCHER_C59_GPIO_SHIFT_SRCLR 19
44 #define ARCHER_C59_GPIO_SHIFT_RCLK 20
45
46 #define ARCHER_C59_74HC_GPIO_BASE QCA956X_GPIO_COUNT
47 #define ARCHER_C59_74HC_GPIO_LED_POWER 23
48 #define ARCHER_C59_74HC_GPIO_LED_WLAN2 24
49 #define ARCHER_C59_74HC_GPIO_LED_WLAN5 25
50 #define ARCHER_C59_74HC_GPIO_LED_LAN 26
51 #define ARCHER_C59_74HC_GPIO_LED_WAN_GREEN 27
52 #define ARCHER_C59_74HC_GPIO_LED_WAN_AMBER 28
53 #define ARCHER_C59_74HC_GPIO_LED_WPS 29
54 #define ARCHER_C59_74HC_GPIO_LED_USB 30
55
56 #define ARCHER_C59_V1_SSR_BIT_0 0
57 #define ARCHER_C59_V1_SSR_BIT_1 1
58 #define ARCHER_C59_V1_SSR_BIT_2 2
59 #define ARCHER_C59_V1_SSR_BIT_3 3
60 #define ARCHER_C59_V1_SSR_BIT_4 4
61 #define ARCHER_C59_V1_SSR_BIT_5 5
62 #define ARCHER_C59_V1_SSR_BIT_6 6
63 #define ARCHER_C59_V1_SSR_BIT_7 7
64
65 #define ARCHER_C59_V1_WMAC_CALDATA_OFFSET 0x1000
66 #define ARCHER_C59_V1_PCI_CALDATA_OFFSET 0x5000
67
68 static struct gpio_led archer_c59_v1_leds_gpio[] __initdata = {
69 {
70 .name = "archer-c59-v1:green:power",
71 .gpio = ARCHER_C59_74HC_GPIO_LED_POWER,
72 .active_low = 1,
73 },
74 {
75 .name = "archer-c59-v1:green:wlan2g",
76 .gpio = ARCHER_C59_74HC_GPIO_LED_WLAN2,
77 .active_low = 1,
78 },
79 {
80 .name = "archer-c59-v1:green:wlan5g",
81 .gpio = ARCHER_C59_74HC_GPIO_LED_WLAN5,
82 .active_low = 1,
83 },
84 {
85 .name = "archer-c59-v1:green:lan",
86 .gpio = ARCHER_C59_74HC_GPIO_LED_LAN,
87 .active_low = 1,
88 },
89 {
90 .name = "archer-c59-v1:green:wan",
91 .gpio = ARCHER_C59_74HC_GPIO_LED_WAN_GREEN,
92 .active_low = 1,
93 },
94 {
95 .name = "archer-c59-v1:amber:wan",
96 .gpio = ARCHER_C59_74HC_GPIO_LED_WAN_AMBER,
97 .active_low = 1,
98 },
99 {
100 .name = "archer-c59-v1:green:wps",
101 .gpio = ARCHER_C59_74HC_GPIO_LED_WPS,
102 .active_low = 1,
103 },
104 {
105 .name = "archer-c59-v1:green:usb",
106 .gpio = ARCHER_C59_74HC_GPIO_LED_USB,
107 .active_low = 1,
108 },
109 };
110
111 static struct gpio_keys_button archer_c59_v1_gpio_keys[] __initdata = {
112 {
113 .desc = "Reset button",
114 .type = EV_KEY,
115 .code = KEY_RESTART,
116 .debounce_interval = ARCHER_C59_V1_KEYS_DEBOUNCE_INTERVAL,
117 .gpio = ARCHER_C59_V1_GPIO_BTN_RESET,
118 .active_low = 1,
119 },
120 {
121 .desc = "RFKILL button",
122 .type = EV_KEY,
123 .code = KEY_RFKILL,
124 .debounce_interval = ARCHER_C59_V1_KEYS_DEBOUNCE_INTERVAL,
125 .gpio = ARCHER_C59_V1_GPIO_BTN_RFKILL,
126 .active_low = 1,
127 },
128 {
129 .desc = "WPS button",
130 .type = EV_KEY,
131 .code = KEY_WPS_BUTTON,
132 .debounce_interval = ARCHER_C59_V1_KEYS_DEBOUNCE_INTERVAL,
133 .gpio = ARCHER_C59_V1_GPIO_BTN_WPS,
134 .active_low = 1,
135 },
136 };
137
138 static struct spi_gpio_platform_data archer_c59_v1_spi_data = {
139 .sck = ARCHER_C59_GPIO_SHIFT_SRCLK,
140 .miso = SPI_GPIO_NO_MISO,
141 .mosi = ARCHER_C59_GPIO_SHIFT_SER,
142 .num_chipselect = 1,
143 };
144
145 static u8 archer_c59_v1_ssr_initdata[] __initdata = {
146 BIT(ARCHER_C59_V1_SSR_BIT_7) |
147 BIT(ARCHER_C59_V1_SSR_BIT_6) |
148 BIT(ARCHER_C59_V1_SSR_BIT_5) |
149 BIT(ARCHER_C59_V1_SSR_BIT_4) |
150 BIT(ARCHER_C59_V1_SSR_BIT_3) |
151 BIT(ARCHER_C59_V1_SSR_BIT_2) |
152 BIT(ARCHER_C59_V1_SSR_BIT_1)
153 };
154
155 static struct gen_74x164_chip_platform_data archer_c59_v1_ssr_data = {
156 .base = ARCHER_C59_74HC_GPIO_BASE,
157 .num_registers = ARRAY_SIZE(archer_c59_v1_ssr_initdata),
158 .init_data = archer_c59_v1_ssr_initdata,
159 };
160
161 static struct platform_device archer_c59_v1_spi_device = {
162 .name = "spi_gpio",
163 .id = 1,
164 .dev = {
165 .platform_data = &archer_c59_v1_spi_data,
166 },
167 };
168
169 static struct spi_board_info archer_c59_v1_spi_info[] = {
170 {
171 .bus_num = 1,
172 .chip_select = 0,
173 .max_speed_hz = 10000000,
174 .modalias = "74x164",
175 .platform_data = &archer_c59_v1_ssr_data,
176 .controller_data = (void *) ARCHER_C59_GPIO_SHIFT_RCLK,
177 },
178 };
179
180 static void __init archer_c59_v1_setup(void)
181 {
182 u8 *mac = (u8 *) KSEG1ADDR(0x1f010008);
183 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
184
185 ath79_register_m25p80(NULL);
186 spi_register_board_info(archer_c59_v1_spi_info,
187 ARRAY_SIZE(archer_c59_v1_spi_info));
188 platform_device_register(&archer_c59_v1_spi_device);
189
190 ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c59_v1_leds_gpio),
191 archer_c59_v1_leds_gpio);
192
193 ath79_register_gpio_keys_polled(-1, ARCHER_C59_V1_KEYS_POLL_INTERVAL,
194 ARRAY_SIZE(archer_c59_v1_gpio_keys),
195 archer_c59_v1_gpio_keys);
196
197 ath79_setup_qca956x_eth_cfg(QCA956X_ETH_CFG_SW_PHY_SWAP |
198 QCA956X_ETH_CFG_SW_PHY_ADDR_SWAP);
199
200 ath79_register_mdio(0, 0x0);
201 ath79_register_mdio(1, 0x0);
202
203 ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
204 ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
205
206 /* WAN port */
207 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
208 ath79_eth0_data.speed = SPEED_100;
209 ath79_eth0_data.duplex = DUPLEX_FULL;
210 ath79_eth0_data.phy_mask = BIT(0);
211 ath79_register_eth(0);
212
213 /* LAN ports */
214 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
215 ath79_eth1_data.speed = SPEED_1000;
216 ath79_eth1_data.duplex = DUPLEX_FULL;
217 ath79_switch_data.phy_poll_mask |= BIT(4);
218 ath79_switch_data.phy4_mii_en = 1;
219 ath79_register_eth(1);
220
221 ath79_register_wmac(art + ARCHER_C59_V1_WMAC_CALDATA_OFFSET, mac);
222 ap91_pci_init(art + ARCHER_C59_V1_PCI_CALDATA_OFFSET, NULL);
223
224 ath79_register_usb();
225 gpio_request_one(ARCHER_C59_V1_GPIO_USB_POWER,
226 GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
227 "USB power");
228 gpio_request_one(ARCHER_C59_GPIO_SHIFT_OE,
229 GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
230 "LED control");
231 gpio_request_one(ARCHER_C59_GPIO_SHIFT_SRCLR,
232 GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
233 "LED reset");
234 }
235
236 MIPS_MACHINE(ATH79_MACH_ARCHER_C59_V1, "ARCHER-C59-V1",
237 "TP-LINK Archer C59 v1", archer_c59_v1_setup);