target/linux/ar71xx/files/arch/mips/ath79/mach-c60.c

   1 /*
   2  *  AirTight Networks C-60 board support
   3  *
   4  *  Copyright (C) 2016 Christian Lamparter <chunkeey@googlemail.com>
   5  *
   6  *  Based on AirTight Networks C-55 board support
   7  *
   8  *  Copyright (C) 2014-2015 Chris Blake <chrisrblake93@gmail.com>
   9  *
  10  *  This program is free software; you can redistribute it and/or modify it
  11  *  under the terms of the GNU General Public License version 2 as published
  12  *  by the Free Software Foundation.
  13  */
  14
  15 #include <linux/pci.h>
  16 #include <linux/phy.h>
  17 #include <linux/mtd/mtd.h>
  18 #include <linux/mtd/nand.h>
  19 #include <linux/mtd/partitions.h>
  20 #include <linux/mtd/physmap.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/platform/ar934x_nfc.h>
  23 #include <linux/ar8216_platform.h>
  24 #include <linux/ath9k_platform.h>
  25
  26 #include <asm/mach-ath79/ar71xx_regs.h>
  27
  28 #include "common.h"
  29 #include "pci.h"
  30 #include "dev-ap9x-pci.h"
  31 #include "dev-eth.h"
  32 #include "dev-gpio-buttons.h"
  33 #include "dev-leds-gpio.h"
  34 #include "dev-m25p80.h"
  35 #include "dev-spi.h"
  36 #include "dev-wmac.h"
  37 #include "dev-usb.h"
  38 #include "dev-nfc.h"
  39 #include "machtypes.h"
  40
  41 #define C60_GPIO_LED_PWR_AMBER          11
  42 #define C60_GPIO_LED_WLAN2_GREEN        12
  43 #define C60_GPIO_LED_WLAN2_AMBER        13
  44 #define C60_GPIO_LED_PWR_GREEN          16
  45
  46 #define C60_GPIO_BTN_RESET              17
  47
  48 /* GPIOs of the AR9300 PCIe chip */
  49 #define C60_GPIO_WMAC_LED_WLAN1_AMBER   0
  50 #define C60_GPIO_WMAC_LED_WLAN1_GREEN   3
  51
  52 #define C60_KEYS_POLL_INTERVAL          20      /* msecs */
  53 #define C60_KEYS_DEBOUNCE_INTERVAL (3 * C60_KEYS_POLL_INTERVAL)
  54
  55 #define C60_ART_ADDR                    0x1f7f0000
  56 #define C60_ART_SIZE                    0xffff
  57 #define C60_MAC_OFFSET                  0
  58 #define C60_WMAC_CALDATA_OFFSET         0x1000
  59 #define C60_PCIE_CALDATA_OFFSET         0x5000
  60
  61 static struct gpio_led c60_leds_gpio[] __initdata = {
  62         {
  63                 .name           = "c-60:amber:pwr",
  64                 .gpio           = C60_GPIO_LED_PWR_AMBER,
  65                 .active_low     = 1,
  66         },
  67         {
  68                 .name           = "c-60:green:pwr",
  69                 .gpio           = C60_GPIO_LED_PWR_GREEN,
  70                 .active_low     = 1,
  71         },
  72         {
  73                 .name           = "c-60:green:wlan2",
  74                 .gpio           = C60_GPIO_LED_WLAN2_GREEN,
  75                 .active_low     = 1,
  76         },
  77         {
  78                 .name           = "c-60:amber:wlan2",
  79                 .gpio           = C60_GPIO_LED_WLAN2_AMBER,
  80                 .active_low     = 1,
  81         },
  82 };
  83
  84 static struct gpio_keys_button c60_gpio_keys[] __initdata = {
  85         {
  86                 .desc           = "Reset button",
  87                 .type           = EV_KEY,
  88                 .code           = KEY_RESTART,
  89                 .debounce_interval = C60_KEYS_DEBOUNCE_INTERVAL,
  90                 .gpio           = C60_GPIO_BTN_RESET,
  91                 .active_low     = 1,
  92         },
  93 };
  94
  95 static struct ar8327_pad_cfg c60_ar8327_pad0_cfg = {
  96         .mode = AR8327_PAD_MAC_RGMII,
  97         .txclk_delay_en = true,
  98         .rxclk_delay_en = true,
  99         .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
 100         .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
 101 };
 102
 103 static struct ar8327_platform_data c60_ar8327_data = {
 104         .pad0_cfg = &c60_ar8327_pad0_cfg,
 105         .port0_cfg = {
 106                 .force_link = 1,
 107                 .speed = AR8327_PORT_SPEED_1000,
 108                 .duplex = 1,
 109                 .txpause = 1,
 110                 .rxpause = 1,
 111         }
 112 };
 113
 114 static struct mdio_board_info c60_mdio0_info[] = {
 115         {
 116                 .bus_id = "ag71xx-mdio.0",
 117                 .phy_addr = 0,
 118                 .platform_data = &c60_ar8327_data,
 119         },
 120 };
 121
 122 static struct nand_ecclayout c60_nand_ecclayout = {
 123         .eccbytes       = 7,
 124         .eccpos         = { 4, 8, 9, 10, 13, 14, 15 },
 125         .oobavail       = 9,
 126         .oobfree        = { { 0, 3 }, { 6, 2 }, { 11, 2 }, }
 127 };
 128
 129 static int c60_nand_scan_fixup(struct mtd_info *mtd)
 130 {
 131         struct nand_chip *chip = mtd->priv;
 132
 133         chip->ecc.size = 512;
 134         chip->ecc.strength = 4;
 135         chip->ecc.layout = &c60_nand_ecclayout;
 136         return 0;
 137 }
 138
 139 static struct gpio_led c60_wmac0_leds_gpio[] = {
 140         {
 141                 .name           = "c-60:amber:wlan1",
 142                 .gpio           = C60_GPIO_WMAC_LED_WLAN1_AMBER,
 143                 .active_low     = 1,
 144         },
 145         {
 146                 .name           = "c-60:green:wlan1",
 147                 .gpio           = C60_GPIO_WMAC_LED_WLAN1_GREEN,
 148                 .active_low     = 1,
 149         },
 150 };
 151
 152 static void __init c60_setup(void)
 153 {
 154         u8 tmpmac[6];
 155         u8 *art = (u8 *) KSEG1ADDR(C60_ART_ADDR);
 156
 157         /* NAND */
 158         ath79_nfc_set_ecc_mode(AR934X_NFC_ECC_SOFT_BCH);
 159         ath79_nfc_set_scan_fixup(c60_nand_scan_fixup);
 160         ath79_register_nfc();
 161
 162         /* SPI Storage*/
 163         ath79_register_m25p80(NULL);
 164
 165         /* AR8327 Switch Ethernet */
 166
 167         ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
 168
 169         mdiobus_register_board_info(c60_mdio0_info,
 170                                     ARRAY_SIZE(c60_mdio0_info));
 171
 172         ath79_register_mdio(0, 0x0);
 173
 174         /* GMAC0 is connected to an AR8327N switch */
 175         ath79_init_mac(ath79_eth0_data.mac_addr, art + C60_MAC_OFFSET, 0);
 176         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 177         ath79_eth0_data.phy_mask = BIT(0);
 178         ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
 179         ath79_eth0_pll_data.pll_1000 = 0x06000000;
 180         ath79_register_eth(0);
 181
 182         /* LEDs & GPIO */
 183         ath79_register_leds_gpio(-1, ARRAY_SIZE(c60_leds_gpio),
 184                                  c60_leds_gpio);
 185         ath79_register_gpio_keys_polled(-1, C60_KEYS_POLL_INTERVAL,
 186                                         ARRAY_SIZE(c60_gpio_keys),
 187                                         c60_gpio_keys);
 188         ap9x_pci_setup_wmac_leds(0, c60_wmac0_leds_gpio,
 189                                  ARRAY_SIZE(c60_wmac0_leds_gpio));
 190         /* USB */
 191         ath79_register_usb();
 192
 193         /* WiFi */
 194         ath79_init_mac(tmpmac, art + C60_MAC_OFFSET, 1);
 195         ap91_pci_init(art + C60_PCIE_CALDATA_OFFSET, tmpmac);
 196         ath79_init_mac(tmpmac, art + C60_MAC_OFFSET, 2);
 197         ath79_register_wmac(art + C60_WMAC_CALDATA_OFFSET, tmpmac);
 198 }
 199 MIPS_MACHINE(ATH79_MACH_C60, "C-60", "AirTight Networks C-60",
 200              c60_setup);