target/linux/ar71xx/files/arch/mips/ath79/mach-epg5000.c

   1 /*
   2  *  EnGenius EPG5000 board support
   3  *
   4  *  Copyright (c) 2014 Jon Suphammer <jon@suphammer.net>
   5  *  Copyright (c) 2015 Christian Beier <cb@shoutrlabs.com>
   6  *
   7  *  This program is free software; you can redistribute it and/or modify it
   8  *  under the terms of the GNU General Public License version 2 as published
   9  *  by the Free Software Foundation.
  10  */
  11
  12 #include <linux/platform_device.h>
  13 #include <linux/ar8216_platform.h>
  14
  15 #include <asm/mach-ath79/ar71xx_regs.h>
  16
  17 #include "common.h"
  18 #include "pci.h"
  19 #include "dev-ap9x-pci.h"
  20 #include "dev-gpio-buttons.h"
  21 #include "dev-eth.h"
  22 #include "dev-leds-gpio.h"
  23 #include "dev-m25p80.h"
  24 #include "dev-usb.h"
  25 #include "dev-wmac.h"
  26 #include "machtypes.h"
  27 #include "nvram.h"
  28
  29 #define EPG5000_GPIO_LED_WLAN_5G        23
  30 #define EPG5000_GPIO_LED_WLAN_2G        13
  31 #define EPG5000_GPIO_LED_POWER_AMBER    2
  32 #define EPG5000_GPIO_LED_WPS_AMBER      22
  33 #define EPG5000_GPIO_LED_WPS_BLUE       19
  34
  35 #define EPG5000_GPIO_BTN_WPS            16
  36 #define EPG5000_GPIO_BTN_RESET          17
  37
  38 #define EPG5000_KEYS_POLL_INTERVAL      20      /* msecs */
  39 #define EPG5000_KEYS_DEBOUNCE_INTERVAL  (3 * EPG5000_KEYS_POLL_INTERVAL)
  40
  41 #define EPG5000_CALDATA_ADDR 0x1fff0000
  42 #define EPG5000_WMAC_CALDATA_OFFSET     0x1000
  43 #define EPG5000_PCIE_CALDATA_OFFSET     0x5000
  44
  45 #define EPG5000_NVRAM_ADDR      0x1f030000
  46 #define EPG5000_NVRAM_SIZE      0x10000
  47
  48 static struct gpio_led epg5000_leds_gpio[] __initdata = {
  49         {
  50                 .name           = "epg5000:amber:power",
  51                 .gpio           = EPG5000_GPIO_LED_POWER_AMBER,
  52                 .active_low     = 1,
  53         },
  54         {
  55                 .name           = "epg5000:blue:wps",
  56                 .gpio           = EPG5000_GPIO_LED_WPS_BLUE,
  57                 .active_low     = 1,
  58         },
  59         {
  60                 .name           = "epg5000:amber:wps",
  61                 .gpio           = EPG5000_GPIO_LED_WPS_AMBER,
  62                 .active_low     = 1,
  63         },
  64         {
  65                 .name           = "epg5000:blue:wlan-2g",
  66                 .gpio           = EPG5000_GPIO_LED_WLAN_2G,
  67                 .active_low     = 1,
  68         },
  69         {
  70                 .name           = "epg5000:blue:wlan-5g",
  71                 .gpio           = EPG5000_GPIO_LED_WLAN_5G,
  72                 .active_low     = 1,
  73         }
  74 };
  75
  76 static struct gpio_keys_button epg5000_gpio_keys[] __initdata = {
  77         {
  78                 .desc           = "WPS button",
  79                 .type           = EV_KEY,
  80                 .code           = KEY_WPS_BUTTON,
  81                 .debounce_interval = EPG5000_KEYS_DEBOUNCE_INTERVAL,
  82                 .gpio           = EPG5000_GPIO_BTN_WPS,
  83                 .active_low     = 1,
  84         },
  85         {
  86                 .desc           = "Reset button",
  87                 .type           = EV_KEY,
  88                 .code           = KEY_RESTART,
  89                 .debounce_interval = EPG5000_KEYS_DEBOUNCE_INTERVAL,
  90                 .gpio           = EPG5000_GPIO_BTN_RESET,
  91                 .active_low     = 1,
  92         },
  93 };
  94
  95 static struct ar8327_pad_cfg epg5000_ar8327_pad0_cfg = {
  96         .mode = AR8327_PAD_MAC_RGMII,
  97         .txclk_delay_en = true,
  98         .rxclk_delay_en = true,
  99         .txclk_delay_sel = AR8327_CLK_DELAY_SEL2,
 100         .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
 101 };
 102
 103 static struct ar8327_platform_data epg5000_ar8327_data = {
 104         .pad0_cfg = &epg5000_ar8327_pad0_cfg,
 105         .port0_cfg = {
 106                 .force_link = 1,
 107                 .speed = AR8327_PORT_SPEED_1000,
 108                 .duplex = 1,
 109                 .txpause = 1,
 110                 .rxpause = 1,
 111         },
 112 };
 113
 114 static struct mdio_board_info epg5000_mdio0_info[] = {
 115         {
 116                 .bus_id = "ag71xx-mdio.0",
 117                 .phy_addr = 0,
 118                 .platform_data = &epg5000_ar8327_data,
 119         },
 120 };
 121
 122 static int epg5000_get_mac(const char *name, char *mac)
 123 {
 124         u8 *nvram = (u8 *) KSEG1ADDR(EPG5000_NVRAM_ADDR);
 125         int err;
 126
 127         err = ath79_nvram_parse_mac_addr(nvram, EPG5000_NVRAM_SIZE,
 128                                          name, mac);
 129         if (err) {
 130                 pr_err("no MAC address found for %s\n", name);
 131                 return false;
 132         }
 133
 134         return true;
 135 }
 136
 137 static void __init epg5000_setup(void)
 138 {
 139         u8 *caldata = (u8 *) KSEG1ADDR(EPG5000_CALDATA_ADDR);
 140         u8 mac1[ETH_ALEN];
 141
 142         ath79_register_m25p80(NULL);
 143
 144         ath79_register_leds_gpio(-1, ARRAY_SIZE(epg5000_leds_gpio),
 145                                         epg5000_leds_gpio);
 146         ath79_register_gpio_keys_polled(-1, EPG5000_KEYS_POLL_INTERVAL,
 147                                         ARRAY_SIZE(epg5000_gpio_keys),
 148                                         epg5000_gpio_keys);
 149
 150         ath79_register_usb();
 151
 152         ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
 153
 154         ath79_register_mdio(0, 0x0);
 155
 156         mdiobus_register_board_info(epg5000_mdio0_info,
 157                                         ARRAY_SIZE(epg5000_mdio0_info));
 158
 159         /* GMAC0 is connected to an QCA8327N switch */
 160         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 161         ath79_eth0_data.phy_mask = BIT(0);
 162         ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
 163
 164         if (epg5000_get_mac("ethaddr=", mac1))
 165                 ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
 166
 167         ath79_eth0_pll_data.pll_1000 = 0xa6000000;
 168         ath79_register_eth(0);
 169
 170         ath79_register_wmac(caldata + EPG5000_WMAC_CALDATA_OFFSET, mac1);
 171
 172         ath79_register_pci();
 173 }
 174
 175 MIPS_MACHINE(ATH79_MACH_EPG5000, "EPG5000",
 176              "EnGenius EPG5000",
 177              epg5000_setup);