ar71xx: fix section mismatches
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-mynet-n750.c
1 /*
2 * WD My Net N750 board support
3 *
4 * Copyright (C) 2013 Felix Kaechele <felix@fetzig.org>
5 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 */
11
12 #include <linux/pci.h>
13 #include <linux/phy.h>
14 #include <linux/gpio.h>
15 #include <linux/delay.h>
16 #include <linux/platform_device.h>
17 #include <linux/ath9k_platform.h>
18 #include <linux/ar8216_platform.h>
19
20 #include <asm/mach-ath79/ar71xx_regs.h>
21
22 #include "common.h"
23 #include "dev-ap9x-pci.h"
24 #include "dev-eth.h"
25 #include "dev-gpio-buttons.h"
26 #include "dev-leds-gpio.h"
27 #include "dev-m25p80.h"
28 #include "dev-spi.h"
29 #include "dev-usb.h"
30 #include "dev-wmac.h"
31 #include "machtypes.h"
32 #include "nvram.h"
33
34
35 /*
36 * Taken from GPL bootloader source:
37 * board/ar7240/db12x/alpha_gpio.c
38 */
39 #define MYNET_N750_GPIO_LED_WIFI 11
40 #define MYNET_N750_GPIO_LED_INTERNET 12
41 #define MYNET_N750_GPIO_LED_WPS 13
42 #define MYNET_N750_GPIO_LED_POWER 14
43
44 #define MYNET_N750_GPIO_BTN_RESET 17
45 #define MYNET_N750_GPIO_BTN_WPS 19
46
47 #define MYNET_N750_GPIO_EXTERNAL_LNA0 15
48 #define MYNET_N750_GPIO_EXTERNAL_LNA1 18
49
50 #define MYNET_N750_KEYS_POLL_INTERVAL 20 /* msecs */
51 #define MYNET_N750_KEYS_DEBOUNCE_INTERVAL (3 * MYNET_N750_KEYS_POLL_INTERVAL)
52
53 #define MYNET_N750_WMAC_CALDATA_OFFSET 0x1000
54 #define MYNET_N750_PCIE_CALDATA_OFFSET 0x5000
55
56 #define MYNET_N750_NVRAM_ADDR 0x1f058010
57 #define MYNET_N750_NVRAM_SIZE 0x7ff0
58
59 static struct gpio_led mynet_n750_leds_gpio[] __initdata = {
60 {
61 .name = "wd:blue:power",
62 .gpio = MYNET_N750_GPIO_LED_POWER,
63 .active_low = 0,
64 },
65 {
66 .name = "wd:blue:wps",
67 .gpio = MYNET_N750_GPIO_LED_WPS,
68 .active_low = 0,
69 },
70 {
71 .name = "wd:blue:wireless",
72 .gpio = MYNET_N750_GPIO_LED_WIFI,
73 .active_low = 0,
74 },
75 {
76 .name = "wd:blue:internet",
77 .gpio = MYNET_N750_GPIO_LED_INTERNET,
78 .active_low = 0,
79 },
80 };
81
82 static struct gpio_keys_button mynet_n750_gpio_keys[] __initdata = {
83 {
84 .desc = "Reset button",
85 .type = EV_KEY,
86 .code = KEY_RESTART,
87 .debounce_interval = MYNET_N750_KEYS_DEBOUNCE_INTERVAL,
88 .gpio = MYNET_N750_GPIO_BTN_RESET,
89 .active_low = 1,
90 },
91 {
92 .desc = "WPS button",
93 .type = EV_KEY,
94 .code = KEY_WPS_BUTTON,
95 .debounce_interval = MYNET_N750_KEYS_DEBOUNCE_INTERVAL,
96 .gpio = MYNET_N750_GPIO_BTN_WPS,
97 .active_low = 1,
98 },
99 };
100
101 static const struct ar8327_led_info mynet_n750_leds_ar8327[] = {
102 AR8327_LED_INFO(PHY0_0, HW, "wd:green:lan1"),
103 AR8327_LED_INFO(PHY1_0, HW, "wd:green:lan2"),
104 AR8327_LED_INFO(PHY2_0, HW, "wd:green:lan3"),
105 AR8327_LED_INFO(PHY3_0, HW, "wd:green:lan4"),
106 AR8327_LED_INFO(PHY4_0, HW, "wd:green:wan"),
107 AR8327_LED_INFO(PHY0_1, HW, "wd:yellow:lan1"),
108 AR8327_LED_INFO(PHY1_1, HW, "wd:yellow:lan2"),
109 AR8327_LED_INFO(PHY2_1, HW, "wd:yellow:lan3"),
110 AR8327_LED_INFO(PHY3_1, HW, "wd:yellow:lan4"),
111 AR8327_LED_INFO(PHY4_1, HW, "wd:yellow:wan"),
112 };
113
114 static struct ar8327_pad_cfg mynet_n750_ar8327_pad0_cfg = {
115 .mode = AR8327_PAD_MAC_RGMII,
116 .txclk_delay_en = true,
117 .rxclk_delay_en = true,
118 .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
119 .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
120 };
121
122 static struct ar8327_led_cfg mynet_n750_ar8327_led_cfg = {
123 .led_ctrl0 = 0xcc35cc35,
124 .led_ctrl1 = 0xca35ca35,
125 .led_ctrl2 = 0xc935c935,
126 .led_ctrl3 = 0x03ffff00,
127 .open_drain = false,
128 };
129
130 static struct ar8327_platform_data mynet_n750_ar8327_data = {
131 .pad0_cfg = &mynet_n750_ar8327_pad0_cfg,
132 .port0_cfg = {
133 .force_link = 1,
134 .speed = AR8327_PORT_SPEED_1000,
135 .duplex = 1,
136 .txpause = 1,
137 .rxpause = 1,
138 },
139 .led_cfg = &mynet_n750_ar8327_led_cfg,
140 .num_leds = ARRAY_SIZE(mynet_n750_leds_ar8327),
141 .leds = mynet_n750_leds_ar8327,
142 };
143
144 static struct mdio_board_info mynet_n750_mdio0_info[] = {
145 {
146 .bus_id = "ag71xx-mdio.0",
147 .phy_addr = 0,
148 .platform_data = &mynet_n750_ar8327_data,
149 },
150 };
151
152 static void mynet_n750_get_mac(const char *name, char *mac)
153 {
154 u8 *nvram = (u8 *) KSEG1ADDR(MYNET_N750_NVRAM_ADDR);
155 int err;
156
157 err = ath79_nvram_parse_mac_addr(nvram, MYNET_N750_NVRAM_SIZE,
158 name, mac);
159 if (err)
160 pr_err("no MAC address found for %s\n", name);
161 }
162
163 /*
164 * The bootloader on this board powers down all PHYs on the switch
165 * before booting the kernel. We bring all PHYs back up so that they are
166 * discoverable by the mdio bus scan and the switch is detected
167 * correctly.
168 */
169 static void mynet_n750_mdio_fixup(struct mii_bus *bus)
170 {
171 int i;
172
173 for (i = 0; i < 5; i++)
174 bus->write(bus, i, MII_BMCR,
175 (BMCR_RESET | BMCR_ANENABLE | BMCR_SPEED1000));
176
177 mdelay(1000);
178 }
179
180 static void __init mynet_n750_setup(void)
181 {
182 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
183 u8 tmpmac[ETH_ALEN];
184
185 ath79_register_m25p80(NULL);
186 ath79_register_leds_gpio(-1, ARRAY_SIZE(mynet_n750_leds_gpio),
187 mynet_n750_leds_gpio);
188 ath79_register_gpio_keys_polled(-1, MYNET_N750_KEYS_POLL_INTERVAL,
189 ARRAY_SIZE(mynet_n750_gpio_keys),
190 mynet_n750_gpio_keys);
191 /*
192 * Control signal for external LNAs 0 and 1
193 * Taken from GPL bootloader source:
194 * board/ar7240/db12x/alpha_gpio.c
195 */
196 ath79_wmac_set_ext_lna_gpio(0, MYNET_N750_GPIO_EXTERNAL_LNA0);
197 ath79_wmac_set_ext_lna_gpio(1, MYNET_N750_GPIO_EXTERNAL_LNA1);
198
199 mynet_n750_get_mac("wlan24mac=", tmpmac);
200 ath79_register_wmac(art + MYNET_N750_WMAC_CALDATA_OFFSET, tmpmac);
201
202 mynet_n750_get_mac("wlan5mac=", tmpmac);
203 ap91_pci_init(art + MYNET_N750_PCIE_CALDATA_OFFSET, tmpmac);
204
205 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
206
207 mdiobus_register_board_info(mynet_n750_mdio0_info,
208 ARRAY_SIZE(mynet_n750_mdio0_info));
209
210 ath79_mdio0_data.reset = mynet_n750_mdio_fixup;
211 ath79_register_mdio(0, 0x0);
212
213 mynet_n750_get_mac("lanmac=", ath79_eth0_data.mac_addr);
214
215 /* GMAC0 is connected to an AR8327N switch */
216 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
217 ath79_eth0_data.phy_mask = BIT(0);
218 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
219 ath79_eth0_pll_data.pll_1000 = 0x06000000;
220 ath79_register_eth(0);
221
222 ath79_register_usb();
223 }
224
225 MIPS_MACHINE(ATH79_MACH_MYNET_N750, "MYNET-N750", "WD My Net N750",
226 mynet_n750_setup);