ag71xx: add F1E specific feature bit definitions to AR934X register file
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-mynet-rext.c
1 /*
2 * WD My Net WI-FI Range Extender (Codename:Starfish db12x) board support
3 *
4 * Copyright (C) 2013 Christian Lamparter <chunkeey@googlemail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11 #include <linux/pci.h>
12 #include <linux/phy.h>
13 #include <linux/gpio.h>
14 #include <linux/platform_device.h>
15 #include <linux/ath9k_platform.h>
16 #include <linux/ar8216_platform.h>
17
18 #include <asm/mach-ath79/ar71xx_regs.h>
19
20 #include "common.h"
21 #include "dev-ap9x-pci.h"
22 #include "dev-eth.h"
23 #include "dev-gpio-buttons.h"
24 #include "dev-leds-gpio.h"
25 #include "dev-m25p80.h"
26 #include "dev-spi.h"
27 #include "dev-usb.h"
28 #include "dev-wmac.h"
29 #include "machtypes.h"
30 #include "nvram.h"
31
32 #define MYNET_REXT_GPIO_LED_POWER 11
33 #define MYNET_REXT_GPIO_LED_ETHERNET 12
34 #define MYNET_REXT_GPIO_LED_WIFI 19
35
36 #define MYNET_REXT_GPIO_LED_RF_QTY1 20
37 #define MYNET_REXT_GPIO_LED_RF_QTY2 21
38 #define MYNET_REXT_GPIO_LED_RF_QTY3 22
39
40 #define MYNET_REXT_GPIO_BTN_RESET 13
41 #define MYNET_REXT_GPIO_BTN_WPS 15
42 #define MYNET_REXT_GPIO_SW_RF 14
43
44 #define MYNET_REXT_GPIO_PHY_SWRST 16 /* disables Ethernet PHY */
45 #define MYNET_REXT_GPIO_PHY_INT 17
46 #define MYNET_REXT_GPIO_18 18
47
48 #define MYNET_REXT_KEYS_POLL_INTERVAL 20 /* msecs */
49 #define MYNET_REXT_KEYS_DEBOUNCE_INTERVAL (3 * MYNET_REXT_KEYS_POLL_INTERVAL)
50
51 #define MYNET_REXT_WMAC_CALDATA_OFFSET 0x1000
52
53 #define MYNET_REXT_NVRAM_ADDR 0x1f7e0010
54 #define MYNET_REXT_NVRAM_SIZE 0xfff0
55
56 #define MYNET_REXT_ART_ADDR 0x1f7f0000
57
58 static struct gpio_led mynet_rext_leds_gpio[] __initdata = {
59 {
60 .name = "wd:blue:power",
61 .gpio = MYNET_REXT_GPIO_LED_POWER,
62 .active_low = 0,
63 },
64 {
65 .name = "wd:blue:wireless",
66 .gpio = MYNET_REXT_GPIO_LED_WIFI,
67 .active_low = 1,
68 },
69 {
70 .name = "wd:blue:ethernet",
71 .gpio = MYNET_REXT_GPIO_LED_ETHERNET,
72 .active_low = 1,
73 },
74 {
75 .name = "wd:blue:quality1",
76 .gpio = MYNET_REXT_GPIO_LED_RF_QTY1,
77 .active_low = 1,
78 },
79 {
80 .name = "wd:blue:quality2",
81 .gpio = MYNET_REXT_GPIO_LED_RF_QTY2,
82 .active_low = 1,
83 },
84 {
85 .name = "wd:blue:quality3",
86 .gpio = MYNET_REXT_GPIO_LED_RF_QTY3,
87 .active_low = 1,
88 },
89 };
90
91 static struct gpio_keys_button mynet_rext_gpio_keys[] __initdata = {
92 {
93 .desc = "Reset button",
94 .type = EV_KEY,
95 .code = KEY_RESTART,
96 .debounce_interval = MYNET_REXT_KEYS_DEBOUNCE_INTERVAL,
97 .gpio = MYNET_REXT_GPIO_BTN_RESET,
98 .active_low = 1,
99 },
100 {
101 .desc = "WPS button",
102 .type = EV_KEY,
103 .code = KEY_WPS_BUTTON,
104 .debounce_interval = MYNET_REXT_KEYS_DEBOUNCE_INTERVAL,
105 .gpio = MYNET_REXT_GPIO_BTN_WPS,
106 .active_low = 1,
107 },
108 {
109 .desc = "RF Band switch",
110 .type = EV_SW,
111 .code = BTN_1,
112 .debounce_interval = MYNET_REXT_KEYS_DEBOUNCE_INTERVAL,
113 .gpio = MYNET_REXT_GPIO_SW_RF,
114 },
115 };
116
117 static void mynet_rext_get_mac(const char *name, char *mac)
118 {
119 u8 *nvram = (u8 *) KSEG1ADDR(MYNET_REXT_NVRAM_ADDR);
120 int err;
121
122 err = ath79_nvram_parse_mac_addr(nvram, MYNET_REXT_NVRAM_SIZE,
123 name, mac);
124 if (err)
125 pr_err("no MAC address found for %s\n", name);
126 }
127
128 static void __init mynet_rext_setup(void)
129 {
130 u8 *art = (u8 *) KSEG1ADDR(MYNET_REXT_ART_ADDR);
131 u8 tmpmac[ETH_ALEN];
132
133 ath79_register_m25p80(NULL);
134
135 /* GPIO configuration from drivers/char/GPIO8.c */
136
137 ath79_gpio_output_select(MYNET_REXT_GPIO_LED_POWER,
138 AR934X_GPIO_OUT_GPIO);
139 ath79_gpio_output_select(MYNET_REXT_GPIO_LED_WIFI,
140 AR934X_GPIO_OUT_GPIO);
141 ath79_gpio_output_select(MYNET_REXT_GPIO_LED_RF_QTY1,
142 AR934X_GPIO_OUT_GPIO);
143 ath79_gpio_output_select(MYNET_REXT_GPIO_LED_RF_QTY2,
144 AR934X_GPIO_OUT_GPIO);
145 ath79_gpio_output_select(MYNET_REXT_GPIO_LED_RF_QTY3,
146 AR934X_GPIO_OUT_GPIO);
147 ath79_gpio_output_select(MYNET_REXT_GPIO_LED_ETHERNET,
148 AR934X_GPIO_OUT_GPIO);
149 ath79_register_leds_gpio(-1, ARRAY_SIZE(mynet_rext_leds_gpio),
150 mynet_rext_leds_gpio);
151
152 ath79_register_gpio_keys_polled(-1, MYNET_REXT_KEYS_POLL_INTERVAL,
153 ARRAY_SIZE(mynet_rext_gpio_keys),
154 mynet_rext_gpio_keys);
155
156 mynet_rext_get_mac("wl0_hwaddr=", tmpmac);
157 ath79_register_wmac(art + MYNET_REXT_WMAC_CALDATA_OFFSET, tmpmac);
158
159 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
160
161 ath79_register_mdio(0, 0x0);
162
163 /* LAN */
164 mynet_rext_get_mac("et0macaddr=", ath79_eth0_data.mac_addr);
165
166 /* GMAC0 is connected to an external PHY on Port 4 */
167 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
168 ath79_eth0_data.phy_mask = BIT(4);
169 ath79_eth0_pll_data.pll_1000 = 0x0e000000; /* athrs_mac.c */
170 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
171 ath79_register_eth(0);
172 }
173
174 MIPS_MACHINE(ATH79_MACH_MYNET_REXT, "MYNET-REXT",
175 "WD My Net Wi-Fi Range Extender", mynet_rext_setup);