target/linux/ar71xx/files/arch/mips/ath79/mach-om2p.c

   1 /*
   2  *  OpenMesh OM2P support
   3  *
   4  *  Copyright (C) 2011 Marek Lindner <marek@open-mesh.com>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License version 2 as published
   8  *  by the Free Software Foundation.
   9  */
  10
  11 #include <linux/gpio.h>
  12 #include <linux/mtd/mtd.h>
  13 #include <linux/mtd/partitions.h>
  14 #include <linux/platform_device.h>
  15
  16 #include <asm/mach-ath79/ar71xx_regs.h>
  17 #include <asm/mach-ath79/ath79.h>
  18
  19 #include "common.h"
  20 #include "dev-ap9x-pci.h"
  21 #include "dev-eth.h"
  22 #include "dev-gpio-buttons.h"
  23 #include "dev-leds-gpio.h"
  24 #include "dev-m25p80.h"
  25 #include "dev-wmac.h"
  26 #include "machtypes.h"
  27
  28 #define OM2P_GPIO_LED_POWER     0
  29 #define OM2P_GPIO_LED_GREEN     13
  30 #define OM2P_GPIO_LED_RED       14
  31 #define OM2P_GPIO_LED_YELLOW    15
  32 #define OM2P_GPIO_LED_LAN       16
  33 #define OM2P_GPIO_LED_WAN       17
  34 #define OM2P_GPIO_BTN_RESET     1
  35
  36 #define OM2P_KEYS_POLL_INTERVAL         20      /* msecs */
  37 #define OM2P_KEYS_DEBOUNCE_INTERVAL     (3 * OM2P_KEYS_POLL_INTERVAL)
  38
  39 #define OM2P_WAN_PHYMASK        BIT(4)
  40
  41 #define OM2P_LC_GPIO_LED_POWER  1
  42 #define OM2P_LC_GPIO_LED_GREEN  15
  43 #define OM2P_LC_GPIO_LED_RED    16
  44 #define OM2P_LC_GPIO_LED_YELLOW 0
  45 #define OM2P_LC_GPIO_LED_LAN    13
  46 #define OM2P_LC_GPIO_LED_WAN    17
  47 #define OM2P_LC_GPIO_BTN_RESET  12
  48
  49 #define OM2Pv4_GPIO_LED_POWER   0
  50 #define OM2Pv4_GPIO_LED_GREEN   2
  51 #define OM2Pv4_GPIO_LED_RED     4
  52 #define OM2Pv4_GPIO_LED_YELLOW  3
  53 #define OM2Pv4_GPIO_LED_LAN     14
  54 #define OM2Pv4_GPIO_LED_WAN     13
  55 #define OM2Pv4_GPIO_BTN_RESET   1
  56
  57 #define OM2P_WMAC_CALDATA_OFFSET        0x1000
  58
  59 static struct flash_platform_data om2p_flash_data = {
  60         .type = "s25sl12800",
  61         .name = "ar7240-nor0",
  62 };
  63
  64 static struct gpio_led om2p_leds_gpio[] __initdata = {
  65         {
  66                 .name           = "om2p:blue:power",
  67                 .gpio           = OM2P_GPIO_LED_POWER,
  68                 .active_low     = 1,
  69         }, {
  70                 .name           = "om2p:red:wifi",
  71                 .gpio           = OM2P_GPIO_LED_RED,
  72                 .active_low     = 1,
  73         }, {
  74                 .name           = "om2p:yellow:wifi",
  75                 .gpio           = OM2P_GPIO_LED_YELLOW,
  76                 .active_low     = 1,
  77         }, {
  78                 .name           = "om2p:green:wifi",
  79                 .gpio           = OM2P_GPIO_LED_GREEN,
  80                 .active_low     = 1,
  81         }, {
  82                 .name           = "om2p:blue:lan",
  83                 .gpio           = OM2P_GPIO_LED_LAN,
  84                 .active_low     = 1,
  85         }, {
  86                 .name           = "om2p:blue:wan",
  87                 .gpio           = OM2P_GPIO_LED_WAN,
  88                 .active_low     = 1,
  89         }
  90 };
  91
  92 static struct gpio_keys_button om2p_gpio_keys[] __initdata = {
  93         {
  94                 .desc           = "reset",
  95                 .type           = EV_KEY,
  96                 .code           = KEY_RESTART,
  97                 .debounce_interval = OM2P_KEYS_DEBOUNCE_INTERVAL,
  98                 .gpio           = OM2P_GPIO_BTN_RESET,
  99                 .active_low     = 1,
 100         }
 101 };
 102
 103 static void __init om2p_setup(void)
 104 {
 105         u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000);
 106         u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN);
 107         u8 *ee = (u8 *)KSEG1ADDR(0x1ffc1000);
 108
 109         ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
 110                                     AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
 111                                     AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
 112                                     AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
 113                                     AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
 114
 115         ath79_register_m25p80(&om2p_flash_data);
 116
 117         ath79_register_mdio(0, ~OM2P_WAN_PHYMASK);
 118
 119         ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
 120         ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0);
 121
 122         ath79_register_eth(0);
 123         ath79_register_eth(1);
 124
 125         ap91_pci_init(ee, NULL);
 126
 127         ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio),
 128                                  om2p_leds_gpio);
 129
 130         ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL,
 131                                         ARRAY_SIZE(om2p_gpio_keys),
 132                                         om2p_gpio_keys);
 133 }
 134
 135 MIPS_MACHINE(ATH79_MACH_OM2P, "OM2P", "OpenMesh OM2P", om2p_setup);
 136
 137
 138 static struct flash_platform_data om2p_lc_flash_data = {
 139         .type = "s25sl12800",
 140 };
 141
 142 static void __init om2p_lc_setup(void)
 143 {
 144         u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000);
 145         u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN);
 146         u8 *art = (u8 *)KSEG1ADDR(0x1ffc1000);
 147         u32 t;
 148
 149         ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
 150                                     AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
 151                                     AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
 152                                     AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
 153                                     AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
 154
 155         t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
 156         t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN;
 157         ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t);
 158
 159         ath79_register_m25p80(&om2p_lc_flash_data);
 160
 161         om2p_leds_gpio[0].gpio = OM2P_LC_GPIO_LED_POWER;
 162         om2p_leds_gpio[1].gpio = OM2P_LC_GPIO_LED_RED;
 163         om2p_leds_gpio[2].gpio = OM2P_LC_GPIO_LED_YELLOW;
 164         om2p_leds_gpio[3].gpio = OM2P_LC_GPIO_LED_GREEN;
 165         om2p_leds_gpio[4].gpio = OM2P_LC_GPIO_LED_LAN;
 166         om2p_leds_gpio[5].gpio = OM2P_LC_GPIO_LED_WAN;
 167         ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio),
 168                                  om2p_leds_gpio);
 169
 170         om2p_gpio_keys[0].gpio = OM2P_LC_GPIO_BTN_RESET;
 171         ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL,
 172                                         ARRAY_SIZE(om2p_gpio_keys),
 173                                         om2p_gpio_keys);
 174
 175         ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
 176         ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0);
 177
 178         ath79_register_mdio(0, 0x0);
 179
 180         ath79_register_eth(0);
 181         ath79_register_eth(1);
 182
 183         ath79_register_wmac(art, NULL);
 184 }
 185
 186 MIPS_MACHINE(ATH79_MACH_OM2P_LC, "OM2P-LC", "OpenMesh OM2P LC", om2p_lc_setup);
 187 MIPS_MACHINE(ATH79_MACH_OM2Pv2, "OM2Pv2", "OpenMesh OM2Pv2", om2p_lc_setup);
 188
 189 static void __init om2p_hs_setup(void)
 190 {
 191         u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000);
 192         u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN);
 193         u8 *art = (u8 *)KSEG1ADDR(0x1ffc1000);
 194
 195         /* make lan / wan leds software controllable */
 196         ath79_gpio_output_select(OM2P_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO);
 197         ath79_gpio_output_select(OM2P_GPIO_LED_WAN, AR934X_GPIO_OUT_GPIO);
 198
 199         /* enable reset button */
 200         ath79_gpio_output_select(OM2P_GPIO_BTN_RESET, AR934X_GPIO_OUT_GPIO);
 201         ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
 202
 203         om2p_leds_gpio[4].gpio = OM2P_GPIO_LED_WAN;
 204         om2p_leds_gpio[5].gpio = OM2P_GPIO_LED_LAN;
 205
 206         ath79_register_m25p80(&om2p_lc_flash_data);
 207         ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio),
 208                                  om2p_leds_gpio);
 209         ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL,
 210                                         ARRAY_SIZE(om2p_gpio_keys),
 211                                         om2p_gpio_keys);
 212
 213         ath79_register_wmac(art, NULL);
 214
 215         ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP);
 216         ath79_register_mdio(1, 0x0);
 217
 218         ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
 219         ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0);
 220
 221         /* GMAC0 is connected to the PHY0 of the internal switch */
 222         ath79_switch_data.phy4_mii_en = 1;
 223         ath79_switch_data.phy_poll_mask = BIT(0);
 224         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
 225         ath79_eth0_data.phy_mask = BIT(0);
 226         ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
 227         ath79_register_eth(0);
 228
 229         /* GMAC1 is connected to the internal switch */
 230         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
 231         ath79_register_eth(1);
 232 }
 233
 234 MIPS_MACHINE(ATH79_MACH_OM2P_HS, "OM2P-HS", "OpenMesh OM2P HS", om2p_hs_setup);
 235 MIPS_MACHINE(ATH79_MACH_OM2P_HSv2, "OM2P-HSv2", "OpenMesh OM2P HSv2", om2p_hs_setup);
 236 MIPS_MACHINE(ATH79_MACH_OM2P_HSv3, "OM2P-HSv3", "OpenMesh OM2P HSv3", om2p_hs_setup);
 237
 238 static struct flash_platform_data om2pv4_flash_data = {
 239         .type = "s25sl12800",
 240 };
 241
 242 static struct gpio_led om2pv4_leds_gpio[] __initdata = {
 243         {
 244                 .name           = "om2p:blue:power",
 245                 .gpio           = OM2Pv4_GPIO_LED_POWER,
 246                 .active_low     = 1,
 247         }, {
 248                 .name           = "om2p:red:wifi",
 249                 .gpio           = OM2Pv4_GPIO_LED_RED,
 250                 .active_low     = 1,
 251         }, {
 252                 .name           = "om2p:yellow:wifi",
 253                 .gpio           = OM2Pv4_GPIO_LED_YELLOW,
 254                 .active_low     = 1,
 255         }, {
 256                 .name           = "om2p:green:wifi",
 257                 .gpio           = OM2Pv4_GPIO_LED_GREEN,
 258                 .active_low     = 1,
 259         }, {
 260                 .name           = "om2p:blue:lan",
 261                 .gpio           = OM2Pv4_GPIO_LED_LAN,
 262                 .active_low     = 1,
 263         }, {
 264                 .name           = "om2p:blue:wan",
 265                 .gpio           = OM2Pv4_GPIO_LED_WAN,
 266                 .active_low     = 1,
 267         }
 268 };
 269
 270 static struct gpio_keys_button om2pv4_gpio_keys[] __initdata = {
 271         {
 272                 .desc           = "reset",
 273                 .type           = EV_KEY,
 274                 .code           = KEY_RESTART,
 275                 .debounce_interval = OM2P_KEYS_DEBOUNCE_INTERVAL,
 276                 .gpio           = OM2Pv4_GPIO_BTN_RESET,
 277                 .active_low     = 1,
 278         }
 279 };
 280
 281 static void __init om2pv4_setup(void)
 282 {
 283         u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000);
 284         u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN);
 285         u8 *art = (u8 *)KSEG1ADDR(0x1ffc0000);
 286         u8 wmac[6];
 287
 288         ath79_register_m25p80(&om2pv4_flash_data);
 289         ath79_register_leds_gpio(-1, ARRAY_SIZE(om2pv4_leds_gpio),
 290                                  om2pv4_leds_gpio);
 291         ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL,
 292                                         ARRAY_SIZE(om2pv4_gpio_keys),
 293                                         om2pv4_gpio_keys);
 294
 295         ath79_init_mac(wmac, art, 0x02);
 296         ath79_register_wmac(art + OM2P_WMAC_CALDATA_OFFSET, wmac);
 297
 298         ath79_setup_ar933x_phy4_switch(false, false);
 299
 300         ath79_register_mdio(0, 0x0);
 301
 302         /* LAN */
 303         ath79_switch_data.phy4_mii_en = 1;
 304         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
 305         ath79_eth0_data.duplex = DUPLEX_FULL;
 306         ath79_eth0_data.speed = SPEED_100;
 307         ath79_eth0_data.phy_mask = BIT(4);
 308         ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0);
 309         ath79_register_eth(0);
 310
 311         /* WAN */
 312         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
 313         ath79_eth1_data.duplex = DUPLEX_FULL;
 314         ath79_switch_data.phy_poll_mask |= BIT(4);
 315         ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
 316         ath79_register_eth(1);
 317 }
 318
 319 MIPS_MACHINE(ATH79_MACH_OM2Pv4, "OM2Pv4", "OpenMesh OM2Pv4", om2pv4_setup);
 320 MIPS_MACHINE(ATH79_MACH_OM2P_HSv4, "OM2P-HSv4", "OpenMesh OM2P HSv4", om2pv4_setup);