ar71xx: fix WLAN led for RB751U-2HnD and RB751G-2HnD
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-rb750.c
1 /*
2 * MikroTik RouterBOARD 750/750GL support
3 *
4 * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11 #include <linux/export.h>
12 #include <linux/pci.h>
13 #include <linux/ath9k_platform.h>
14 #include <linux/platform_device.h>
15 #include <linux/phy.h>
16 #include <linux/ar8216_platform.h>
17
18 #include <asm/mach-ath79/ar71xx_regs.h>
19 #include <asm/mach-ath79/ath79.h>
20 #include <asm/mach-ath79/pci.h>
21 #include <asm/mach-ath79/irq.h>
22 #include <asm/mach-ath79/mach-rb750.h>
23
24 #include "common.h"
25 #include "dev-ap9x-pci.h"
26 #include "dev-usb.h"
27 #include "dev-eth.h"
28 #include "machtypes.h"
29
30 static struct rb750_led_data rb750_leds[] = {
31 {
32 .name = "rb750:green:act",
33 .mask = RB750_LED_ACT,
34 .active_low = 1,
35 }, {
36 .name = "rb750:green:port1",
37 .mask = RB750_LED_PORT5,
38 .active_low = 1,
39 }, {
40 .name = "rb750:green:port2",
41 .mask = RB750_LED_PORT4,
42 .active_low = 1,
43 }, {
44 .name = "rb750:green:port3",
45 .mask = RB750_LED_PORT3,
46 .active_low = 1,
47 }, {
48 .name = "rb750:green:port4",
49 .mask = RB750_LED_PORT2,
50 .active_low = 1,
51 }, {
52 .name = "rb750:green:port5",
53 .mask = RB750_LED_PORT1,
54 .active_low = 1,
55 }
56 };
57
58 static struct rb750_led_data rb750gr3_leds[] = {
59 {
60 .name = "rb750:green:act",
61 .mask = RB7XX_LED_ACT,
62 .active_low = 1,
63 },
64 };
65
66 static struct rb750_led_platform_data rb750_leds_data;
67 static struct platform_device rb750_leds_device = {
68 .name = "leds-rb750",
69 .dev = {
70 .platform_data = &rb750_leds_data,
71 }
72 };
73
74 static struct rb7xx_nand_platform_data rb750_nand_data;
75 static struct platform_device rb750_nand_device = {
76 .name = "rb750-nand",
77 .id = -1,
78 .dev = {
79 .platform_data = &rb750_nand_data,
80 }
81 };
82
83 static void rb750_latch_change(u32 mask_clr, u32 mask_set)
84 {
85 static DEFINE_SPINLOCK(lock);
86 static u32 latch_set = RB750_LED_BITS | RB750_LVC573_LE;
87 static u32 latch_oe;
88 static u32 latch_clr;
89 unsigned long flags;
90 u32 t;
91
92 spin_lock_irqsave(&lock, flags);
93
94 if ((mask_clr & BIT(31)) != 0 &&
95 (latch_set & RB750_LVC573_LE) == 0) {
96 goto unlock;
97 }
98
99 latch_set = (latch_set | mask_set) & ~mask_clr;
100 latch_clr = (latch_clr | mask_clr) & ~mask_set;
101
102 if (latch_oe == 0)
103 latch_oe = __raw_readl(ath79_gpio_base + AR71XX_GPIO_REG_OE);
104
105 if (likely(latch_set & RB750_LVC573_LE)) {
106 void __iomem *base = ath79_gpio_base;
107
108 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
109 t |= mask_clr | latch_oe | mask_set;
110
111 __raw_writel(t, base + AR71XX_GPIO_REG_OE);
112 __raw_writel(latch_clr, base + AR71XX_GPIO_REG_CLEAR);
113 __raw_writel(latch_set, base + AR71XX_GPIO_REG_SET);
114 } else if (mask_clr & RB750_LVC573_LE) {
115 void __iomem *base = ath79_gpio_base;
116
117 latch_oe = __raw_readl(base + AR71XX_GPIO_REG_OE);
118 __raw_writel(RB750_LVC573_LE, base + AR71XX_GPIO_REG_CLEAR);
119 /* flush write */
120 __raw_readl(base + AR71XX_GPIO_REG_CLEAR);
121 }
122
123 unlock:
124 spin_unlock_irqrestore(&lock, flags);
125 }
126
127 static void rb750_nand_enable_pins(void)
128 {
129 rb750_latch_change(RB750_LVC573_LE, 0);
130 ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE,
131 AR724X_GPIO_FUNC_SPI_EN);
132 }
133
134 static void rb750_nand_disable_pins(void)
135 {
136 ath79_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN,
137 AR724X_GPIO_FUNC_JTAG_DISABLE);
138 rb750_latch_change(0, RB750_LVC573_LE);
139 }
140
141 static void __init rb750_setup(void)
142 {
143 ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
144 AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
145 AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
146 AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
147 AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
148
149 ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
150 ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1);
151
152 ath79_register_mdio(0, 0x0);
153
154 /* LAN ports */
155 ath79_register_eth(1);
156
157 /* WAN port */
158 ath79_register_eth(0);
159
160 rb750_leds_data.num_leds = ARRAY_SIZE(rb750_leds);
161 rb750_leds_data.leds = rb750_leds;
162 rb750_leds_data.latch_change = rb750_latch_change;
163 platform_device_register(&rb750_leds_device);
164
165 rb750_nand_data.nce_line = RB750_NAND_NCE;
166 rb750_nand_data.enable_pins = rb750_nand_enable_pins;
167 rb750_nand_data.disable_pins = rb750_nand_disable_pins;
168 rb750_nand_data.latch_change = rb750_latch_change;
169 platform_device_register(&rb750_nand_device);
170 }
171
172 MIPS_MACHINE(ATH79_MACH_RB_750, "750i", "MikroTik RouterBOARD 750",
173 rb750_setup);
174
175 static struct ar8327_pad_cfg rb750gr3_ar8327_pad0_cfg = {
176 .mode = AR8327_PAD_MAC_RGMII,
177 .txclk_delay_en = true,
178 .rxclk_delay_en = true,
179 .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
180 .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
181 };
182
183 static struct ar8327_platform_data rb750gr3_ar8327_data = {
184 .pad0_cfg = &rb750gr3_ar8327_pad0_cfg,
185 .cpuport_cfg = {
186 .force_link = 1,
187 .speed = AR8327_PORT_SPEED_100,
188 .duplex = 1,
189 .txpause = 1,
190 .rxpause = 1,
191 }
192 };
193
194 static struct mdio_board_info rb750g3_mdio_info[] = {
195 {
196 .bus_id = "ag71xx-mdio.0",
197 .phy_addr = 0,
198 .platform_data = &rb750gr3_ar8327_data,
199 },
200 };
201
202 static void rb750gr3_nand_enable_pins(void)
203 {
204 ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE,
205 AR724X_GPIO_FUNC_SPI_EN |
206 AR724X_GPIO_FUNC_SPI_CS_EN2);
207 }
208
209 static void rb750gr3_nand_disable_pins(void)
210 {
211 ath79_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN |
212 AR724X_GPIO_FUNC_SPI_CS_EN2,
213 AR724X_GPIO_FUNC_JTAG_DISABLE);
214 }
215
216 static void rb750gr3_latch_change(u32 mask_clr, u32 mask_set)
217 {
218 static DEFINE_SPINLOCK(lock);
219 static u32 latch_set = RB7XX_LED_ACT;
220 static u32 latch_clr;
221 void __iomem *base = ath79_gpio_base;
222 unsigned long flags;
223 u32 t;
224
225 spin_lock_irqsave(&lock, flags);
226
227 latch_set = (latch_set | mask_set) & ~mask_clr;
228 latch_clr = (latch_clr | mask_clr) & ~mask_set;
229
230 mask_set = latch_set & (RB7XX_USB_POWERON | RB7XX_MONITOR);
231 mask_clr = latch_clr & (RB7XX_USB_POWERON | RB7XX_MONITOR);
232
233 if ((latch_set ^ RB7XX_LED_ACT) & RB7XX_LED_ACT) {
234 /* enable output mode */
235 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
236 t |= RB7XX_LED_ACT;
237 __raw_writel(t, base + AR71XX_GPIO_REG_OE);
238
239 mask_clr |= RB7XX_LED_ACT;
240 } else {
241 /* disable output mode */
242 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
243 t &= ~RB7XX_LED_ACT;
244 __raw_writel(t, base + AR71XX_GPIO_REG_OE);
245 }
246
247 __raw_writel(mask_set, base + AR71XX_GPIO_REG_SET);
248 __raw_writel(mask_clr, base + AR71XX_GPIO_REG_CLEAR);
249
250 spin_unlock_irqrestore(&lock, flags);
251 }
252
253 static void __init rb750gr3_setup(void)
254 {
255 ath79_register_mdio(0, 0x0);
256 mdiobus_register_board_info(rb750g3_mdio_info,
257 ARRAY_SIZE(rb750g3_mdio_info));
258
259 ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
260 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
261 ath79_eth0_data.phy_mask = BIT(0);
262
263 ath79_register_eth(0);
264
265 rb750_leds_data.num_leds = ARRAY_SIZE(rb750gr3_leds);
266 rb750_leds_data.leds = rb750gr3_leds;
267 rb750_leds_data.latch_change = rb750gr3_latch_change;
268 platform_device_register(&rb750_leds_device);
269
270 rb750_nand_data.nce_line = RB7XX_NAND_NCE;
271 rb750_nand_data.enable_pins = rb750gr3_nand_enable_pins;
272 rb750_nand_data.disable_pins = rb750gr3_nand_disable_pins;
273 rb750_nand_data.latch_change = rb750gr3_latch_change;
274 platform_device_register(&rb750_nand_device);
275 }
276
277 MIPS_MACHINE(ATH79_MACH_RB_750G_R3, "750Gr3", "MikroTik RouterBOARD 750GL",
278 rb750gr3_setup);
279
280 static int decode_rle(char *output, int len, char *in)
281 {
282 char *ptr = output;
283 char *end = output + len;
284
285 if (!output || !in)
286 return -EINVAL;
287
288 while (*in) {
289 if (*in < 0) {
290 int i = -*in++;
291 while (i-- > 0) {
292 if (ptr >= end)
293 return -EINVAL;
294 *ptr++ = *in++;
295 }
296 } else if (*in > 0) {
297 int i = *in++;
298 while (i-- > 0) {
299 if (ptr >= end)
300 return -EINVAL;
301 *ptr++ = *in;
302 }
303 in++;
304 }
305 }
306
307 return ptr - output;
308 }
309
310 #define RB751_HARDCONFIG 0x1f00b000
311 #define RB751_MAC_ADDRESS_OFFSET 0xE80
312 #define RB751_CALDATA_OFFSET 0x27C
313
314 static void __init rb751_wlan_setup(void)
315 {
316 u8 *hardconfig = (u8 *) KSEG1ADDR(RB751_HARDCONFIG);
317 struct ath9k_platform_data *wmac_data;
318 int dec_size;
319
320 wmac_data = ap9x_pci_get_wmac_data(0);
321 if (!wmac_data) {
322 pr_err("rb75x: unable to get address of wlan data\n");
323 return;
324 }
325
326 ap9x_pci_setup_wmac_led_pin(0, 9);
327
328 dec_size = decode_rle((char *) wmac_data->eeprom_data,
329 sizeof(wmac_data->eeprom_data),
330 hardconfig + RB751_CALDATA_OFFSET);
331 if (dec_size != sizeof(wmac_data->eeprom_data)) {
332 pr_err("rb75x: unable to decode wlan eeprom data\n");
333 return;
334 }
335
336 ap91_pci_init(NULL, hardconfig + RB751_MAC_ADDRESS_OFFSET);
337 }
338
339 static void __init rb751_setup(void)
340 {
341 rb750_setup();
342 ath79_register_usb();
343 rb751_wlan_setup();
344 }
345
346 MIPS_MACHINE(ATH79_MACH_RB_751, "751", "MikroTik RouterBOARD 751",
347 rb751_setup);
348
349 static void __init rb751g_setup(void)
350 {
351 rb750gr3_setup();
352 ath79_register_usb();
353 rb751_wlan_setup();
354 }
355
356 MIPS_MACHINE(ATH79_MACH_RB_751G, "751g", "MikroTik RouterBOARD 751G",
357 rb751g_setup);