ar71xx: add missing include for checking kernel version
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-rb91x.c
1 /*
2 * MikroTik RouterBOARD 91X support
3 *
4 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11 #define pr_fmt(fmt) "rb91x: " fmt
12
13 #include <linux/version.h>
14 #include <linux/phy.h>
15 #include <linux/delay.h>
16 #include <linux/platform_device.h>
17 #include <linux/ath9k_platform.h>
18 #include <linux/mtd/mtd.h>
19 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
20 #include <linux/mtd/nand.h>
21 #else
22 #include <linux/mtd/rawnand.h>
23 #endif
24 #include <linux/mtd/partitions.h>
25 #include <linux/spi/spi.h>
26 #include <linux/spi/74x164.h>
27 #include <linux/spi/flash.h>
28 #include <linux/routerboot.h>
29 #include <linux/gpio.h>
30 #include <linux/platform_data/gpio-latch.h>
31 #include <linux/platform_data/rb91x_nand.h>
32 #include <linux/platform_data/phy-at803x.h>
33
34 #include <asm/prom.h>
35 #include <asm/mach-ath79/ath79.h>
36 #include <asm/mach-ath79/ath79_spi_platform.h>
37 #include <asm/mach-ath79/ar71xx_regs.h>
38
39 #include "common.h"
40 #include "dev-eth.h"
41 #include "dev-leds-gpio.h"
42 #include "dev-nfc.h"
43 #include "dev-usb.h"
44 #include "dev-spi.h"
45 #include "dev-wmac.h"
46 #include "machtypes.h"
47 #include "pci.h"
48 #include "routerboot.h"
49
50 #define RB_ROUTERBOOT_OFFSET 0x0000
51 #define RB_ROUTERBOOT_MIN_SIZE 0xb000
52 #define RB_HARD_CFG_SIZE 0x1000
53 #define RB_BIOS_OFFSET 0xd000
54 #define RB_BIOS_SIZE 0x1000
55 #define RB_SOFT_CFG_OFFSET 0xf000
56 #define RB_SOFT_CFG_SIZE 0x1000
57
58 #define RB91X_FLAG_USB BIT(0)
59 #define RB91X_FLAG_PCIE BIT(1)
60
61 #define RB91X_LATCH_GPIO_BASE 32
62 #define RB91X_LATCH_GPIO(_x) (RB91X_LATCH_GPIO_BASE + (_x))
63
64 #define RB91X_SSR_GPIO_BASE (RB91X_LATCH_GPIO_BASE + AR934X_GPIO_COUNT)
65 #define RB91X_SSR_GPIO(_x) (RB91X_SSR_GPIO_BASE + (_x))
66
67 #define RB91X_SSR_BIT_LED1 0
68 #define RB91X_SSR_BIT_LED2 1
69 #define RB91X_SSR_BIT_LED3 2
70 #define RB91X_SSR_BIT_LED4 3
71 #define RB91X_SSR_BIT_LED5 4
72 #define RB91X_SSR_BIT_5 5
73 #define RB91X_SSR_BIT_USB_POWER 6
74 #define RB91X_SSR_BIT_PCIE_POWER 7
75
76 #define RB91X_GPIO_SSR_STROBE RB91X_LATCH_GPIO(0)
77 #define RB91X_GPIO_LED_POWER RB91X_LATCH_GPIO(1)
78 #define RB91X_GPIO_LED_USER RB91X_LATCH_GPIO(2)
79 #define RB91X_GPIO_NAND_READ RB91X_LATCH_GPIO(3)
80 #define RB91X_GPIO_NAND_RDY RB91X_LATCH_GPIO(4)
81 #define RB91X_GPIO_NLE RB91X_LATCH_GPIO(11)
82 #define RB91X_GPIO_NAND_NRW RB91X_LATCH_GPIO(12)
83 #define RB91X_GPIO_NAND_NCE RB91X_LATCH_GPIO(13)
84 #define RB91X_GPIO_NAND_CLE RB91X_LATCH_GPIO(14)
85 #define RB91X_GPIO_NAND_ALE RB91X_LATCH_GPIO(15)
86
87 #define RB91X_GPIO_LED_1 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED1)
88 #define RB91X_GPIO_LED_2 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED2)
89 #define RB91X_GPIO_LED_3 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED3)
90 #define RB91X_GPIO_LED_4 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED4)
91 #define RB91X_GPIO_LED_5 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED5)
92 #define RB91X_GPIO_USB_POWER RB91X_SSR_GPIO(RB91X_SSR_BIT_USB_POWER)
93 #define RB91X_GPIO_PCIE_POWER RB91X_SSR_GPIO(RB91X_SSR_BIT_PCIE_POWER)
94
95 struct rb_board_info {
96 const char *name;
97 u32 flags;
98 };
99
100 static struct mtd_partition rb711gr100_spi_partitions[] = {
101 {
102 .name = "routerboot",
103 .offset = RB_ROUTERBOOT_OFFSET,
104 .mask_flags = MTD_WRITEABLE,
105 }, {
106 .name = "hard_config",
107 .size = RB_HARD_CFG_SIZE,
108 .mask_flags = MTD_WRITEABLE,
109 }, {
110 .name = "bios",
111 .offset = RB_BIOS_OFFSET,
112 .size = RB_BIOS_SIZE,
113 .mask_flags = MTD_WRITEABLE,
114 }, {
115 .name = "soft_config",
116 .size = RB_SOFT_CFG_SIZE,
117 }
118 };
119
120 static struct flash_platform_data rb711gr100_spi_flash_data = {
121 .parts = rb711gr100_spi_partitions,
122 .nr_parts = ARRAY_SIZE(rb711gr100_spi_partitions),
123 };
124
125 static int rb711gr100_gpio_latch_gpios[AR934X_GPIO_COUNT] __initdata = {
126 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
127 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22
128 };
129
130 static struct gpio_latch_platform_data rb711gr100_gpio_latch_data __initdata = {
131 .base = RB91X_LATCH_GPIO_BASE,
132 .num_gpios = ARRAY_SIZE(rb711gr100_gpio_latch_gpios),
133 .gpios = rb711gr100_gpio_latch_gpios,
134 .le_gpio_index = 11,
135 .le_active_low = true,
136 };
137
138 static struct rb91x_nand_platform_data rb711gr100_nand_data __initdata = {
139 .gpio_nce = RB91X_GPIO_NAND_NCE,
140 .gpio_ale = RB91X_GPIO_NAND_ALE,
141 .gpio_cle = RB91X_GPIO_NAND_CLE,
142 .gpio_rdy = RB91X_GPIO_NAND_RDY,
143 .gpio_read = RB91X_GPIO_NAND_READ,
144 .gpio_nrw = RB91X_GPIO_NAND_NRW,
145 .gpio_nle = RB91X_GPIO_NLE,
146 };
147
148 static u8 rb711gr100_ssr_initdata[] = {
149 BIT(RB91X_SSR_BIT_PCIE_POWER) |
150 BIT(RB91X_SSR_BIT_USB_POWER) |
151 BIT(RB91X_SSR_BIT_5)
152 };
153
154 static struct gen_74x164_chip_platform_data rb711gr100_ssr_data = {
155 .base = RB91X_SSR_GPIO_BASE,
156 .num_registers = ARRAY_SIZE(rb711gr100_ssr_initdata),
157 .init_data = rb711gr100_ssr_initdata,
158 };
159
160 static struct spi_board_info rb711gr100_spi_info[] = {
161 {
162 .bus_num = 0,
163 .chip_select = 0,
164 .max_speed_hz = 25000000,
165 .modalias = "m25p80",
166 .platform_data = &rb711gr100_spi_flash_data,
167 }, {
168 .bus_num = 0,
169 .chip_select = 1,
170 .max_speed_hz = 10000000,
171 .modalias = "74x164",
172 .platform_data = &rb711gr100_ssr_data,
173 }
174 };
175
176 static int rb711gr100_spi_cs_gpios[2] = {
177 -ENOENT,
178 RB91X_GPIO_SSR_STROBE,
179 };
180
181 static struct ath79_spi_platform_data rb711gr100_spi_data __initdata = {
182 .bus_num = 0,
183 .num_chipselect = 2,
184 .cs_gpios = rb711gr100_spi_cs_gpios,
185 };
186
187 static struct gpio_led rb711gr100_leds[] __initdata = {
188 {
189 .name = "rb:green:led1",
190 .gpio = RB91X_GPIO_LED_1,
191 .active_low = 0,
192 },
193 {
194 .name = "rb:green:led2",
195 .gpio = RB91X_GPIO_LED_2,
196 .active_low = 0,
197 },
198 {
199 .name = "rb:green:led3",
200 .gpio = RB91X_GPIO_LED_3,
201 .active_low = 0,
202 },
203 {
204 .name = "rb:green:led4",
205 .gpio = RB91X_GPIO_LED_4,
206 .active_low = 0,
207 },
208 {
209 .name = "rb:green:led5",
210 .gpio = RB91X_GPIO_LED_5,
211 .active_low = 0,
212 },
213 {
214 .name = "rb:green:user",
215 .gpio = RB91X_GPIO_LED_USER,
216 .active_low = 0,
217 },
218 {
219 .name = "rb:green:power",
220 .gpio = RB91X_GPIO_LED_POWER,
221 .active_low = 0,
222 .default_state = LEDS_GPIO_DEFSTATE_KEEP,
223 },
224 };
225
226 static struct at803x_platform_data rb91x_at803x_data = {
227 .disable_smarteee = 1,
228 .enable_rgmii_rx_delay = 1,
229 .enable_rgmii_tx_delay = 1,
230 };
231
232 static struct mdio_board_info rb91x_mdio0_info[] = {
233 {
234 .bus_id = "ag71xx-mdio.0",
235 .mdio_addr = 0,
236 .platform_data = &rb91x_at803x_data,
237 },
238 };
239
240 static void __init rb711gr100_init_partitions(const struct rb_info *info)
241 {
242 rb711gr100_spi_partitions[0].size = info->hard_cfg_offs;
243 rb711gr100_spi_partitions[1].offset = info->hard_cfg_offs;
244
245 rb711gr100_spi_partitions[3].offset = info->soft_cfg_offs;
246 }
247
248 void __init rb711gr100_wlan_init(void)
249 {
250 char *caldata;
251 u8 wlan_mac[ETH_ALEN];
252
253 caldata = rb_get_wlan_data();
254 if (caldata == NULL)
255 return;
256
257 ath79_init_mac(wlan_mac, ath79_mac_base, 1);
258 ath79_register_wmac(caldata + 0x1000, wlan_mac);
259
260 kfree(caldata);
261 }
262
263 #define RB_BOARD_INFO(_name, _flags) \
264 { \
265 .name = (_name), \
266 .flags = (_flags), \
267 }
268
269 static const struct rb_board_info rb711gr100_boards[] __initconst = {
270 RB_BOARD_INFO("911G-2HPnD", 0),
271 RB_BOARD_INFO("911G-5HPnD", 0),
272 RB_BOARD_INFO("912UAG-2HPnD", RB91X_FLAG_USB | RB91X_FLAG_PCIE),
273 RB_BOARD_INFO("912UAG-5HPnD", RB91X_FLAG_USB | RB91X_FLAG_PCIE),
274 };
275
276 static u32 rb711gr100_get_flags(const struct rb_info *info)
277 {
278 int i;
279
280 for (i = 0; i < ARRAY_SIZE(rb711gr100_boards); i++) {
281 const struct rb_board_info *bi;
282
283 bi = &rb711gr100_boards[i];
284 if (strcmp(info->board_name, bi->name) == 0)
285 return bi->flags;
286 }
287
288 return 0;
289 }
290
291 static void __init rb711gr100_setup(void)
292 {
293 const struct rb_info *info;
294 char buf[64];
295 u32 flags;
296
297 info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000);
298 if (!info)
299 return;
300
301 scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s",
302 (info->board_name) ? info->board_name : "");
303 mips_set_machine_name(buf);
304
305 rb711gr100_init_partitions(info);
306 ath79_register_spi(&rb711gr100_spi_data, rb711gr100_spi_info,
307 ARRAY_SIZE(rb711gr100_spi_info));
308
309 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
310 AR934X_ETH_CFG_RXD_DELAY |
311 AR934X_ETH_CFG_SW_ONLY_MODE);
312
313 ath79_register_mdio(0, 0x0);
314
315 mdiobus_register_board_info(rb91x_mdio0_info,
316 ARRAY_SIZE(rb91x_mdio0_info));
317
318 ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
319 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
320 ath79_eth0_data.phy_mask = BIT(0);
321 ath79_eth0_pll_data.pll_1000 = 0x02000000;
322
323 ath79_register_eth(0);
324
325 rb711gr100_wlan_init();
326
327 platform_device_register_data(NULL, "rb91x-nand", -1,
328 &rb711gr100_nand_data,
329 sizeof(rb711gr100_nand_data));
330
331 platform_device_register_data(NULL, "gpio-latch", -1,
332 &rb711gr100_gpio_latch_data,
333 sizeof(rb711gr100_gpio_latch_data));
334
335 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb711gr100_leds),
336 rb711gr100_leds);
337
338 flags = rb711gr100_get_flags(info);
339
340 if (flags & RB91X_FLAG_USB)
341 ath79_register_usb();
342
343 if (flags & RB91X_FLAG_PCIE)
344 ath79_register_pci();
345
346 }
347
348 MIPS_MACHINE_NONAME(ATH79_MACH_RB_711GR100, "711Gr100", rb711gr100_setup);