1159838747e9e8d8841929138c1f0b4dcb0060fd
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-rb922.c
1 /*
2 * MikroTik RouterBOARD 91X support
3 *
4 * Copyright (C) 2015 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11 #include <linux/phy.h>
12 #include <linux/delay.h>
13 #include <linux/platform_device.h>
14 #include <linux/ath9k_platform.h>
15 #include <linux/mtd/mtd.h>
16 #include <linux/mtd/nand.h>
17 #include <linux/mtd/partitions.h>
18 #include <linux/spi/spi.h>
19 #include <linux/spi/flash.h>
20 #include <linux/routerboot.h>
21 #include <linux/gpio.h>
22 #include <linux/platform_data/phy-at803x.h>
23 #include <linux/version.h>
24
25 #include <asm/prom.h>
26 #include <asm/mach-ath79/ath79.h>
27 #include <asm/mach-ath79/ar71xx_regs.h>
28
29 #include "common.h"
30 #include "dev-gpio-buttons.h"
31 #include "dev-eth.h"
32 #include "dev-leds-gpio.h"
33 #include "dev-m25p80.h"
34 #include "dev-nfc.h"
35 #include "dev-usb.h"
36 #include "dev-spi.h"
37 #include "machtypes.h"
38 #include "pci.h"
39 #include "routerboot.h"
40
41 #define RB922_GPIO_LED_USR 12
42 #define RB922_GPIO_USB_POWER 13
43 #define RB922_GPIO_FAN_CTRL 14
44 #define RB922_GPIO_BTN_RESET 20
45 #define RB922_GPIO_NAND_NCE 23
46
47 #define RB922_PHY_ADDR 4
48
49 #define RB922_KEYS_POLL_INTERVAL 20 /* msecs */
50 #define RB922_KEYS_DEBOUNCE_INTERVAL (3 * RB922_KEYS_POLL_INTERVAL)
51
52 #define RB_ROUTERBOOT_OFFSET 0x0000
53 #define RB_ROUTERBOOT_MIN_SIZE 0xb000
54 #define RB_HARD_CFG_SIZE 0x1000
55 #define RB_BIOS_OFFSET 0xd000
56 #define RB_BIOS_SIZE 0x1000
57 #define RB_SOFT_CFG_OFFSET 0xf000
58 #define RB_SOFT_CFG_SIZE 0x1000
59
60 static struct mtd_partition rb922gs_spi_partitions[] = {
61 {
62 .name = "routerboot",
63 .offset = RB_ROUTERBOOT_OFFSET,
64 .mask_flags = MTD_WRITEABLE,
65 }, {
66 .name = "hard_config",
67 .size = RB_HARD_CFG_SIZE,
68 .mask_flags = MTD_WRITEABLE,
69 }, {
70 .name = "bios",
71 .offset = RB_BIOS_OFFSET,
72 .size = RB_BIOS_SIZE,
73 .mask_flags = MTD_WRITEABLE,
74 }, {
75 .name = "soft_config",
76 .size = RB_SOFT_CFG_SIZE,
77 }
78 };
79
80 static struct flash_platform_data rb922gs_spi_flash_data = {
81 .parts = rb922gs_spi_partitions,
82 .nr_parts = ARRAY_SIZE(rb922gs_spi_partitions),
83 };
84
85 static struct gpio_led rb922gs_leds[] __initdata = {
86 {
87 .name = "rb:green:user",
88 .gpio = RB922_GPIO_LED_USR,
89 .active_low = 1,
90 },
91 };
92
93 static struct gpio_keys_button rb922gs_gpio_keys[] __initdata = {
94 {
95 .desc = "Reset button",
96 .type = EV_KEY,
97 .code = KEY_RESTART,
98 .debounce_interval = RB922_KEYS_DEBOUNCE_INTERVAL,
99 .gpio = RB922_GPIO_BTN_RESET,
100 .active_low = 1,
101 },
102 };
103
104 static struct at803x_platform_data rb922gs_at803x_data = {
105 .disable_smarteee = 1,
106 };
107
108 static struct mdio_board_info rb922gs_mdio0_info[] = {
109 {
110 .bus_id = "ag71xx-mdio.0",
111 .phy_addr = RB922_PHY_ADDR,
112 .platform_data = &rb922gs_at803x_data,
113 },
114 };
115
116 static void __init rb922gs_init_partitions(const struct rb_info *info)
117 {
118 rb922gs_spi_partitions[0].size = info->hard_cfg_offs;
119 rb922gs_spi_partitions[1].offset = info->hard_cfg_offs;
120 rb922gs_spi_partitions[3].offset = info->soft_cfg_offs;
121 }
122
123 static void rb922gs_nand_select_chip(int chip_no)
124 {
125 switch (chip_no) {
126 case 0:
127 gpio_set_value(RB922_GPIO_NAND_NCE, 0);
128 break;
129 default:
130 gpio_set_value(RB922_GPIO_NAND_NCE, 1);
131 break;
132 }
133 ndelay(500);
134 }
135
136 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
137 static struct nand_ecclayout rb922gs_nand_ecclayout = {
138 .eccbytes = 6,
139 .eccpos = { 8, 9, 10, 13, 14, 15 },
140 .oobavail = 9,
141 .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
142 };
143
144 #else
145
146 static int rb922gs_ooblayout_ecc(struct mtd_info *mtd, int section,
147 struct mtd_oob_region *oobregion)
148 {
149 switch (section) {
150 case 0:
151 oobregion->offset = 8;
152 oobregion->length = 3;
153 return 0;
154 case 1:
155 oobregion->offset = 13;
156 oobregion->length = 3;
157 return 0;
158 default:
159 return -ERANGE;
160 }
161 }
162
163 static int rb922gs_ooblayout_free(struct mtd_info *mtd, int section,
164 struct mtd_oob_region *oobregion)
165 {
166 switch (section) {
167 case 0:
168 oobregion->offset = 0;
169 oobregion->length = 4;
170 return 0;
171 case 1:
172 oobregion->offset = 4;
173 oobregion->length = 1;
174 return 0;
175 case 2:
176 oobregion->offset = 6;
177 oobregion->length = 2;
178 return 0;
179 case 3:
180 oobregion->offset = 11;
181 oobregion->length = 2;
182 return 0;
183 default:
184 return -ERANGE;
185 }
186 }
187
188 static const struct mtd_ooblayout_ops rb922gs_nand_ecclayout_ops = {
189 .ecc = rb922gs_ooblayout_ecc,
190 .free = rb922gs_ooblayout_free,
191 };
192 #endif /* < 4.6 */
193
194 static int rb922gs_nand_scan_fixup(struct mtd_info *mtd)
195 {
196 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
197 struct nand_chip *chip = mtd->priv;
198 #else
199 struct nand_chip *chip = mtd_to_nand(mtd);
200 #endif /* < 4.6.0 */
201
202 if (mtd->writesize == 512) {
203 /*
204 * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot
205 * will not be able to find the kernel that we load.
206 */
207 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
208 chip->ecc.layout = &rb922gs_nand_ecclayout;
209 #else
210 mtd_set_ooblayout(mtd, &rb922gs_nand_ecclayout_ops);
211 #endif
212 }
213
214 chip->options = NAND_NO_SUBPAGE_WRITE;
215
216 return 0;
217 }
218
219 static struct mtd_partition rb922gs_nand_partitions[] = {
220 {
221 .name = "booter",
222 .offset = 0,
223 .size = (256 * 1024),
224 .mask_flags = MTD_WRITEABLE,
225 },
226 {
227 .name = "kernel",
228 .offset = (256 * 1024),
229 .size = (4 * 1024 * 1024) - (256 * 1024),
230 },
231 {
232 .name = "ubi",
233 .offset = MTDPART_OFS_NXTBLK,
234 .size = MTDPART_SIZ_FULL,
235 },
236 };
237
238 static void __init rb922gs_nand_init(void)
239 {
240 gpio_request_one(RB922_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE");
241
242 ath79_nfc_set_scan_fixup(rb922gs_nand_scan_fixup);
243 ath79_nfc_set_parts(rb922gs_nand_partitions,
244 ARRAY_SIZE(rb922gs_nand_partitions));
245 ath79_nfc_set_select_chip(rb922gs_nand_select_chip);
246 ath79_nfc_set_swap_dma(true);
247 ath79_register_nfc();
248 }
249
250 static void __init rb922gs_setup(void)
251 {
252 const struct rb_info *info;
253 char buf[64];
254
255 info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000);
256 if (!info)
257 return;
258
259 scnprintf(buf, sizeof(buf), "MikroTik RouterBOARD %s",
260 (info->board_name) ? info->board_name : "");
261 mips_set_machine_name(buf);
262
263 rb922gs_init_partitions(info);
264 ath79_register_m25p80(&rb922gs_spi_flash_data);
265
266 rb922gs_nand_init();
267
268 ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
269
270 ath79_register_mdio(0, 0x0);
271
272 mdiobus_register_board_info(rb922gs_mdio0_info,
273 ARRAY_SIZE(rb922gs_mdio0_info));
274
275 ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
276 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
277 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
278 ath79_eth0_data.phy_mask = BIT(RB922_PHY_ADDR);
279 ath79_eth0_pll_data.pll_10 = 0x81001313;
280 ath79_eth0_pll_data.pll_100 = 0x81000101;
281 ath79_eth0_pll_data.pll_1000 = 0x8f000000;
282
283 ath79_register_eth(0);
284
285 ath79_register_pci();
286 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb922gs_leds), rb922gs_leds);
287 ath79_register_gpio_keys_polled(-1, RB922_KEYS_POLL_INTERVAL,
288 ARRAY_SIZE(rb922gs_gpio_keys),
289 rb922gs_gpio_keys);
290
291 /* NOTE:
292 * This only supports the RB911G-5HPacD board for now. For other boards
293 * more devices must be registered based on the hardware options which
294 * can be found in the hardware configuration of RouterBOOT.
295 */
296 }
297
298 MIPS_MACHINE_NONAME(ATH79_MACH_RB_922GS, "922gs", rb922gs_setup);