ar71xx: mach-rbspi: return rb_info from rbspi_platform_setup
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-rb95x.c
1 /*
2 * MikroTik RouterBOARD 95X support
3 *
4 * Copyright (C) 2012 Stijn Tintel <stijn@linux-ipv6.be>
5 * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2013 Kamil Trzcinski <ayufan@ayufan.eu>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12
13 #define pr_fmt(fmt) "rb95x: " fmt
14
15 #include <linux/phy.h>
16 #include <linux/delay.h>
17 #include <linux/platform_device.h>
18 #include <linux/ath9k_platform.h>
19 #include <linux/ar8216_platform.h>
20 #include <linux/mtd/mtd.h>
21 #include <linux/mtd/nand.h>
22 #include <linux/mtd/partitions.h>
23 #include <linux/spi/spi.h>
24 #include <linux/spi/flash.h>
25 #include <linux/routerboot.h>
26 #include <linux/gpio.h>
27 #include <linux/version.h>
28
29 #include <asm/mach-ath79/ath79.h>
30 #include <asm/mach-ath79/ar71xx_regs.h>
31
32 #include "common.h"
33 #include "dev-eth.h"
34 #include "dev-m25p80.h"
35 #include "dev-nfc.h"
36 #include "dev-usb.h"
37 #include "dev-wmac.h"
38 #include "machtypes.h"
39 #include "routerboot.h"
40 #include "dev-leds-gpio.h"
41
42 #define RB95X_GPIO_NAND_NCE 14
43
44 static struct mtd_partition rb95x_nand_partitions[] = {
45 {
46 .name = "booter",
47 .offset = 0,
48 .size = (256 * 1024),
49 .mask_flags = MTD_WRITEABLE,
50 },
51 {
52 .name = "kernel",
53 .offset = (256 * 1024),
54 .size = (4 * 1024 * 1024) - (256 * 1024),
55 },
56 {
57 .name = "ubi",
58 .offset = MTDPART_OFS_NXTBLK,
59 .size = MTDPART_SIZ_FULL,
60 },
61 };
62
63 static struct gpio_led rb951ui_leds_gpio[] __initdata = {
64 {
65 .name = "rb:green:wlan",
66 .gpio = 11,
67 .active_low = 1,
68 }, {
69 .name = "rb:green:act",
70 .gpio = 3,
71 .active_low = 1,
72 }, {
73 .name = "rb:green:port1",
74 .gpio = 13,
75 .active_low = 1,
76 }, {
77 .name = "rb:green:port2",
78 .gpio = 12,
79 .active_low = 1,
80 }, {
81 .name = "rb:green:port3",
82 .gpio = 4,
83 .active_low = 1,
84 }, {
85 .name = "rb:green:port4",
86 .gpio = 21,
87 .active_low = 1,
88 }, {
89 .name = "rb:green:port5",
90 .gpio = 16,
91 .active_low = 1,
92 }
93 };
94
95 static struct ar8327_pad_cfg rb95x_ar8327_pad0_cfg = {
96 .mode = AR8327_PAD_MAC_RGMII,
97 .txclk_delay_en = true,
98 .rxclk_delay_en = true,
99 .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
100 .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
101 };
102
103 static struct ar8327_platform_data rb95x_ar8327_data = {
104 .pad0_cfg = &rb95x_ar8327_pad0_cfg,
105 .port0_cfg = {
106 .force_link = 1,
107 .speed = AR8327_PORT_SPEED_1000,
108 .duplex = 1,
109 .txpause = 1,
110 .rxpause = 1,
111 }
112 };
113
114 static struct mdio_board_info rb95x_mdio0_info[] = {
115 {
116 .bus_id = "ag71xx-mdio.0",
117 .phy_addr = 0,
118 .platform_data = &rb95x_ar8327_data,
119 },
120 };
121
122 void __init rb95x_wlan_init(void)
123 {
124 char *art_buf;
125 u8 wlan_mac[ETH_ALEN];
126
127 art_buf = rb_get_wlan_data();
128 if (art_buf == NULL)
129 return;
130
131 ath79_init_mac(wlan_mac, ath79_mac_base, 11);
132 ath79_register_wmac(art_buf + 0x1000, wlan_mac);
133
134 kfree(art_buf);
135 }
136
137 static void rb95x_nand_select_chip(int chip_no)
138 {
139 switch (chip_no) {
140 case 0:
141 gpio_set_value(RB95X_GPIO_NAND_NCE, 0);
142 break;
143 default:
144 gpio_set_value(RB95X_GPIO_NAND_NCE, 1);
145 break;
146 }
147 ndelay(500);
148 }
149
150 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
151 static struct nand_ecclayout rb95x_nand_ecclayout = {
152 .eccbytes = 6,
153 .eccpos = { 8, 9, 10, 13, 14, 15 },
154 .oobavail = 9,
155 .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
156 };
157
158 #else
159
160 static int rb95x_ooblayout_ecc(struct mtd_info *mtd, int section,
161 struct mtd_oob_region *oobregion)
162 {
163 switch (section) {
164 case 0:
165 oobregion->offset = 8;
166 oobregion->length = 3;
167 return 0;
168 case 1:
169 oobregion->offset = 13;
170 oobregion->length = 3;
171 return 0;
172 default:
173 return -ERANGE;
174 }
175 }
176
177 static int rb95x_ooblayout_free(struct mtd_info *mtd, int section,
178 struct mtd_oob_region *oobregion)
179 {
180 switch (section) {
181 case 0:
182 oobregion->offset = 0;
183 oobregion->length = 4;
184 return 0;
185 case 1:
186 oobregion->offset = 4;
187 oobregion->length = 1;
188 return 0;
189 case 2:
190 oobregion->offset = 6;
191 oobregion->length = 2;
192 return 0;
193 case 3:
194 oobregion->offset = 11;
195 oobregion->length = 2;
196 return 0;
197 default:
198 return -ERANGE;
199 }
200 }
201
202 static const struct mtd_ooblayout_ops rb95x_nand_ecclayout_ops = {
203 .ecc = rb95x_ooblayout_ecc,
204 .free = rb95x_ooblayout_free,
205 };
206 #endif /* < 4.6 */
207
208 static int rb95x_nand_scan_fixup(struct mtd_info *mtd)
209 {
210 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
211 struct nand_chip *chip = mtd->priv;
212 #else
213 struct nand_chip *chip = mtd_to_nand(mtd);
214 #endif /* < 4.6.0 */
215
216 if (mtd->writesize == 512) {
217 /*
218 * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot
219 * will not be able to find the kernel that we load.
220 */
221 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
222 chip->ecc.layout = &rb95x_nand_ecclayout;
223 #else
224 mtd_set_ooblayout(mtd, &rb95x_nand_ecclayout_ops);
225 #endif
226 }
227
228 chip->options = NAND_NO_SUBPAGE_WRITE;
229
230 return 0;
231 }
232
233 void __init rb95x_nand_init(void)
234 {
235 gpio_request_one(RB95X_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE");
236
237 ath79_nfc_set_scan_fixup(rb95x_nand_scan_fixup);
238 ath79_nfc_set_parts(rb95x_nand_partitions,
239 ARRAY_SIZE(rb95x_nand_partitions));
240 ath79_nfc_set_select_chip(rb95x_nand_select_chip);
241 ath79_nfc_set_swap_dma(true);
242 ath79_register_nfc();
243 }
244
245 static int __init rb95x_setup(void)
246 {
247 const struct rb_info *info;
248
249 info = rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE)), 0x10000);
250 if (!info)
251 return -EINVAL;
252
253 rb95x_nand_init();
254
255 return 0;
256 }
257
258 static void __init rb951g_setup(void)
259 {
260 if (rb95x_setup())
261 return;
262
263 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
264 AR934X_ETH_CFG_SW_ONLY_MODE);
265
266 ath79_register_mdio(0, 0x0);
267
268 mdiobus_register_board_info(rb95x_mdio0_info,
269 ARRAY_SIZE(rb95x_mdio0_info));
270
271 ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
272 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
273 ath79_eth0_data.phy_mask = BIT(0);
274
275 ath79_register_eth(0);
276
277 rb95x_wlan_init();
278 ath79_register_usb();
279 }
280
281 MIPS_MACHINE(ATH79_MACH_RB_951G, "951G", "MikroTik RouterBOARD 951G-2HnD",
282 rb951g_setup);
283
284 static void __init rb951ui_setup(void)
285 {
286 if (rb95x_setup())
287 return;
288
289 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE);
290
291 ath79_register_mdio(1, 0x0);
292
293 ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
294 ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1);
295
296 ath79_switch_data.phy4_mii_en = 1;
297 ath79_switch_data.phy_poll_mask = BIT(4);
298 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
299 ath79_eth0_data.phy_mask = BIT(4);
300 ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
301 ath79_register_eth(0);
302
303 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
304 ath79_register_eth(1);
305
306 gpio_request_one(20, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
307 "USB power");
308
309 gpio_request_one(2, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
310 "POE power");
311
312 rb95x_wlan_init();
313 ath79_register_usb();
314
315 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb951ui_leds_gpio),
316 rb951ui_leds_gpio);
317 }
318
319 MIPS_MACHINE(ATH79_MACH_RB_951U, "951HnD", "MikroTik RouterBOARD 951Ui-2HnD",
320 rb951ui_setup);