ar71xx: add support for MikroTik hAP ac lite
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-re450.c
1 /*
2 * TP-LINK Archer RE450 board support
3 *
4 * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (c) 2016 Tal Keren <kooolk@gmail.com>
6 *
7 * Based on the Qualcomm Atheros AP135/AP136 reference board support code
8 * Copyright (c) 2012 Qualcomm Atheros
9 *
10 * Permission to use, copy, modify, and/or distribute this software for any
11 * purpose with or without fee is hereby granted, provided that the above
12 * copyright notice and this permission notice appear in all copies.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
15 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
17 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
18 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
19 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
20 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
21 *
22 */
23
24 #include <linux/pci.h>
25 #include <linux/phy.h>
26 #include <linux/gpio.h>
27 #include <linux/platform_data/mdio-gpio.h>
28 #include <linux/platform_device.h>
29 #include <linux/ar8216_platform.h>
30
31 #include <asm/mach-ath79/ath79.h>
32 #include <asm/mach-ath79/ar71xx_regs.h>
33
34 #include "common.h"
35 #include "dev-ap9x-pci.h"
36 #include "dev-eth.h"
37 #include "dev-gpio-buttons.h"
38 #include "dev-leds-gpio.h"
39 #include "dev-m25p80.h"
40 #include "dev-wmac.h"
41 #include "machtypes.h"
42 #include "pci.h"
43
44 #define RE450_GPIO_LED_SYSTEM 12
45 #define RE450_GPIO_LED_WLAN2G 13
46 #define RE450_GPIO_LED_WLAN5G 14
47 #define RE450_GPIO_LED_LAN_DATA 17
48 #define RE450_GPIO_LED_JUMPSTART 21
49 #define RE450_GPIO_LED_JUMPSTART_RED 22
50 #define RE450_GPIO_LED_LAN_LINK 23
51
52 #define RE450_GPIO_BTN_RESET 18
53 #define RE450_GPIO_BTN_LED 19
54 #define RE450_GPIO_BTN_JUMPSTART 20
55
56 #define RE450_GPIO_SMI_MDIO 1
57 #define RE450_GPIO_SMI_MDC 3
58
59 #define RE450_LAN_PHYADDR 4
60
61 #define RE450_KEYS_POLL_INTERVAL 20 /* msecs */
62 #define RE450_KEYS_DEBOUNCE_INTERVAL (3 * RE450_KEYS_POLL_INTERVAL)
63
64 #define RE450_WMAC_CALDATA_OFFSET 0x1000
65
66 static const char *tl_re450_part_probes[] = {
67 "cmdlinepart",
68 NULL,
69 };
70
71 static struct flash_platform_data tl_re450_flash_data = {
72 .part_probes = tl_re450_part_probes,
73 };
74
75 static struct gpio_led re450_leds_gpio[] __initdata = {
76 {
77 .name = "re450:blue:power",
78 .gpio = RE450_GPIO_LED_SYSTEM,
79 .active_low = 1,
80 },
81 {
82 .name = "re450:blue:wlan2g",
83 .gpio = RE450_GPIO_LED_WLAN2G,
84 .active_low = 1,
85 },
86 {
87 .name = "re450:blue:wlan5g",
88 .gpio = RE450_GPIO_LED_WLAN5G,
89 .active_low = 1,
90 },
91 {
92 .name = "re450:blue:wps",
93 .gpio = RE450_GPIO_LED_JUMPSTART,
94 },
95 {
96 .name = "re450:red:wps",
97 .gpio = RE450_GPIO_LED_JUMPSTART_RED,
98 },
99 {
100 .name = "re450:green:lan_data",
101 .gpio = RE450_GPIO_LED_LAN_DATA,
102 .active_low = 1,
103 },
104 {
105 .name = "re450:green:lan_link",
106 .gpio = RE450_GPIO_LED_LAN_LINK,
107 .active_low = 1,
108 },
109 };
110
111 static struct gpio_keys_button re450_gpio_keys[] __initdata = {
112 {
113 .desc = "Reset button",
114 .type = EV_KEY,
115 .code = KEY_WPS_BUTTON,
116 .debounce_interval = RE450_KEYS_DEBOUNCE_INTERVAL,
117 .gpio = RE450_GPIO_BTN_RESET,
118 .active_low = 1,
119 },
120 {
121 .desc = "WPS button",
122 .type = EV_KEY,
123 .code = KEY_RESTART,
124 .debounce_interval = RE450_KEYS_DEBOUNCE_INTERVAL,
125 .gpio = RE450_GPIO_BTN_JUMPSTART,
126 .active_low = 1,
127 },
128 {
129 .desc = "Control LED button",
130 .type = EV_KEY,
131 .code = BTN_0,
132 .debounce_interval = RE450_KEYS_DEBOUNCE_INTERVAL,
133 .gpio = RE450_GPIO_BTN_LED,
134 .active_low = 1,
135 },
136 };
137
138 static struct mdio_gpio_platform_data re450_mdio = {
139 .mdc = RE450_GPIO_SMI_MDC,
140 .mdio = RE450_GPIO_SMI_MDIO,
141 .phy_mask = ~BIT(RE450_LAN_PHYADDR),
142 };
143
144 static struct platform_device re450_phy_device = {
145 .name = "mdio-gpio",
146 .id = 0,
147 .dev = {
148 .platform_data = &re450_mdio,
149 },
150 };
151
152 static void __init re450_setup(void)
153 {
154 u8 *mac = (u8 *) KSEG1ADDR(0x1f610008);
155 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
156 u8 tmpmac[ETH_ALEN];
157
158 ath79_register_m25p80(&tl_re450_flash_data);
159 ath79_register_leds_gpio(-1, ARRAY_SIZE(re450_leds_gpio),
160 re450_leds_gpio);
161 ath79_register_gpio_keys_polled(-1, RE450_KEYS_POLL_INTERVAL,
162 ARRAY_SIZE(re450_gpio_keys),
163 re450_gpio_keys);
164
165 ath79_init_mac(tmpmac, mac, -1);
166 ath79_register_wmac(art + RE450_WMAC_CALDATA_OFFSET, tmpmac);
167
168 ath79_register_pci();
169
170 /* MDIO Interface */
171 platform_device_register(&re450_phy_device);
172
173 ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
174
175 /* GMAC0 is connected to the RGMII interface to an Atheros AR8035-A */
176 ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
177 ath79_eth0_data.mii_bus_dev = &re450_phy_device.dev;
178 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
179 ath79_eth0_data.phy_mask = BIT(RE450_LAN_PHYADDR);
180 ath79_eth0_pll_data.pll_1000 = 0xa6000000;
181 ath79_eth0_pll_data.pll_100 = 0xa0000101;
182 ath79_eth0_pll_data.pll_10 = 0x80001313;
183 ath79_register_eth(0);
184 }
185
186 MIPS_MACHINE(ATH79_MACH_RE450, "RE450", "TP-LINK RE450",
187 re450_setup)