ar71xx: add support for MikroTik hAP ac
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-tew-823dru.c
1 /*
2 * TRENDnet TEW-823DRU board support
3 *
4 * Copyright (C) 2015 Cezary Jackiewicz <cezary.jackiewicz@gmail.com>
5 * Copyright (C) 2014 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12
13 #include <linux/gpio.h>
14 #include <linux/platform_device.h>
15 #include <linux/ar8216_platform.h>
16
17 #include <asm/mach-ath79/ar71xx_regs.h>
18
19 #include "common.h"
20 #include "pci.h"
21 #include "dev-gpio-buttons.h"
22 #include "dev-eth.h"
23 #include "dev-leds-gpio.h"
24 #include "dev-m25p80.h"
25 #include "dev-usb.h"
26 #include "dev-wmac.h"
27 #include "machtypes.h"
28
29 #define TEW_823DRU_GPIO_LED_POWER_ORANGE 14
30 #define TEW_823DRU_GPIO_LED_POWER_GREEN 19
31 #define TEW_823DRU_GPIO_LED_PLANET_GREEN 22
32 #define TEW_823DRU_GPIO_LED_PLANET_ORANGE 23
33
34 #define TEW_823DRU_GPIO_BTN_WPS 16
35 #define TEW_823DRU_GPIO_BTN_RESET 17
36
37 #define TEW_823DRU_KEYS_POLL_INTERVAL 20 /* msecs */
38 #define TEW_823DRU_KEYS_DEBOUNCE_INTERVAL \
39 (3 * TEW_823DRU_KEYS_POLL_INTERVAL)
40
41 #define TEW_823DRU_WMAC_CALDATA_OFFSET 0x1000
42
43 #define TEW_823DRU_LAN_MAC_OFFSET 0x04
44 #define TEW_823DRU_WAN_MAC_OFFSET 0x18
45
46 static struct gpio_led tew_823dru_leds_gpio[] __initdata = {
47 {
48 .name = "trendnet:green:power",
49 .gpio = TEW_823DRU_GPIO_LED_POWER_GREEN,
50 .active_low = 1,
51 },
52 {
53 .name = "trendnet:orange:power",
54 .gpio = TEW_823DRU_GPIO_LED_POWER_ORANGE,
55 .active_low = 1,
56 },
57 {
58 .name = "trendnet:green:planet",
59 .gpio = TEW_823DRU_GPIO_LED_PLANET_GREEN,
60 .active_low = 1,
61 },
62 {
63 .name = "trendnet:orange:planet",
64 .gpio = TEW_823DRU_GPIO_LED_PLANET_ORANGE,
65 .active_low = 1,
66 },
67 };
68
69 static struct gpio_keys_button tew_823dru_gpio_keys[] __initdata = {
70 {
71 .desc = "Reset button",
72 .type = EV_KEY,
73 .code = KEY_RESTART,
74 .debounce_interval = TEW_823DRU_KEYS_DEBOUNCE_INTERVAL,
75 .gpio = TEW_823DRU_GPIO_BTN_RESET,
76 .active_low = 1,
77 },
78 {
79 .desc = "WPS button",
80 .type = EV_KEY,
81 .code = KEY_WPS_BUTTON,
82 .debounce_interval = TEW_823DRU_KEYS_DEBOUNCE_INTERVAL,
83 .gpio = TEW_823DRU_GPIO_BTN_WPS,
84 .active_low = 1,
85 },
86 };
87
88 /* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */
89 static struct ar8327_pad_cfg tew_823dru_ar8327_pad0_cfg = {
90 .mode = AR8327_PAD_MAC_SGMII,
91 .sgmii_delay_en = true,
92 };
93
94 /* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */
95 static struct ar8327_pad_cfg tew_823dru_ar8327_pad6_cfg = {
96 .mode = AR8327_PAD_MAC_RGMII,
97 .txclk_delay_en = true,
98 .rxclk_delay_en = true,
99 .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
100 .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
101 };
102
103 static struct ar8327_platform_data tew_823dru_ar8327_data = {
104 .pad0_cfg = &tew_823dru_ar8327_pad0_cfg,
105 .pad6_cfg = &tew_823dru_ar8327_pad6_cfg,
106 .port0_cfg = {
107 .force_link = 1,
108 .speed = AR8327_PORT_SPEED_1000,
109 .duplex = 1,
110 .txpause = 1,
111 .rxpause = 1,
112 },
113 .port6_cfg = {
114 .force_link = 1,
115 .speed = AR8327_PORT_SPEED_1000,
116 .duplex = 1,
117 .txpause = 1,
118 .rxpause = 1,
119 },
120 };
121
122 static struct mdio_board_info tew_823dru_mdio0_info[] = {
123 {
124 .bus_id = "ag71xx-mdio.0",
125 .phy_addr = 0,
126 .platform_data = &tew_823dru_ar8327_data,
127 },
128 };
129
130 static void __init tew_823dru_setup(void)
131 {
132 u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000);
133 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
134 u8 lan_mac[ETH_ALEN];
135 u8 wan_mac[ETH_ALEN];
136
137 ath79_parse_ascii_mac(mac + TEW_823DRU_LAN_MAC_OFFSET, lan_mac);
138 ath79_parse_ascii_mac(mac + TEW_823DRU_WAN_MAC_OFFSET, wan_mac);
139
140 ath79_register_m25p80(NULL);
141
142 ath79_register_leds_gpio(-1, ARRAY_SIZE(tew_823dru_leds_gpio),
143 tew_823dru_leds_gpio);
144 ath79_register_gpio_keys_polled(-1, TEW_823DRU_KEYS_POLL_INTERVAL,
145 ARRAY_SIZE(tew_823dru_gpio_keys),
146 tew_823dru_gpio_keys);
147
148 ath79_register_wmac(art + TEW_823DRU_WMAC_CALDATA_OFFSET, lan_mac);
149
150 ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0);
151 ath79_init_mac(ath79_eth0_data.mac_addr, wan_mac, 0);
152
153
154 mdiobus_register_board_info(tew_823dru_mdio0_info,
155 ARRAY_SIZE(tew_823dru_mdio0_info));
156 ath79_register_mdio(0, 0x0);
157
158 ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
159
160 /* GMAC0 is connected to the RMGII interface */
161 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
162 ath79_eth0_data.phy_mask = BIT(0);
163 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
164 ath79_eth0_pll_data.pll_1000 = 0x56000000;
165
166 ath79_register_eth(0);
167
168 /* GMAC1 is connected to the SGMII interface */
169 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
170 ath79_eth1_data.speed = SPEED_1000;
171 ath79_eth1_data.duplex = DUPLEX_FULL;
172 ath79_eth1_pll_data.pll_1000 = 0x03000101;
173
174 ath79_register_eth(1);
175
176 ath79_register_usb();
177 ath79_register_pci();
178 }
179
180 MIPS_MACHINE(ATH79_MACH_TEW_823DRU, "TEW-823DRU", "TRENDnet TEW-823DRU",
181 tew_823dru_setup);