target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr3500.c

   1 /*
   2  *  TP-LINK TL-WDR3500 board support
   3  *
   4  *  Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
   5  *  Copyright (C) 2013 Gui Iribarren <gui@altermundi.net>
   6  *
   7  *  This program is free software; you can redistribute it and/or modify it
   8  *  under the terms of the GNU General Public License version 2 as published
   9  *  by the Free Software Foundation.
  10  */
  11
  12 #include <linux/pci.h>
  13 #include <linux/phy.h>
  14 #include <linux/gpio.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/ath9k_platform.h>
  17 #include <linux/ar8216_platform.h>
  18
  19 #include <asm/mach-ath79/ar71xx_regs.h>
  20
  21 #include "common.h"
  22 #include "dev-ap9x-pci.h"
  23 #include "dev-eth.h"
  24 #include "dev-gpio-buttons.h"
  25 #include "dev-leds-gpio.h"
  26 #include "dev-m25p80.h"
  27 #include "dev-spi.h"
  28 #include "dev-usb.h"
  29 #include "dev-wmac.h"
  30 #include "machtypes.h"
  31
  32 #define WDR3500_GPIO_LED_USB            11
  33 #define WDR3500_GPIO_LED_WLAN2G         13
  34 #define WDR3500_GPIO_LED_SYSTEM         14
  35 #define WDR3500_GPIO_LED_QSS            15
  36 #define WDR3500_GPIO_LED_WAN            18
  37 #define WDR3500_GPIO_LED_LAN1           19
  38 #define WDR3500_GPIO_LED_LAN2           20
  39 #define WDR3500_GPIO_LED_LAN3           21
  40 #define WDR3500_GPIO_LED_LAN4           22
  41
  42 #define WDR3500_GPIO_BTN_WPS            16
  43 #define WDR3500_GPIO_BTN_RFKILL         17
  44
  45 #define WDR3500_GPIO_USB_POWER          12
  46
  47 #define WDR3500_KEYS_POLL_INTERVAL      20      /* msecs */
  48 #define WDR3500_KEYS_DEBOUNCE_INTERVAL  (3 * WDR3500_KEYS_POLL_INTERVAL)
  49
  50 #define WDR3500_MAC0_OFFSET             0
  51 #define WDR3500_MAC1_OFFSET             6
  52 #define WDR3500_WMAC_CALDATA_OFFSET     0x1000
  53 #define WDR3500_PCIE_CALDATA_OFFSET     0x5000
  54
  55 static const char *wdr3500_part_probes[] = {
  56         "tp-link",
  57         NULL,
  58 };
  59
  60 static struct flash_platform_data wdr3500_flash_data = {
  61         .part_probes    = wdr3500_part_probes,
  62 };
  63
  64 static struct gpio_led wdr3500_leds_gpio[] __initdata = {
  65         {
  66                 .name           = "tp-link:green:qss",
  67                 .gpio           = WDR3500_GPIO_LED_QSS,
  68                 .active_low     = 1,
  69         },
  70         {
  71                 .name           = "tp-link:green:system",
  72                 .gpio           = WDR3500_GPIO_LED_SYSTEM,
  73                 .active_low     = 1,
  74         },
  75         {
  76                 .name           = "tp-link:green:usb",
  77                 .gpio           = WDR3500_GPIO_LED_USB,
  78                 .active_low     = 1,
  79         },
  80         {
  81                 .name           = "tp-link:green:wlan2g",
  82                 .gpio           = WDR3500_GPIO_LED_WLAN2G,
  83                 .active_low     = 1,
  84         },
  85 };
  86
  87 static struct gpio_keys_button wdr3500_gpio_keys[] __initdata = {
  88         {
  89                 .desc           = "QSS button",
  90                 .type           = EV_KEY,
  91                 .code           = KEY_WPS_BUTTON,
  92                 .debounce_interval = WDR3500_KEYS_DEBOUNCE_INTERVAL,
  93                 .gpio           = WDR3500_GPIO_BTN_WPS,
  94                 .active_low     = 1,
  95         },
  96         {
  97                 .desc           = "RFKILL switch",
  98                 .type           = EV_SW,
  99                 .code           = KEY_RFKILL,
 100                 .debounce_interval = WDR3500_KEYS_DEBOUNCE_INTERVAL,
 101                 .gpio           = WDR3500_GPIO_BTN_RFKILL,
 102         },
 103 };
 104
 105
 106 static void __init wdr3500_setup(void)
 107 {
 108         u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
 109         u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
 110         u8 tmpmac[ETH_ALEN];
 111
 112         ath79_register_m25p80(&wdr3500_flash_data);
 113         ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr3500_leds_gpio),
 114                                  wdr3500_leds_gpio);
 115         ath79_register_gpio_keys_polled(-1, WDR3500_KEYS_POLL_INTERVAL,
 116                                         ARRAY_SIZE(wdr3500_gpio_keys),
 117                                         wdr3500_gpio_keys);
 118
 119         ath79_init_mac(tmpmac, mac, 0);
 120         ath79_register_wmac(art + WDR3500_WMAC_CALDATA_OFFSET, tmpmac);
 121
 122         ath79_init_mac(tmpmac, mac, 1);
 123         ap9x_pci_setup_wmac_led_pin(0, 0);
 124         ap91_pci_init(art + WDR3500_PCIE_CALDATA_OFFSET, tmpmac);
 125
 126         ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE);
 127
 128         ath79_register_mdio(1, 0x0);
 129
 130         /* LAN */
 131         ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
 132
 133         /* GMAC1 is connected to the internal switch */
 134         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
 135
 136         ath79_register_eth(1);
 137
 138         /* WAN */
 139         ath79_init_mac(ath79_eth0_data.mac_addr, mac, 2);
 140
 141         /* GMAC0 is connected to the PHY4 of the internal switch */
 142         ath79_switch_data.phy4_mii_en = 1;
 143         ath79_switch_data.phy_poll_mask = BIT(4);
 144         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
 145         ath79_eth0_data.phy_mask = BIT(4);
 146         ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
 147
 148         ath79_register_eth(0);
 149
 150         gpio_request_one(WDR3500_GPIO_USB_POWER,
 151                          GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
 152                          "USB power");
 153         ath79_register_usb();
 154
 155         ath79_gpio_output_select(WDR3500_GPIO_LED_LAN1,
 156                                  AR934X_GPIO_OUT_LED_LINK3);
 157         ath79_gpio_output_select(WDR3500_GPIO_LED_LAN2,
 158                                  AR934X_GPIO_OUT_LED_LINK2);
 159         ath79_gpio_output_select(WDR3500_GPIO_LED_LAN3,
 160                                  AR934X_GPIO_OUT_LED_LINK1);
 161         ath79_gpio_output_select(WDR3500_GPIO_LED_LAN4,
 162                                  AR934X_GPIO_OUT_LED_LINK0);
 163         ath79_gpio_output_select(WDR3500_GPIO_LED_WAN,
 164                                  AR934X_GPIO_OUT_LED_LINK4);
 165 }
 166
 167 MIPS_MACHINE(ATH79_MACH_TL_WDR3500, "TL-WDR3500",
 168              "TP-LINK TL-WDR3500",
 169              wdr3500_setup);