ar71xx: Add kernel support for the WR842N/ND v2
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-tl-wr841n-v8.c
1 /*
2 * TP-LINK TL-WR841N/ND v8/TL-MR3420 v2 board support
3 *
4 * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11 #include <linux/gpio.h>
12 #include <linux/platform_device.h>
13
14 #include <asm/mach-ath79/ath79.h>
15 #include <asm/mach-ath79/ar71xx_regs.h>
16
17 #include "common.h"
18 #include "dev-eth.h"
19 #include "dev-gpio-buttons.h"
20 #include "dev-leds-gpio.h"
21 #include "dev-m25p80.h"
22 #include "dev-usb.h"
23 #include "dev-wmac.h"
24 #include "machtypes.h"
25
26 #define TL_WR841NV8_GPIO_LED_WLAN 13
27 #define TL_WR841NV8_GPIO_LED_QSS 15
28 #define TL_WR841NV8_GPIO_LED_WAN 18
29 #define TL_WR841NV8_GPIO_LED_LAN1 19
30 #define TL_WR841NV8_GPIO_LED_LAN2 20
31 #define TL_WR841NV8_GPIO_LED_LAN3 21
32 #define TL_WR841NV8_GPIO_LED_LAN4 12
33 #define TL_WR841NV8_GPIO_LED_SYSTEM 14
34
35 #define TL_WR841NV8_GPIO_BTN_RESET 17
36 #define TL_WR841NV8_GPIO_SW_RFKILL 16 /* WPS for MR3420 v2 */
37
38 #define TL_MR3420V2_GPIO_LED_3G 11
39 #define TL_MR3420V2_GPIO_USB_POWER 4
40
41 #define TL_WR841NV8_KEYS_POLL_INTERVAL 20 /* msecs */
42 #define TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR841NV8_KEYS_POLL_INTERVAL)
43
44 static const char *tl_wr841n_v8_part_probes[] = {
45 "tp-link",
46 NULL,
47 };
48
49 static struct flash_platform_data tl_wr841n_v8_flash_data = {
50 .part_probes = tl_wr841n_v8_part_probes,
51 };
52
53 static struct gpio_led tl_wr841n_v8_leds_gpio[] __initdata = {
54 {
55 .name = "tp-link:green:lan1",
56 .gpio = TL_WR841NV8_GPIO_LED_LAN1,
57 .active_low = 1,
58 }, {
59 .name = "tp-link:green:lan2",
60 .gpio = TL_WR841NV8_GPIO_LED_LAN2,
61 .active_low = 1,
62 }, {
63 .name = "tp-link:green:lan3",
64 .gpio = TL_WR841NV8_GPIO_LED_LAN3,
65 .active_low = 1,
66 }, {
67 .name = "tp-link:green:lan4",
68 .gpio = TL_WR841NV8_GPIO_LED_LAN4,
69 .active_low = 1,
70 }, {
71 .name = "tp-link:green:qss",
72 .gpio = TL_WR841NV8_GPIO_LED_QSS,
73 .active_low = 1,
74 }, {
75 .name = "tp-link:green:system",
76 .gpio = TL_WR841NV8_GPIO_LED_SYSTEM,
77 .active_low = 1,
78 }, {
79 .name = "tp-link:green:wan",
80 .gpio = TL_WR841NV8_GPIO_LED_WAN,
81 .active_low = 1,
82 }, {
83 .name = "tp-link:green:wlan",
84 .gpio = TL_WR841NV8_GPIO_LED_WLAN,
85 .active_low = 1,
86 }, {
87 /* the 3G LED is only present on the MR3420 v2 */
88 .name = "tp-link:green:3g",
89 .gpio = TL_MR3420V2_GPIO_LED_3G,
90 .active_low = 1,
91 },
92 };
93
94 static struct gpio_keys_button tl_wr841n_v8_gpio_keys[] __initdata = {
95 {
96 .desc = "Reset button",
97 .type = EV_KEY,
98 .code = KEY_RESTART,
99 .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL,
100 .gpio = TL_WR841NV8_GPIO_BTN_RESET,
101 .active_low = 1,
102 }, {
103 .desc = "RFKILL switch",
104 .type = EV_SW,
105 .code = KEY_RFKILL,
106 .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL,
107 .gpio = TL_WR841NV8_GPIO_SW_RFKILL,
108 .active_low = 0,
109 }
110 };
111
112 static struct gpio_keys_button tl_mr3420v2_gpio_keys[] __initdata = {
113 {
114 .desc = "Reset button",
115 .type = EV_KEY,
116 .code = KEY_RESTART,
117 .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL,
118 .gpio = TL_WR841NV8_GPIO_BTN_RESET,
119 .active_low = 1,
120 }, {
121 .desc = "WPS",
122 .type = EV_KEY,
123 .code = KEY_WPS_BUTTON,
124 .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL,
125 .gpio = TL_WR841NV8_GPIO_SW_RFKILL,
126 .active_low = 0,
127 }
128 };
129
130 static void __init tl_ap123_setup(void)
131 {
132 u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
133 u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
134
135 /* Disable JTAG, enabling GPIOs 0-3 */
136 /* Configure OBS4 line, for GPIO 4*/
137 ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE,
138 AR934X_GPIO_FUNC_CLK_OBS4_EN);
139
140 /* config gpio4 as normal gpio function */
141 ath79_gpio_output_select(TL_MR3420V2_GPIO_USB_POWER,
142 AR934X_GPIO_OUT_GPIO);
143
144 ath79_register_m25p80(&tl_wr841n_v8_flash_data);
145
146 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP);
147
148 ath79_register_mdio(1, 0x0);
149
150 ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1);
151 ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
152
153 /* GMAC0 is connected to the PHY0 of the internal switch */
154 ath79_switch_data.phy4_mii_en = 1;
155 ath79_switch_data.phy_poll_mask = BIT(0);
156 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
157 ath79_eth0_data.phy_mask = BIT(0);
158 ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
159 ath79_register_eth(0);
160
161 /* GMAC1 is connected to the internal switch */
162 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
163 ath79_register_eth(1);
164
165 ath79_register_wmac(ee, mac);
166 }
167
168 static void __init tl_wr841n_v8_setup(void)
169 {
170 tl_ap123_setup();
171
172 ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v8_leds_gpio) - 1,
173 tl_wr841n_v8_leds_gpio);
174
175 ath79_register_gpio_keys_polled(1, TL_WR841NV8_KEYS_POLL_INTERVAL,
176 ARRAY_SIZE(tl_wr841n_v8_gpio_keys),
177 tl_wr841n_v8_gpio_keys);
178 }
179
180 MIPS_MACHINE(ATH79_MACH_TL_WR841N_V8, "TL-WR841N-v8", "TP-LINK TL-WR841N/ND v8",
181 tl_wr841n_v8_setup);
182
183
184 static void __init tl_wr842n_v2_setup(void)
185 {
186 tl_ap123_setup();
187
188 ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v8_leds_gpio) - 1,
189 tl_wr841n_v8_leds_gpio);
190
191 ath79_register_gpio_keys_polled(1, TL_WR841NV8_KEYS_POLL_INTERVAL,
192 ARRAY_SIZE(tl_wr841n_v8_gpio_keys),
193 tl_wr841n_v8_gpio_keys);
194
195 gpio_request_one(TL_MR3420V2_GPIO_USB_POWER,
196 GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
197 "USB power");
198
199 ath79_register_usb();
200 }
201
202 MIPS_MACHINE(ATH79_MACH_TL_WR842N_V2, "TL-WR842N-v2", "TP-LINK TL-WR842N/ND v2",
203 tl_wr842n_v2_setup);
204
205 static void __init tl_mr3420v2_setup(void)
206 {
207 tl_ap123_setup();
208
209 ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v8_leds_gpio),
210 tl_wr841n_v8_leds_gpio);
211
212 ath79_register_gpio_keys_polled(1, TL_WR841NV8_KEYS_POLL_INTERVAL,
213 ARRAY_SIZE(tl_mr3420v2_gpio_keys),
214 tl_mr3420v2_gpio_keys);
215
216 /* enable power for the USB port */
217 gpio_request_one(TL_MR3420V2_GPIO_USB_POWER,
218 GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
219 "USB power");
220
221 ath79_register_usb();
222 }
223
224 MIPS_MACHINE(ATH79_MACH_TL_MR3420_V2, "TL-MR3420-v2", "TP-LINK TL-MR3420 v2",
225 tl_mr3420v2_setup);