ar71xx: fix secondary gpio controller base values
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-tl-wr942n-v1.c
1 /*
2 * TP-Link TL-WR942N(RU) v1 board support
3 *
4 * Copyright (C) 2017 Sergey Studzinski <serguzhg@gmail.com>
5 * Thanks to Henryk Heisig <hyniu@o2.pl>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 */
11
12 #include <linux/platform_device.h>
13 #include <linux/ath9k_platform.h>
14 #include <asm/mach-ath79/ar71xx_regs.h>
15 #include <linux/gpio.h>
16 #include <linux/init.h>
17 #include <linux/spi/spi_gpio.h>
18 #include <linux/spi/74x164.h>
19
20 #include "common.h"
21 #include "dev-m25p80.h"
22 #include "machtypes.h"
23 #include "dev-eth.h"
24 #include "dev-gpio-buttons.h"
25 #include "dev-leds-gpio.h"
26 #include "dev-spi.h"
27 #include "dev-usb.h"
28 #include "dev-wmac.h"
29 #include "nvram.h"
30
31 #define TL_WR942N_V1_KEYS_POLL_INTERVAL 20
32 #define TL_WR942N_V1_KEYS_DEBOUNCE_INTERVAL \
33 (3 * TL_WR942N_V1_KEYS_POLL_INTERVAL)
34
35 #define TL_WR942N_V1_GPIO_BTN_RESET 1
36 #define TL_WR942N_V1_GPIO_BTN_RFKILL 2
37
38 #define TL_WR942N_V1_GPIO_UART_TX 4
39 #define TL_WR942N_V1_GPIO_UART_RX 5
40
41 #define TL_WR942N_V1_GPIO_LED_USB2 14
42 #define TL_WR942N_V1_GPIO_LED_USB1 15
43
44 #define TL_WR942N_V1_GPIO_SHIFT_OE 16
45 #define TL_WR942N_V1_GPIO_SHIFT_SER 17
46 #define TL_WR942N_V1_GPIO_SHIFT_SRCLK 18
47 #define TL_WR942N_V1_GPIO_SHIFT_SRCLR 19
48 #define TL_WR942N_V1_GPIO_SHIFT_RCLK 20
49 #define TL_WR942N_V1_GPIO_LED_WPS 21
50 #define TL_WR942N_V1_GPIO_LED_STATUS 22
51
52 #define TL_WR942N_V1_74HC_GPIO_BASE 32
53 #define TL_WR942N_V1_74HC_GPIO_LED_LAN4 (TL_WR942N_V1_74HC_GPIO_BASE + 0)
54 #define TL_WR942N_V1_74HC_GPIO_LED_LAN3 (TL_WR942N_V1_74HC_GPIO_BASE + 1)
55 #define TL_WR942N_V1_74HC_GPIO_LED_LAN2 (TL_WR942N_V1_74HC_GPIO_BASE + 2)
56 #define TL_WR942N_V1_74HC_GPIO_LED_LAN1 (TL_WR942N_V1_74HC_GPIO_BASE + 3)
57 #define TL_WR942N_V1_74HC_GPIO_LED_WAN_GREEN (TL_WR942N_V1_74HC_GPIO_BASE + 4)
58 #define TL_WR942N_V1_74HC_GPIO_LED_WAN_AMBER (TL_WR942N_V1_74HC_GPIO_BASE + 5)
59 #define TL_WR942N_V1_74HC_GPIO_LED_WLAN (TL_WR942N_V1_74HC_GPIO_BASE + 6)
60 #define TL_WR942N_V1_74HC_GPIO_HUB_RESET (TL_WR942N_V1_74HC_GPIO_BASE + 7) /* from u-boot sources */
61
62 #define TL_WR942N_V1_SSR_BIT_0 0
63 #define TL_WR942N_V1_SSR_BIT_1 1
64 #define TL_WR942N_V1_SSR_BIT_2 2
65 #define TL_WR942N_V1_SSR_BIT_3 3
66 #define TL_WR942N_V1_SSR_BIT_4 4
67 #define TL_WR942N_V1_SSR_BIT_5 5
68 #define TL_WR942N_V1_SSR_BIT_6 6
69 #define TL_WR942N_V1_SSR_BIT_7 7
70
71 #define TL_WR942N_V1_WMAC_CALDATA_OFFSET 0x1000
72 #define TL_WR942N_V1_DEFAULT_MAC_ADDR 0x1fe40008
73 #define TL_WR942N_V1_DEFAULT_MAC_SIZE 0x200
74
75 #define GPIO_IN_ENABLE0_UART_SIN_LSB 8
76 #define GPIO_IN_ENABLE0_UART_SIN_MASK 0x0000ff00
77
78 static struct gpio_led tl_wr942n_v1_leds_gpio[] __initdata = {
79 {
80 .name = "tl-wr942n-v1:green:status",
81 .gpio = TL_WR942N_V1_GPIO_LED_STATUS,
82 .active_low = 1,
83 }, {
84 .name = "tl-wr942n-v1:green:wlan",
85 .gpio = TL_WR942N_V1_74HC_GPIO_LED_WLAN,
86 .active_low = 1,
87 }, {
88 .name = "tl-wr942n-v1:green:lan1",
89 .gpio = TL_WR942N_V1_74HC_GPIO_LED_LAN1,
90 .active_low = 1,
91 }, {
92 .name = "tl-wr942n-v1:green:lan2",
93 .gpio = TL_WR942N_V1_74HC_GPIO_LED_LAN2,
94 .active_low = 1,
95 }, {
96 .name = "tl-wr942n-v1:green:lan3",
97 .gpio = TL_WR942N_V1_74HC_GPIO_LED_LAN3,
98 .active_low = 1,
99 }, {
100 .name = "tl-wr942n-v1:green:lan4",
101 .gpio = TL_WR942N_V1_74HC_GPIO_LED_LAN4,
102 .active_low = 1,
103 }, {
104 .name = "tl-wr942n-v1:green:wan",
105 .gpio = TL_WR942N_V1_74HC_GPIO_LED_WAN_GREEN,
106 .active_low = 1,
107 }, {
108 .name = "tl-wr942n-v1:amber:wan",
109 .gpio = TL_WR942N_V1_74HC_GPIO_LED_WAN_AMBER,
110 .active_low = 1,
111 }, {
112 .name = "tl-wr942n-v1:green:wps",
113 .gpio = TL_WR942N_V1_GPIO_LED_WPS,
114 .active_low = 1,
115 }, {
116 .name = "tl-wr942n-v1:green:usb1",
117 .gpio = TL_WR942N_V1_GPIO_LED_USB1,
118 .active_low = 1,
119 }, {
120 .name = "tl-wr942n-v1:green:usb2",
121 .gpio = TL_WR942N_V1_GPIO_LED_USB2,
122 .active_low = 1,
123 },
124 };
125
126 static struct gpio_keys_button tl_wr942n_v1_gpio_keys[] __initdata = {
127 {
128 .desc = "Reset button",
129 .type = EV_KEY,
130 .code = KEY_RESTART,
131 .debounce_interval = TL_WR942N_V1_KEYS_DEBOUNCE_INTERVAL,
132 .gpio = TL_WR942N_V1_GPIO_BTN_RESET,
133 .active_low = 1,
134 }, {
135 .desc = "RFKILL button",
136 .type = EV_KEY,
137 .code = KEY_RFKILL,
138 .debounce_interval = TL_WR942N_V1_KEYS_DEBOUNCE_INTERVAL,
139 .gpio = TL_WR942N_V1_GPIO_BTN_RFKILL,
140 .active_low = 1,
141 },
142 };
143
144 static struct spi_gpio_platform_data tl_wr942n_v1_spi_data = {
145 .sck = TL_WR942N_V1_GPIO_SHIFT_SRCLK,
146 .miso = SPI_GPIO_NO_MISO,
147 .mosi = TL_WR942N_V1_GPIO_SHIFT_SER,
148 .num_chipselect = 1,
149 };
150
151 static u8 tl_wr942n_v1_ssr_initdata[] = {
152 BIT(TL_WR942N_V1_SSR_BIT_7) |
153 BIT(TL_WR942N_V1_SSR_BIT_6) |
154 BIT(TL_WR942N_V1_SSR_BIT_5) |
155 BIT(TL_WR942N_V1_SSR_BIT_4) |
156 BIT(TL_WR942N_V1_SSR_BIT_3) |
157 BIT(TL_WR942N_V1_SSR_BIT_2) |
158 BIT(TL_WR942N_V1_SSR_BIT_1) |
159 BIT(TL_WR942N_V1_SSR_BIT_0)
160 };
161
162 static struct gen_74x164_chip_platform_data tl_wr942n_v1_ssr_data = {
163 .base = TL_WR942N_V1_74HC_GPIO_BASE,
164 .num_registers = ARRAY_SIZE(tl_wr942n_v1_ssr_initdata),
165 .init_data = tl_wr942n_v1_ssr_initdata,
166 };
167
168 static struct platform_device tl_wr942n_v1_spi_device = {
169 .name = "spi_gpio",
170 .id = 1,
171 .dev = {
172 .platform_data = &tl_wr942n_v1_spi_data,
173 },
174 };
175
176 static struct spi_board_info tl_wr942n_v1_spi_info[] = {
177 {
178 .bus_num = 1,
179 .chip_select = 0,
180 .max_speed_hz = 10000000,
181 .modalias = "74x164",
182 .platform_data = &tl_wr942n_v1_ssr_data,
183 .controller_data = (void *) TL_WR942N_V1_GPIO_SHIFT_RCLK,
184 },
185 };
186
187 static void tl_wr942n_v1_get_mac(const char *name, char *mac)
188 {
189 u8 *nvram = (u8 *) KSEG1ADDR(TL_WR942N_V1_DEFAULT_MAC_ADDR);
190 int err;
191
192 err = ath79_nvram_parse_mac_addr(nvram, TL_WR942N_V1_DEFAULT_MAC_SIZE,
193 name, mac);
194
195 if (err)
196 pr_err("no MAC address found for %s\n", name);
197 }
198
199 static void __init tl_wr942n_v1_setup(void)
200 {
201 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
202 u8 tmpmac[ETH_ALEN];
203 void __iomem *base;
204 u32 t;
205
206 ath79_register_m25p80(NULL);
207
208 spi_register_board_info(tl_wr942n_v1_spi_info,
209 ARRAY_SIZE(tl_wr942n_v1_spi_info));
210 platform_device_register(&tl_wr942n_v1_spi_device);
211
212 /* Check inherited UART RX GPIO definition */
213 base = ioremap(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
214
215 t = __raw_readl(base + QCA956X_GPIO_REG_IN_ENABLE0);
216 if (((t & GPIO_IN_ENABLE0_UART_SIN_MASK)
217 >> GPIO_IN_ENABLE0_UART_SIN_LSB) == TL_WR942N_V1_GPIO_LED_USB1) {
218 pr_warn("Active UART detected on USBLED's GPIOs!\n");
219
220 tl_wr942n_v1_leds_gpio[9].gpio = TL_WR942N_V1_GPIO_UART_TX;
221 tl_wr942n_v1_leds_gpio[10].gpio = TL_WR942N_V1_GPIO_UART_RX;
222 }
223
224 ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr942n_v1_leds_gpio),
225 tl_wr942n_v1_leds_gpio);
226
227 ath79_register_gpio_keys_polled(-1, TL_WR942N_V1_KEYS_POLL_INTERVAL,
228 ARRAY_SIZE(tl_wr942n_v1_gpio_keys),
229 tl_wr942n_v1_gpio_keys);
230
231 tl_wr942n_v1_get_mac("MAC:", tmpmac);
232
233 /* swap PHYs */
234 ath79_setup_qca956x_eth_cfg(QCA956X_ETH_CFG_SW_PHY_SWAP |
235 QCA956X_ETH_CFG_SW_PHY_ADDR_SWAP);
236
237 ath79_register_mdio(0, 0x0);
238 ath79_register_mdio(1, 0x0);
239
240 /* WAN port */
241 ath79_init_mac(ath79_eth0_data.mac_addr, tmpmac, 1);
242 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
243 ath79_eth0_data.speed = SPEED_100;
244 ath79_eth0_data.duplex = DUPLEX_FULL;
245
246 /* swaped PHYs */
247 ath79_eth0_data.phy_mask = BIT(0);
248 ath79_register_eth(0);
249
250 /* LAN ports */
251 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
252 ath79_init_mac(ath79_eth1_data.mac_addr, tmpmac, 0);
253 ath79_eth1_data.speed = SPEED_1000;
254 ath79_eth1_data.duplex = DUPLEX_FULL;
255
256 /* swaped PHYs */
257 ath79_switch_data.phy_poll_mask |= BIT(0);
258 ath79_switch_data.phy4_mii_en = 1;
259 ath79_register_eth(1);
260
261 ath79_register_wmac(art + TL_WR942N_V1_WMAC_CALDATA_OFFSET, tmpmac);
262
263 ath79_register_usb();
264
265 gpio_request_one(TL_WR942N_V1_74HC_GPIO_HUB_RESET,
266 GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
267 "USB power");
268
269 gpio_request_one(TL_WR942N_V1_GPIO_SHIFT_OE,
270 GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
271 "LED control");
272
273 gpio_request_one(TL_WR942N_V1_GPIO_SHIFT_SRCLR,
274 GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
275 "LED reset");
276 }
277
278 MIPS_MACHINE(ATH79_MACH_TL_WR942N_V1, "TL-WR942N-V1", "TP-LINK TL-WR942N v1",
279 tl_wr942n_v1_setup);