ar71xx: fix Sitecom WLR-8100 support
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-wlr8100.c
1 /*
2 * Sitecom X8 AC1750 WLR-8100 board support
3 *
4 * Based on the Qualcomm Atheros AP135/AP136 reference board support code
5 * Copyright (c) 2012 Qualcomm Atheros
6 * Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
7 *
8 * Permission to use, copy, modify, and/or distribute this software for any
9 * purpose with or without fee is hereby granted, provided that the above
10 * copyright notice and this permission notice appear in all copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 *
20 */
21
22 #include <linux/platform_device.h>
23 #include <linux/ar8216_platform.h>
24
25 #include <asm/mach-ath79/ar71xx_regs.h>
26
27 #include "common.h"
28 #include "pci.h"
29 #include "dev-ap9x-pci.h"
30 #include "dev-gpio-buttons.h"
31 #include "dev-eth.h"
32 #include "dev-leds-gpio.h"
33 #include "dev-m25p80.h"
34 #include "dev-usb.h"
35 #include "dev-wmac.h"
36 #include "machtypes.h"
37
38 #define WLR8100_GPIO_LED_USB 4
39 #define WLR8100_GPIO_LED_WLAN_5G 12
40 #define WLR8100_GPIO_LED_WLAN_2G 13
41 #define WLR8100_GPIO_LED_STATUS_RED 14
42 #define WLR8100_GPIO_LED_WPS_RED 15
43 #define WLR8100_GPIO_LED_STATUS_AMBER 19
44 #define WLR8100_GPIO_LED_WPS_GREEN 20
45
46 #define WLR8100_GPIO_BTN_WPS 16
47 #define WLR8100_GPIO_BTN_RFKILL 21
48
49 #define WLR8100_KEYS_POLL_INTERVAL 20 /* msecs */
50 #define WLR8100_KEYS_DEBOUNCE_INTERVAL (3 * WLR8100_KEYS_POLL_INTERVAL)
51
52 static struct gpio_led wlr8100_leds_gpio[] __initdata = {
53 {
54 .name = "wlr8100:amber:status",
55 .gpio = WLR8100_GPIO_LED_STATUS_AMBER,
56 .active_low = 1,
57 },
58 {
59 .name = "wlr8100:red:status",
60 .gpio = WLR8100_GPIO_LED_STATUS_RED,
61 .active_low = 1,
62 },
63 {
64 .name = "wlr8100:green:wps",
65 .gpio = WLR8100_GPIO_LED_WPS_GREEN,
66 .active_low = 1,
67 },
68 {
69 .name = "wlr8100:red:wps",
70 .gpio = WLR8100_GPIO_LED_WPS_RED,
71 .active_low = 1,
72 },
73 {
74 .name = "wlr8100:red:wlan-2g",
75 .gpio = WLR8100_GPIO_LED_WLAN_2G,
76 .active_low = 1,
77 },
78 {
79 .name = "wlr8100:red:usb",
80 .gpio = WLR8100_GPIO_LED_USB,
81 .active_low = 1,
82 }
83 };
84
85 static struct gpio_keys_button wlr8100_gpio_keys[] __initdata = {
86 {
87 .desc = "WPS button",
88 .type = EV_KEY,
89 .code = KEY_WPS_BUTTON,
90 .debounce_interval = WLR8100_KEYS_DEBOUNCE_INTERVAL,
91 .gpio = WLR8100_GPIO_BTN_WPS,
92 .active_low = 1,
93 },
94 {
95 .desc = "RFKILL button",
96 .type = EV_KEY,
97 .code = KEY_RFKILL,
98 .debounce_interval = WLR8100_KEYS_DEBOUNCE_INTERVAL,
99 .gpio = WLR8100_GPIO_BTN_RFKILL,
100 .active_low = 1,
101 },
102 };
103
104 static struct ar8327_pad_cfg wlr8100_ar8327_pad0_cfg;
105 static struct ar8327_pad_cfg wlr8100_ar8327_pad6_cfg;
106
107 static struct ar8327_platform_data wlr8100_ar8327_data = {
108 .pad0_cfg = &wlr8100_ar8327_pad0_cfg,
109 .pad6_cfg = &wlr8100_ar8327_pad6_cfg,
110 .port0_cfg = {
111 .force_link = 1,
112 .speed = AR8327_PORT_SPEED_1000,
113 .duplex = 1,
114 .txpause = 1,
115 .rxpause = 1,
116 },
117 .port6_cfg = {
118 .force_link = 1,
119 .speed = AR8327_PORT_SPEED_1000,
120 .duplex = 1,
121 .txpause = 1,
122 .rxpause = 1,
123 },
124 };
125
126 static struct mdio_board_info wlr8100_mdio0_info[] = {
127 {
128 .bus_id = "ag71xx-mdio.0",
129 .phy_addr = 0,
130 .platform_data = &wlr8100_ar8327_data,
131 },
132 };
133
134 static void __init wlr8100_common_setup(void)
135 {
136
137 ath79_register_m25p80(NULL);
138
139 ath79_register_leds_gpio(-1, ARRAY_SIZE(wlr8100_leds_gpio),
140 wlr8100_leds_gpio);
141 ath79_register_gpio_keys_polled(-1, WLR8100_KEYS_POLL_INTERVAL,
142 ARRAY_SIZE(wlr8100_gpio_keys),
143 wlr8100_gpio_keys);
144
145 ath79_register_usb();
146
147 ath79_register_wmac_simple();
148
149 ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
150
151 ath79_register_mdio(0, 0x0);
152
153 mdiobus_register_board_info(wlr8100_mdio0_info,
154 ARRAY_SIZE(wlr8100_mdio0_info));
155
156 /* GMAC0 is connected to the RMGII interface */
157 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
158 ath79_eth0_data.phy_mask = BIT(0);
159 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
160
161 ath79_register_eth(0);
162
163 /* GMAC1 is connected tot eh SGMII interface */
164 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
165 ath79_eth1_data.speed = SPEED_1000;
166 ath79_eth1_data.duplex = DUPLEX_FULL;
167
168 ath79_register_eth(1);
169 }
170
171 static void __init wlr8100_010_setup(void)
172 {
173 /* GMAC0 of the AR8337 switch is connected to GMAC0 via RGMII */
174 wlr8100_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_RGMII;
175 wlr8100_ar8327_pad0_cfg.txclk_delay_en = true;
176 wlr8100_ar8327_pad0_cfg.rxclk_delay_en = true;
177 wlr8100_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1;
178 wlr8100_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2;
179
180 /* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */
181 wlr8100_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII;
182 wlr8100_ar8327_pad6_cfg.rxclk_delay_en = true;
183 wlr8100_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0;
184
185 ath79_eth0_pll_data.pll_1000 = 0xa6000000;
186 ath79_eth1_pll_data.pll_1000 = 0x03000101;
187
188 wlr8100_common_setup();
189 ap91_pci_init_simple();
190 }
191
192 MIPS_MACHINE(ATH79_MACH_WLR8100, "WLR8100",
193 "Sitecom WLR-8100",
194 wlr8100_010_setup);
195