d12be88520b2ff389e7150982c5c67643199e83d
[openwrt/openwrt.git] / target / linux / ar71xx / files / drivers / mtd / nand / rb750_nand.c
1 /*
2 * NAND flash driver for the MikroTik RouterBOARD 750
3 *
4 * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/mtd/rawnand.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/platform_device.h>
17 #include <linux/io.h>
18 #include <linux/slab.h>
19 #include <linux/version.h>
20
21 #include <asm/mach-ath79/ar71xx_regs.h>
22 #include <asm/mach-ath79/ath79.h>
23 #include <asm/mach-ath79/mach-rb750.h>
24
25 #define DRV_NAME "rb750-nand"
26 #define DRV_VERSION "0.1.0"
27 #define DRV_DESC "NAND flash driver for the RouterBOARD 750"
28
29 #define RB750_NAND_IO0 BIT(RB750_GPIO_NAND_IO0)
30 #define RB750_NAND_ALE BIT(RB750_GPIO_NAND_ALE)
31 #define RB750_NAND_CLE BIT(RB750_GPIO_NAND_CLE)
32 #define RB750_NAND_NRE BIT(RB750_GPIO_NAND_NRE)
33 #define RB750_NAND_NWE BIT(RB750_GPIO_NAND_NWE)
34 #define RB750_NAND_RDY BIT(RB750_GPIO_NAND_RDY)
35
36 #define RB750_NAND_DATA_SHIFT 1
37 #define RB750_NAND_DATA_BITS (0xff << RB750_NAND_DATA_SHIFT)
38 #define RB750_NAND_INPUT_BITS (RB750_NAND_DATA_BITS | RB750_NAND_RDY)
39 #define RB750_NAND_OUTPUT_BITS (RB750_NAND_ALE | RB750_NAND_CLE | \
40 RB750_NAND_NRE | RB750_NAND_NWE)
41
42 struct rb750_nand_info {
43 struct nand_chip chip;
44 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
45 struct mtd_info mtd;
46 #endif
47 struct rb7xx_nand_platform_data *pdata;
48 };
49
50 static inline struct rb750_nand_info *mtd_to_rbinfo(struct mtd_info *mtd)
51 {
52 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
53 return container_of(mtd, struct rb750_nand_info, mtd);
54 #else
55 struct nand_chip *chip = mtd_to_nand(mtd);
56
57 return container_of(chip, struct rb750_nand_info, chip);
58 #endif
59 }
60
61 static struct mtd_info *rbinfo_to_mtd(struct rb750_nand_info *nfc)
62 {
63 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
64 return &nfc->mtd;
65 #else
66 return nand_to_mtd(&nfc->chip);
67 #endif
68 }
69
70 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
71 /*
72 * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
73 * will not be able to find the kernel that we load.
74 */
75 static struct nand_ecclayout rb750_nand_ecclayout = {
76 .eccbytes = 6,
77 .eccpos = { 8, 9, 10, 13, 14, 15 },
78 .oobavail = 9,
79 .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
80 };
81
82 #else
83
84 static int rb750_ooblayout_ecc(struct mtd_info *mtd, int section,
85 struct mtd_oob_region *oobregion)
86 {
87 switch (section) {
88 case 0:
89 oobregion->offset = 8;
90 oobregion->length = 3;
91 return 0;
92 case 1:
93 oobregion->offset = 13;
94 oobregion->length = 3;
95 return 0;
96 default:
97 return -ERANGE;
98 }
99 }
100
101 static int rb750_ooblayout_free(struct mtd_info *mtd, int section,
102 struct mtd_oob_region *oobregion)
103 {
104 switch (section) {
105 case 0:
106 oobregion->offset = 0;
107 oobregion->length = 4;
108 return 0;
109 case 1:
110 oobregion->offset = 4;
111 oobregion->length = 1;
112 return 0;
113 case 2:
114 oobregion->offset = 6;
115 oobregion->length = 2;
116 return 0;
117 case 3:
118 oobregion->offset = 11;
119 oobregion->length = 2;
120 return 0;
121 default:
122 return -ERANGE;
123 }
124 }
125
126 static const struct mtd_ooblayout_ops rb750_nand_ecclayout_ops = {
127 .ecc = rb750_ooblayout_ecc,
128 .free = rb750_ooblayout_free,
129 };
130 #endif /* < 4.6 */
131
132 static struct mtd_partition rb750_nand_partitions[] = {
133 {
134 .name = "booter",
135 .offset = 0,
136 .size = (256 * 1024),
137 .mask_flags = MTD_WRITEABLE,
138 }, {
139 .name = "kernel",
140 .offset = (256 * 1024),
141 .size = (4 * 1024 * 1024) - (256 * 1024),
142 }, {
143 .name = "ubi",
144 .offset = MTDPART_OFS_NXTBLK,
145 .size = MTDPART_SIZ_FULL,
146 },
147 };
148
149 static void rb750_nand_write(const u8 *buf, unsigned len)
150 {
151 void __iomem *base = ath79_gpio_base;
152 u32 out;
153 u32 t;
154 unsigned i;
155
156 /* set data lines to output mode */
157 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
158 __raw_writel(t | RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE);
159
160 out = __raw_readl(base + AR71XX_GPIO_REG_OUT);
161 out &= ~(RB750_NAND_DATA_BITS | RB750_NAND_NWE);
162 for (i = 0; i != len; i++) {
163 u32 data;
164
165 data = buf[i];
166 data <<= RB750_NAND_DATA_SHIFT;
167 data |= out;
168 __raw_writel(data, base + AR71XX_GPIO_REG_OUT);
169
170 __raw_writel(data | RB750_NAND_NWE, base + AR71XX_GPIO_REG_OUT);
171 /* flush write */
172 __raw_readl(base + AR71XX_GPIO_REG_OUT);
173 }
174
175 /* set data lines to input mode */
176 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
177 __raw_writel(t & ~RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE);
178 /* flush write */
179 __raw_readl(base + AR71XX_GPIO_REG_OE);
180 }
181
182 static void rb750_nand_read(u8 *read_buf, unsigned len)
183 {
184 void __iomem *base = ath79_gpio_base;
185 unsigned i;
186
187 for (i = 0; i < len; i++) {
188 u8 data;
189
190 /* activate RE line */
191 __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_CLEAR);
192 /* flush write */
193 __raw_readl(base + AR71XX_GPIO_REG_CLEAR);
194
195 /* read input lines */
196 data = __raw_readl(base + AR71XX_GPIO_REG_IN) >>
197 RB750_NAND_DATA_SHIFT;
198
199 /* deactivate RE line */
200 __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_SET);
201
202 read_buf[i] = data;
203 }
204 }
205
206 static void rb750_nand_select_chip(struct mtd_info *mtd, int chip)
207 {
208 struct rb750_nand_info *rbinfo = mtd_to_rbinfo(mtd);
209 void __iomem *base = ath79_gpio_base;
210 u32 t;
211
212 if (chip >= 0) {
213 rbinfo->pdata->enable_pins();
214
215 /* set input mode for data lines */
216 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
217 __raw_writel(t & ~RB750_NAND_INPUT_BITS,
218 base + AR71XX_GPIO_REG_OE);
219
220 /* deactivate RE and WE lines */
221 __raw_writel(RB750_NAND_NRE | RB750_NAND_NWE,
222 base + AR71XX_GPIO_REG_SET);
223 /* flush write */
224 (void) __raw_readl(base + AR71XX_GPIO_REG_SET);
225
226 /* activate CE line */
227 __raw_writel(rbinfo->pdata->nce_line,
228 base + AR71XX_GPIO_REG_CLEAR);
229 } else {
230 /* deactivate CE line */
231 __raw_writel(rbinfo->pdata->nce_line,
232 base + AR71XX_GPIO_REG_SET);
233 /* flush write */
234 (void) __raw_readl(base + AR71XX_GPIO_REG_SET);
235
236 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
237 __raw_writel(t | RB750_NAND_IO0 | RB750_NAND_RDY,
238 base + AR71XX_GPIO_REG_OE);
239
240 rbinfo->pdata->disable_pins();
241 }
242 }
243
244 static int rb750_nand_dev_ready(struct mtd_info *mtd)
245 {
246 void __iomem *base = ath79_gpio_base;
247
248 return !!(__raw_readl(base + AR71XX_GPIO_REG_IN) & RB750_NAND_RDY);
249 }
250
251 static void rb750_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
252 unsigned int ctrl)
253 {
254 if (ctrl & NAND_CTRL_CHANGE) {
255 void __iomem *base = ath79_gpio_base;
256 u32 t;
257
258 t = __raw_readl(base + AR71XX_GPIO_REG_OUT);
259
260 t &= ~(RB750_NAND_CLE | RB750_NAND_ALE);
261 t |= (ctrl & NAND_CLE) ? RB750_NAND_CLE : 0;
262 t |= (ctrl & NAND_ALE) ? RB750_NAND_ALE : 0;
263
264 __raw_writel(t, base + AR71XX_GPIO_REG_OUT);
265 /* flush write */
266 __raw_readl(base + AR71XX_GPIO_REG_OUT);
267 }
268
269 if (cmd != NAND_CMD_NONE) {
270 u8 t = cmd;
271 rb750_nand_write(&t, 1);
272 }
273 }
274
275 static u8 rb750_nand_read_byte(struct mtd_info *mtd)
276 {
277 u8 data = 0;
278 rb750_nand_read(&data, 1);
279 return data;
280 }
281
282 static void rb750_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len)
283 {
284 rb750_nand_read(buf, len);
285 }
286
287 static void rb750_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
288 {
289 rb750_nand_write(buf, len);
290 }
291
292 static void __init rb750_nand_gpio_init(struct rb750_nand_info *info)
293 {
294 void __iomem *base = ath79_gpio_base;
295 u32 out;
296 u32 t;
297
298 out = __raw_readl(base + AR71XX_GPIO_REG_OUT);
299
300 /* setup output levels */
301 __raw_writel(RB750_NAND_NCE | RB750_NAND_NRE | RB750_NAND_NWE,
302 base + AR71XX_GPIO_REG_SET);
303
304 __raw_writel(RB750_NAND_ALE | RB750_NAND_CLE,
305 base + AR71XX_GPIO_REG_CLEAR);
306
307 /* setup input lines */
308 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
309 __raw_writel(t & ~(RB750_NAND_INPUT_BITS), base + AR71XX_GPIO_REG_OE);
310
311 /* setup output lines */
312 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
313 t |= RB750_NAND_OUTPUT_BITS;
314 t |= info->pdata->nce_line;
315 __raw_writel(t, base + AR71XX_GPIO_REG_OE);
316
317 info->pdata->latch_change(~out & RB750_NAND_IO0, out & RB750_NAND_IO0);
318 }
319
320 static int rb750_nand_probe(struct platform_device *pdev)
321 {
322 struct rb750_nand_info *info;
323 struct rb7xx_nand_platform_data *pdata;
324 struct mtd_info *mtd;
325 int ret;
326
327 printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
328
329 pdata = pdev->dev.platform_data;
330 if (!pdata)
331 return -EINVAL;
332
333 info = kzalloc(sizeof(*info), GFP_KERNEL);
334 if (!info)
335 return -ENOMEM;
336
337 info->chip.priv = &info;
338
339 mtd = rbinfo_to_mtd(info);
340 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
341 mtd->priv = &info->chip;
342 #endif
343 mtd->owner = THIS_MODULE;
344
345 info->chip.select_chip = rb750_nand_select_chip;
346 info->chip.cmd_ctrl = rb750_nand_cmd_ctrl;
347 info->chip.dev_ready = rb750_nand_dev_ready;
348 info->chip.read_byte = rb750_nand_read_byte;
349 info->chip.write_buf = rb750_nand_write_buf;
350 info->chip.read_buf = rb750_nand_read_buf;
351
352 info->chip.chip_delay = 25;
353 info->chip.ecc.mode = NAND_ECC_SOFT;
354 #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
355 info->chip.ecc.algo = NAND_ECC_HAMMING;
356 #endif
357 info->chip.options = NAND_NO_SUBPAGE_WRITE;
358
359 info->pdata = pdata;
360
361 platform_set_drvdata(pdev, info);
362
363 rb750_nand_gpio_init(info);
364
365 ret = nand_scan_ident(mtd, 1, NULL);
366 if (ret) {
367 ret = -ENXIO;
368 goto err_free_info;
369 }
370
371 if (mtd->writesize == 512)
372 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
373 info->chip.ecc.layout = &rb750_nand_ecclayout;
374 #else
375 mtd_set_ooblayout(mtd, &rb750_nand_ecclayout_ops);
376 #endif
377
378 ret = nand_scan_tail(mtd);
379 if (ret) {
380 return -ENXIO;
381 goto err_set_drvdata;
382 }
383
384 ret = mtd_device_register(mtd, rb750_nand_partitions,
385 ARRAY_SIZE(rb750_nand_partitions));
386 if (ret)
387 goto err_release_nand;
388
389 return 0;
390
391 err_release_nand:
392 nand_release(mtd);
393 err_set_drvdata:
394 platform_set_drvdata(pdev, NULL);
395 err_free_info:
396 kfree(info);
397 return ret;
398 }
399
400 static int rb750_nand_remove(struct platform_device *pdev)
401 {
402 struct rb750_nand_info *info = platform_get_drvdata(pdev);
403
404 nand_release(rbinfo_to_mtd(info));
405 platform_set_drvdata(pdev, NULL);
406 kfree(info);
407
408 return 0;
409 }
410
411 static struct platform_driver rb750_nand_driver = {
412 .probe = rb750_nand_probe,
413 .remove = rb750_nand_remove,
414 .driver = {
415 .name = DRV_NAME,
416 .owner = THIS_MODULE,
417 },
418 };
419
420 static int __init rb750_nand_init(void)
421 {
422 return platform_driver_register(&rb750_nand_driver);
423 }
424
425 static void __exit rb750_nand_exit(void)
426 {
427 platform_driver_unregister(&rb750_nand_driver);
428 }
429
430 module_init(rb750_nand_init);
431 module_exit(rb750_nand_exit);
432
433 MODULE_DESCRIPTION(DRV_DESC);
434 MODULE_VERSION(DRV_VERSION);
435 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
436 MODULE_LICENSE("GPL v2");