ar71xx: Add kernel 4.9 support
[openwrt/openwrt.git] / target / linux / ar71xx / files / drivers / mtd / nand / rb750_nand.c
1 /*
2 * NAND flash driver for the MikroTik RouterBOARD 750
3 *
4 * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/mtd/nand.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/platform_device.h>
17 #include <linux/io.h>
18 #include <linux/slab.h>
19 #include <linux/version.h>
20
21 #include <asm/mach-ath79/ar71xx_regs.h>
22 #include <asm/mach-ath79/ath79.h>
23 #include <asm/mach-ath79/mach-rb750.h>
24
25 #define DRV_NAME "rb750-nand"
26 #define DRV_VERSION "0.1.0"
27 #define DRV_DESC "NAND flash driver for the RouterBOARD 750"
28
29 #define RB750_NAND_IO0 BIT(RB750_GPIO_NAND_IO0)
30 #define RB750_NAND_ALE BIT(RB750_GPIO_NAND_ALE)
31 #define RB750_NAND_CLE BIT(RB750_GPIO_NAND_CLE)
32 #define RB750_NAND_NRE BIT(RB750_GPIO_NAND_NRE)
33 #define RB750_NAND_NWE BIT(RB750_GPIO_NAND_NWE)
34 #define RB750_NAND_RDY BIT(RB750_GPIO_NAND_RDY)
35
36 #define RB750_NAND_DATA_SHIFT 1
37 #define RB750_NAND_DATA_BITS (0xff << RB750_NAND_DATA_SHIFT)
38 #define RB750_NAND_INPUT_BITS (RB750_NAND_DATA_BITS | RB750_NAND_RDY)
39 #define RB750_NAND_OUTPUT_BITS (RB750_NAND_ALE | RB750_NAND_CLE | \
40 RB750_NAND_NRE | RB750_NAND_NWE)
41
42 struct rb750_nand_info {
43 struct nand_chip chip;
44 struct mtd_info mtd;
45 struct rb7xx_nand_platform_data *pdata;
46 };
47
48 static inline struct rb750_nand_info *mtd_to_rbinfo(struct mtd_info *mtd)
49 {
50 return container_of(mtd, struct rb750_nand_info, mtd);
51 }
52
53 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
54 /*
55 * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
56 * will not be able to find the kernel that we load.
57 */
58 static struct nand_ecclayout rb750_nand_ecclayout = {
59 .eccbytes = 6,
60 .eccpos = { 8, 9, 10, 13, 14, 15 },
61 .oobavail = 9,
62 .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
63 };
64
65 #else
66
67 static int rb750_ooblayout_ecc(struct mtd_info *mtd, int section,
68 struct mtd_oob_region *oobregion)
69 {
70 switch (section) {
71 case 0:
72 oobregion->offset = 8;
73 oobregion->length = 3;
74 return 0;
75 case 1:
76 oobregion->offset = 13;
77 oobregion->length = 3;
78 return 0;
79 default:
80 return -ERANGE;
81 }
82 }
83
84 static int rb750_ooblayout_free(struct mtd_info *mtd, int section,
85 struct mtd_oob_region *oobregion)
86 {
87 switch (section) {
88 case 0:
89 oobregion->offset = 0;
90 oobregion->length = 4;
91 return 0;
92 case 1:
93 oobregion->offset = 4;
94 oobregion->length = 1;
95 return 0;
96 case 2:
97 oobregion->offset = 6;
98 oobregion->length = 2;
99 return 0;
100 case 3:
101 oobregion->offset = 11;
102 oobregion->length = 2;
103 return 0;
104 default:
105 return -ERANGE;
106 }
107 }
108
109 static const struct mtd_ooblayout_ops rb750_nand_ecclayout_ops = {
110 .ecc = rb750_ooblayout_ecc,
111 .free = rb750_ooblayout_free,
112 };
113 #endif /* < 4.6 */
114
115 static struct mtd_partition rb750_nand_partitions[] = {
116 {
117 .name = "booter",
118 .offset = 0,
119 .size = (256 * 1024),
120 .mask_flags = MTD_WRITEABLE,
121 }, {
122 .name = "kernel",
123 .offset = (256 * 1024),
124 .size = (4 * 1024 * 1024) - (256 * 1024),
125 }, {
126 .name = "ubi",
127 .offset = MTDPART_OFS_NXTBLK,
128 .size = MTDPART_SIZ_FULL,
129 },
130 };
131
132 static void rb750_nand_write(const u8 *buf, unsigned len)
133 {
134 void __iomem *base = ath79_gpio_base;
135 u32 out;
136 u32 t;
137 unsigned i;
138
139 /* set data lines to output mode */
140 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
141 __raw_writel(t | RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE);
142
143 out = __raw_readl(base + AR71XX_GPIO_REG_OUT);
144 out &= ~(RB750_NAND_DATA_BITS | RB750_NAND_NWE);
145 for (i = 0; i != len; i++) {
146 u32 data;
147
148 data = buf[i];
149 data <<= RB750_NAND_DATA_SHIFT;
150 data |= out;
151 __raw_writel(data, base + AR71XX_GPIO_REG_OUT);
152
153 __raw_writel(data | RB750_NAND_NWE, base + AR71XX_GPIO_REG_OUT);
154 /* flush write */
155 __raw_readl(base + AR71XX_GPIO_REG_OUT);
156 }
157
158 /* set data lines to input mode */
159 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
160 __raw_writel(t & ~RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE);
161 /* flush write */
162 __raw_readl(base + AR71XX_GPIO_REG_OE);
163 }
164
165 static void rb750_nand_read(u8 *read_buf, unsigned len)
166 {
167 void __iomem *base = ath79_gpio_base;
168 unsigned i;
169
170 for (i = 0; i < len; i++) {
171 u8 data;
172
173 /* activate RE line */
174 __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_CLEAR);
175 /* flush write */
176 __raw_readl(base + AR71XX_GPIO_REG_CLEAR);
177
178 /* read input lines */
179 data = __raw_readl(base + AR71XX_GPIO_REG_IN) >>
180 RB750_NAND_DATA_SHIFT;
181
182 /* deactivate RE line */
183 __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_SET);
184
185 read_buf[i] = data;
186 }
187 }
188
189 static void rb750_nand_select_chip(struct mtd_info *mtd, int chip)
190 {
191 struct rb750_nand_info *rbinfo = mtd_to_rbinfo(mtd);
192 void __iomem *base = ath79_gpio_base;
193 u32 t;
194
195 if (chip >= 0) {
196 rbinfo->pdata->enable_pins();
197
198 /* set input mode for data lines */
199 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
200 __raw_writel(t & ~RB750_NAND_INPUT_BITS,
201 base + AR71XX_GPIO_REG_OE);
202
203 /* deactivate RE and WE lines */
204 __raw_writel(RB750_NAND_NRE | RB750_NAND_NWE,
205 base + AR71XX_GPIO_REG_SET);
206 /* flush write */
207 (void) __raw_readl(base + AR71XX_GPIO_REG_SET);
208
209 /* activate CE line */
210 __raw_writel(rbinfo->pdata->nce_line,
211 base + AR71XX_GPIO_REG_CLEAR);
212 } else {
213 /* deactivate CE line */
214 __raw_writel(rbinfo->pdata->nce_line,
215 base + AR71XX_GPIO_REG_SET);
216 /* flush write */
217 (void) __raw_readl(base + AR71XX_GPIO_REG_SET);
218
219 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
220 __raw_writel(t | RB750_NAND_IO0 | RB750_NAND_RDY,
221 base + AR71XX_GPIO_REG_OE);
222
223 rbinfo->pdata->disable_pins();
224 }
225 }
226
227 static int rb750_nand_dev_ready(struct mtd_info *mtd)
228 {
229 void __iomem *base = ath79_gpio_base;
230
231 return !!(__raw_readl(base + AR71XX_GPIO_REG_IN) & RB750_NAND_RDY);
232 }
233
234 static void rb750_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
235 unsigned int ctrl)
236 {
237 if (ctrl & NAND_CTRL_CHANGE) {
238 void __iomem *base = ath79_gpio_base;
239 u32 t;
240
241 t = __raw_readl(base + AR71XX_GPIO_REG_OUT);
242
243 t &= ~(RB750_NAND_CLE | RB750_NAND_ALE);
244 t |= (ctrl & NAND_CLE) ? RB750_NAND_CLE : 0;
245 t |= (ctrl & NAND_ALE) ? RB750_NAND_ALE : 0;
246
247 __raw_writel(t, base + AR71XX_GPIO_REG_OUT);
248 /* flush write */
249 __raw_readl(base + AR71XX_GPIO_REG_OUT);
250 }
251
252 if (cmd != NAND_CMD_NONE) {
253 u8 t = cmd;
254 rb750_nand_write(&t, 1);
255 }
256 }
257
258 static u8 rb750_nand_read_byte(struct mtd_info *mtd)
259 {
260 u8 data = 0;
261 rb750_nand_read(&data, 1);
262 return data;
263 }
264
265 static void rb750_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len)
266 {
267 rb750_nand_read(buf, len);
268 }
269
270 static void rb750_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
271 {
272 rb750_nand_write(buf, len);
273 }
274
275 static void __init rb750_nand_gpio_init(struct rb750_nand_info *info)
276 {
277 void __iomem *base = ath79_gpio_base;
278 u32 out;
279 u32 t;
280
281 out = __raw_readl(base + AR71XX_GPIO_REG_OUT);
282
283 /* setup output levels */
284 __raw_writel(RB750_NAND_NCE | RB750_NAND_NRE | RB750_NAND_NWE,
285 base + AR71XX_GPIO_REG_SET);
286
287 __raw_writel(RB750_NAND_ALE | RB750_NAND_CLE,
288 base + AR71XX_GPIO_REG_CLEAR);
289
290 /* setup input lines */
291 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
292 __raw_writel(t & ~(RB750_NAND_INPUT_BITS), base + AR71XX_GPIO_REG_OE);
293
294 /* setup output lines */
295 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
296 t |= RB750_NAND_OUTPUT_BITS;
297 t |= info->pdata->nce_line;
298 __raw_writel(t, base + AR71XX_GPIO_REG_OE);
299
300 info->pdata->latch_change(~out & RB750_NAND_IO0, out & RB750_NAND_IO0);
301 }
302
303 static int rb750_nand_probe(struct platform_device *pdev)
304 {
305 struct rb750_nand_info *info;
306 struct rb7xx_nand_platform_data *pdata;
307 int ret;
308
309 printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
310
311 pdata = pdev->dev.platform_data;
312 if (!pdata)
313 return -EINVAL;
314
315 info = kzalloc(sizeof(*info), GFP_KERNEL);
316 if (!info)
317 return -ENOMEM;
318
319 info->chip.priv = &info;
320 info->mtd.priv = &info->chip;
321 info->mtd.owner = THIS_MODULE;
322
323 info->chip.select_chip = rb750_nand_select_chip;
324 info->chip.cmd_ctrl = rb750_nand_cmd_ctrl;
325 info->chip.dev_ready = rb750_nand_dev_ready;
326 info->chip.read_byte = rb750_nand_read_byte;
327 info->chip.write_buf = rb750_nand_write_buf;
328 info->chip.read_buf = rb750_nand_read_buf;
329
330 info->chip.chip_delay = 25;
331 info->chip.ecc.mode = NAND_ECC_SOFT;
332 info->chip.options = NAND_NO_SUBPAGE_WRITE;
333
334 info->pdata = pdata;
335
336 platform_set_drvdata(pdev, info);
337
338 rb750_nand_gpio_init(info);
339
340 ret = nand_scan_ident(&info->mtd, 1, NULL);
341 if (ret) {
342 ret = -ENXIO;
343 goto err_free_info;
344 }
345
346 if (info->mtd.writesize == 512)
347 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
348 info->chip.ecc.layout = &rb750_nand_ecclayout;
349 #else
350 mtd_set_ooblayout(&info->mtd, &rb750_nand_ecclayout_ops);
351 #endif
352
353 ret = nand_scan_tail(&info->mtd);
354 if (ret) {
355 return -ENXIO;
356 goto err_set_drvdata;
357 }
358
359 ret = mtd_device_register(&info->mtd, rb750_nand_partitions,
360 ARRAY_SIZE(rb750_nand_partitions));
361 if (ret)
362 goto err_release_nand;
363
364 return 0;
365
366 err_release_nand:
367 nand_release(&info->mtd);
368 err_set_drvdata:
369 platform_set_drvdata(pdev, NULL);
370 err_free_info:
371 kfree(info);
372 return ret;
373 }
374
375 static int rb750_nand_remove(struct platform_device *pdev)
376 {
377 struct rb750_nand_info *info = platform_get_drvdata(pdev);
378
379 nand_release(&info->mtd);
380 platform_set_drvdata(pdev, NULL);
381 kfree(info);
382
383 return 0;
384 }
385
386 static struct platform_driver rb750_nand_driver = {
387 .probe = rb750_nand_probe,
388 .remove = rb750_nand_remove,
389 .driver = {
390 .name = DRV_NAME,
391 .owner = THIS_MODULE,
392 },
393 };
394
395 static int __init rb750_nand_init(void)
396 {
397 return platform_driver_register(&rb750_nand_driver);
398 }
399
400 static void __exit rb750_nand_exit(void)
401 {
402 platform_driver_unregister(&rb750_nand_driver);
403 }
404
405 module_init(rb750_nand_init);
406 module_exit(rb750_nand_exit);
407
408 MODULE_DESCRIPTION(DRV_DESC);
409 MODULE_VERSION(DRV_VERSION);
410 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
411 MODULE_LICENSE("GPL v2");