target/linux/ar71xx/files/drivers/mtd/nand/rb91x_nand.c

   1 /*
   2  *  NAND flash driver for the MikroTik RouterBOARD 91x series
   3  *
   4  *  Copyright (C) 2013-2014 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License version 2 as published
   8  *  by the Free Software Foundation.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/spinlock.h>
  13 #include <linux/module.h>
  14 #include <linux/mtd/nand.h>
  15 #include <linux/mtd/mtd.h>
  16 #include <linux/mtd/partitions.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/io.h>
  19 #include <linux/slab.h>
  20 #include <linux/gpio.h>
  21 #include <linux/platform_data/rb91x_nand.h>
  22 #include <linux/version.h>
  23
  24 #include <asm/mach-ath79/ar71xx_regs.h>
  25 #include <asm/mach-ath79/ath79.h>
  26
  27 #define DRV_DESC        "NAND flash driver for the RouterBOARD 91x series"
  28
  29 #define RB91X_NAND_NRWE         BIT(12)
  30
  31 #define RB91X_NAND_DATA_BITS    (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) |\
  32                                  BIT(13) | BIT(14) | BIT(15))
  33
  34 #define RB91X_NAND_INPUT_BITS   (RB91X_NAND_DATA_BITS | RB91X_NAND_RDY)
  35 #define RB91X_NAND_OUTPUT_BITS  (RB91X_NAND_DATA_BITS | RB91X_NAND_NRWE)
  36
  37 #define RB91X_NAND_LOW_DATA_MASK        0x1f
  38 #define RB91X_NAND_HIGH_DATA_MASK       0xe0
  39 #define RB91X_NAND_HIGH_DATA_SHIFT      8
  40
  41 struct rb91x_nand_info {
  42         struct nand_chip chip;
  43         struct mtd_info mtd;
  44         struct device *dev;
  45
  46         int gpio_nce;
  47         int gpio_ale;
  48         int gpio_cle;
  49         int gpio_rdy;
  50         int gpio_read;
  51         int gpio_nrw;
  52         int gpio_nle;
  53 };
  54
  55 static inline struct rb91x_nand_info *mtd_to_rbinfo(struct mtd_info *mtd)
  56 {
  57         return container_of(mtd, struct rb91x_nand_info, mtd);
  58 }
  59
  60 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
  61 /*
  62  * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
  63  * will not be able to find the kernel that we load.
  64  */
  65 static struct nand_ecclayout rb91x_nand_ecclayout = {
  66         .eccbytes       = 6,
  67         .eccpos         = { 8, 9, 10, 13, 14, 15 },
  68         .oobavail       = 9,
  69         .oobfree        = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
  70 };
  71
  72 #else
  73
  74 static int rb91x_ooblayout_ecc(struct mtd_info *mtd, int section,
  75                                struct mtd_oob_region *oobregion)
  76 {
  77         switch (section) {
  78         case 0:
  79                 oobregion->offset = 8;
  80                 oobregion->length = 3;
  81                 return 0;
  82         case 1:
  83                 oobregion->offset = 13;
  84                 oobregion->length = 3;
  85                 return 0;
  86         default:
  87                 return -ERANGE;
  88         }
  89 }
  90
  91 static int rb91x_ooblayout_free(struct mtd_info *mtd, int section,
  92                                 struct mtd_oob_region *oobregion)
  93 {
  94         switch (section) {
  95         case 0:
  96                 oobregion->offset = 0;
  97                 oobregion->length = 4;
  98                 return 0;
  99         case 1:
 100                 oobregion->offset = 4;
 101                 oobregion->length = 1;
 102                 return 0;
 103         case 2:
 104                 oobregion->offset = 6;
 105                 oobregion->length = 2;
 106                 return 0;
 107         case 3:
 108                 oobregion->offset = 11;
 109                 oobregion->length = 2;
 110                 return 0;
 111         default:
 112                 return -ERANGE;
 113         }
 114 }
 115
 116 static const struct mtd_ooblayout_ops rb91x_nand_ecclayout_ops = {
 117         .ecc = rb91x_ooblayout_ecc,
 118         .free = rb91x_ooblayout_free,
 119 };
 120 #endif /* < 4.6 */
 121
 122 static struct mtd_partition rb91x_nand_partitions[] = {
 123         {
 124                 .name   = "booter",
 125                 .offset = 0,
 126                 .size   = (256 * 1024),
 127                 .mask_flags = MTD_WRITEABLE,
 128         }, {
 129                 .name   = "kernel",
 130                 .offset = (256 * 1024),
 131                 .size   = (4 * 1024 * 1024) - (256 * 1024),
 132         }, {
 133                 .name   = "ubi",
 134                 .offset = MTDPART_OFS_NXTBLK,
 135                 .size   = MTDPART_SIZ_FULL,
 136         },
 137 };
 138
 139 static void rb91x_nand_write(struct rb91x_nand_info *rbni,
 140                              const u8 *buf,
 141                              unsigned len)
 142 {
 143         void __iomem *base = ath79_gpio_base;
 144         u32 oe_reg;
 145         u32 out_reg;
 146         u32 out;
 147         unsigned i;
 148
 149         /* enable the latch */
 150         gpio_set_value_cansleep(rbni->gpio_nle, 0);
 151
 152         oe_reg = __raw_readl(base + AR71XX_GPIO_REG_OE);
 153         out_reg = __raw_readl(base + AR71XX_GPIO_REG_OUT);
 154
 155         /* set data lines to output mode */
 156         __raw_writel(oe_reg & ~(RB91X_NAND_DATA_BITS | RB91X_NAND_NRWE),
 157                      base + AR71XX_GPIO_REG_OE);
 158
 159         out = out_reg & ~(RB91X_NAND_DATA_BITS | RB91X_NAND_NRWE);
 160         for (i = 0; i != len; i++) {
 161                 u32 data;
 162
 163                 data = (buf[i] & RB91X_NAND_HIGH_DATA_MASK) <<
 164                         RB91X_NAND_HIGH_DATA_SHIFT;
 165                 data |= buf[i] & RB91X_NAND_LOW_DATA_MASK;
 166                 data |= out;
 167                 __raw_writel(data, base + AR71XX_GPIO_REG_OUT);
 168
 169                 /* deactivate WE line */
 170                 data |= RB91X_NAND_NRWE;
 171                 __raw_writel(data, base + AR71XX_GPIO_REG_OUT);
 172                 /* flush write */
 173                 __raw_readl(base + AR71XX_GPIO_REG_OUT);
 174         }
 175
 176         /* restore  registers */
 177         __raw_writel(out_reg, base + AR71XX_GPIO_REG_OUT);
 178         __raw_writel(oe_reg, base + AR71XX_GPIO_REG_OE);
 179         /* flush write */
 180         __raw_readl(base + AR71XX_GPIO_REG_OUT);
 181
 182         /* disable the latch */
 183         gpio_set_value_cansleep(rbni->gpio_nle, 1);
 184 }
 185
 186 static void rb91x_nand_read(struct rb91x_nand_info *rbni,
 187                             u8 *read_buf,
 188                             unsigned len)
 189 {
 190         void __iomem *base = ath79_gpio_base;
 191         u32 oe_reg;
 192         u32 out_reg;
 193         unsigned i;
 194
 195         /* enable read mode */
 196         gpio_set_value_cansleep(rbni->gpio_read, 1);
 197
 198         /* enable latch */
 199         gpio_set_value_cansleep(rbni->gpio_nle, 0);
 200
 201         /* save registers */
 202         oe_reg = __raw_readl(base + AR71XX_GPIO_REG_OE);
 203         out_reg = __raw_readl(base + AR71XX_GPIO_REG_OUT);
 204
 205         /* set data lines to input mode */
 206         __raw_writel(oe_reg | RB91X_NAND_DATA_BITS,
 207                      base + AR71XX_GPIO_REG_OE);
 208
 209         for (i = 0; i < len; i++) {
 210                 u32 in;
 211                 u8 data;
 212
 213                 /* activate RE line */
 214                 __raw_writel(RB91X_NAND_NRWE, base + AR71XX_GPIO_REG_CLEAR);
 215                 /* flush write */
 216                 __raw_readl(base + AR71XX_GPIO_REG_CLEAR);
 217
 218                 /* read input lines */
 219                 in = __raw_readl(base + AR71XX_GPIO_REG_IN);
 220
 221                 /* deactivate RE line */
 222                 __raw_writel(RB91X_NAND_NRWE, base + AR71XX_GPIO_REG_SET);
 223
 224                 data = (in & RB91X_NAND_LOW_DATA_MASK);
 225                 data |= (in >> RB91X_NAND_HIGH_DATA_SHIFT) &
 226                         RB91X_NAND_HIGH_DATA_MASK;
 227
 228                 read_buf[i] = data;
 229         }
 230
 231         /* restore  registers */
 232         __raw_writel(out_reg, base + AR71XX_GPIO_REG_OUT);
 233         __raw_writel(oe_reg, base + AR71XX_GPIO_REG_OE);
 234         /* flush write */
 235         __raw_readl(base + AR71XX_GPIO_REG_OUT);
 236
 237         /* disable latch */
 238         gpio_set_value_cansleep(rbni->gpio_nle, 1);
 239
 240         /* disable read mode */
 241         gpio_set_value_cansleep(rbni->gpio_read, 0);
 242 }
 243
 244 static int rb91x_nand_dev_ready(struct mtd_info *mtd)
 245 {
 246         struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd);
 247
 248         return gpio_get_value_cansleep(rbni->gpio_rdy);
 249 }
 250
 251 static void rb91x_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
 252                                 unsigned int ctrl)
 253 {
 254         struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd);
 255
 256         if (ctrl & NAND_CTRL_CHANGE) {
 257                 gpio_set_value_cansleep(rbni->gpio_cle,
 258                                         (ctrl & NAND_CLE) ? 1 : 0);
 259                 gpio_set_value_cansleep(rbni->gpio_ale,
 260                                         (ctrl & NAND_ALE) ? 1 : 0);
 261                 gpio_set_value_cansleep(rbni->gpio_nce,
 262                                         (ctrl & NAND_NCE) ? 0 : 1);
 263         }
 264
 265         if (cmd != NAND_CMD_NONE) {
 266                 u8 t = cmd;
 267
 268                 rb91x_nand_write(rbni, &t, 1);
 269         }
 270 }
 271
 272 static u8 rb91x_nand_read_byte(struct mtd_info *mtd)
 273 {
 274         struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd);
 275         u8 data = 0xff;
 276
 277         rb91x_nand_read(rbni, &data, 1);
 278
 279         return data;
 280 }
 281
 282 static void rb91x_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len)
 283 {
 284         struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd);
 285
 286         rb91x_nand_read(rbni, buf, len);
 287 }
 288
 289 static void rb91x_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
 290 {
 291         struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd);
 292
 293         rb91x_nand_write(rbni, buf, len);
 294 }
 295
 296 static int rb91x_nand_gpio_init(struct rb91x_nand_info *info)
 297 {
 298         int ret;
 299
 300         /*
 301          * Ensure that the LATCH is disabled before initializing
 302          * control lines.
 303          */
 304         ret = devm_gpio_request_one(info->dev, info->gpio_nle,
 305                                     GPIOF_OUT_INIT_HIGH, "LATCH enable");
 306         if (ret)
 307                 return ret;
 308
 309         ret = devm_gpio_request_one(info->dev, info->gpio_nce,
 310                                     GPIOF_OUT_INIT_HIGH, "NAND nCE");
 311         if (ret)
 312                 return ret;
 313
 314         ret = devm_gpio_request_one(info->dev, info->gpio_nrw,
 315                                     GPIOF_OUT_INIT_HIGH, "NAND nRW");
 316         if (ret)
 317                 return ret;
 318
 319         ret = devm_gpio_request_one(info->dev, info->gpio_cle,
 320                                     GPIOF_OUT_INIT_LOW, "NAND CLE");
 321         if (ret)
 322                 return ret;
 323
 324         ret = devm_gpio_request_one(info->dev, info->gpio_ale,
 325                                     GPIOF_OUT_INIT_LOW, "NAND ALE");
 326         if (ret)
 327                 return ret;
 328
 329         ret = devm_gpio_request_one(info->dev, info->gpio_read,
 330                                     GPIOF_OUT_INIT_LOW, "NAND READ");
 331         if (ret)
 332                 return ret;
 333
 334         ret = devm_gpio_request_one(info->dev, info->gpio_rdy,
 335                                     GPIOF_IN, "NAND RDY");
 336         return ret;
 337 }
 338
 339 static int rb91x_nand_probe(struct platform_device *pdev)
 340 {
 341         struct rb91x_nand_info  *rbni;
 342         struct rb91x_nand_platform_data *pdata;
 343         int ret;
 344
 345         pr_info(DRV_DESC "\n");
 346
 347         pdata = dev_get_platdata(&pdev->dev);
 348         if (!pdata)
 349                 return -EINVAL;
 350
 351         rbni = devm_kzalloc(&pdev->dev, sizeof(*rbni), GFP_KERNEL);
 352         if (!rbni)
 353                 return -ENOMEM;
 354
 355         rbni->dev = &pdev->dev;
 356         rbni->gpio_nce = pdata->gpio_nce;
 357         rbni->gpio_ale = pdata->gpio_ale;
 358         rbni->gpio_cle = pdata->gpio_cle;
 359         rbni->gpio_read = pdata->gpio_read;
 360         rbni->gpio_nrw = pdata->gpio_nrw;
 361         rbni->gpio_rdy = pdata->gpio_rdy;
 362         rbni->gpio_nle = pdata->gpio_nle;
 363
 364         rbni->chip.priv = &rbni;
 365         rbni->mtd.priv  = &rbni->chip;
 366         rbni->mtd.owner = THIS_MODULE;
 367
 368         rbni->chip.cmd_ctrl     = rb91x_nand_cmd_ctrl;
 369         rbni->chip.dev_ready    = rb91x_nand_dev_ready;
 370         rbni->chip.read_byte    = rb91x_nand_read_byte;
 371         rbni->chip.write_buf    = rb91x_nand_write_buf;
 372         rbni->chip.read_buf     = rb91x_nand_read_buf;
 373
 374         rbni->chip.chip_delay   = 25;
 375         rbni->chip.ecc.mode     = NAND_ECC_SOFT;
 376         rbni->chip.options = NAND_NO_SUBPAGE_WRITE;
 377
 378         platform_set_drvdata(pdev, rbni);
 379
 380         ret = rb91x_nand_gpio_init(rbni);
 381         if (ret)
 382                 return ret;
 383
 384         ret = nand_scan_ident(&rbni->mtd, 1, NULL);
 385         if (ret)
 386                 return ret;
 387
 388         if (rbni->mtd.writesize == 512)
 389 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
 390                 rbni->chip.ecc.layout = &rb91x_nand_ecclayout;
 391 #else
 392                 mtd_set_ooblayout(&rbni->mtd, &rb91x_nand_ecclayout_ops);
 393 #endif
 394
 395         ret = nand_scan_tail(&rbni->mtd);
 396         if (ret)
 397                 return ret;
 398
 399         ret = mtd_device_register(&rbni->mtd, rb91x_nand_partitions,
 400                                  ARRAY_SIZE(rb91x_nand_partitions));
 401         if (ret)
 402                 goto err_release_nand;
 403
 404         return 0;
 405
 406 err_release_nand:
 407         nand_release(&rbni->mtd);
 408         return ret;
 409 }
 410
 411 static int rb91x_nand_remove(struct platform_device *pdev)
 412 {
 413         struct rb91x_nand_info *info = platform_get_drvdata(pdev);
 414
 415         nand_release(&info->mtd);
 416
 417         return 0;
 418 }
 419
 420 static struct platform_driver rb91x_nand_driver = {
 421         .probe  = rb91x_nand_probe,
 422         .remove = rb91x_nand_remove,
 423         .driver = {
 424                 .name   = RB91X_NAND_DRIVER_NAME,
 425                 .owner  = THIS_MODULE,
 426         },
 427 };
 428
 429 module_platform_driver(rb91x_nand_driver);
 430
 431 MODULE_DESCRIPTION(DRV_DESC);
 432 MODULE_VERSION(DRV_VERSION);
 433 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
 434 MODULE_LICENSE("GPL v2");