target/linux/ar71xx/patches-4.4/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch

   1 --- a/arch/mips/ath79/gpio.c
   2 +++ b/arch/mips/ath79/gpio.c
   3 @@ -64,15 +64,21 @@ void ath79_gpio_function_disable(u32 mas
   4  void __init ath79_gpio_output_select(unsigned gpio, u8 val)
   5  {
   6         void __iomem *base = ath79_gpio_base;
   7 -       unsigned int reg;
   8 +       unsigned int reg, reg_base;
   9         u32 t, s;
  10
  11 -       BUG_ON(!soc_is_ar934x() && !soc_is_qca953x() && !soc_is_qca956x());
  12 +       if (soc_is_ar934x())
  13 +               reg_base = AR934X_GPIO_REG_OUT_FUNC0;
  14 +       else if (soc_is_qca953x())
  15 +               reg_base = QCA953X_GPIO_REG_OUT_FUNC0;
  16 +       else if (soc_is_qca955x())
  17 +               reg_base = QCA955X_GPIO_REG_OUT_FUNC0;
  18 +       else if (soc_is_qca956x())
  19 +               reg_base = QCA956X_GPIO_REG_OUT_FUNC0;
  20 +       else
  21 +               BUG();
  22
  23 -       if (gpio >= AR934X_GPIO_COUNT)
  24 -               return;
  25 -
  26 -       reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4);
  27 +       reg = reg_base + 4 * (gpio / 4);
  28         s = 8 * (gpio % 4);
  29
  30         t = __raw_readl(base + reg);
  31 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
  32 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
  33 @@ -875,6 +875,14 @@
  34  #define QCA953X_GPIO_OUT_MUX_LED_LINK4         44
  35  #define QCA953X_GPIO_OUT_MUX_LED_LINK5         45
  36
  37 +#define QCA955X_GPIO_REG_OUT_FUNC0     0x2c
  38 +#define QCA955X_GPIO_REG_OUT_FUNC1     0x30
  39 +#define QCA955X_GPIO_REG_OUT_FUNC2     0x34
  40 +#define QCA955X_GPIO_REG_OUT_FUNC3     0x38
  41 +#define QCA955X_GPIO_REG_OUT_FUNC4     0x3c
  42 +#define QCA955X_GPIO_REG_OUT_FUNC5     0x40
  43 +#define QCA955X_GPIO_REG_FUNC          0x6c
  44 +
  45  #define QCA956X_GPIO_REG_OUT_FUNC0     0x2c
  46  #define QCA956X_GPIO_REG_OUT_FUNC1     0x30
  47  #define QCA956X_GPIO_REG_OUT_FUNC2     0x34
  48 @@ -1014,6 +1022,8 @@
  49  #define AR934X_GPIO_OUT_EXT_LNA0       46
  50  #define AR934X_GPIO_OUT_EXT_LNA1       47
  51
  52 +#define QCA955X_GPIO_OUT_GPIO          0
  53 +
  54  /*
  55   * MII_CTRL block
  56   */