target/linux/ar71xx/patches-4.9/103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch

   1 From: Felix Fietkau <nbd@nbd.name>
   2 Date: Wed, 18 May 2016 18:03:31 +0200
   3 Subject: [PATCH] MIPS: ath79: fix register address in ath79_ddr_wb_flush()
   4
   5 ath79_ddr_wb_flush_base has the type void __iomem *, so register offsets
   6 need to be a multiple of 4.
   7
   8 Cc: Alban Bedel <albeu@free.fr>
   9 Fixes: 24b0e3e84fbf ("MIPS: ath79: Improve the DDR controller interface")
  10 Signed-off-by: Felix Fietkau <nbd@nbd.name>
  11 ---
  12
  13 --- a/arch/mips/ath79/common.c
  14 +++ b/arch/mips/ath79/common.c
  15 @@ -58,7 +58,7 @@ EXPORT_SYMBOL_GPL(ath79_ddr_ctrl_init);
  16
  17  void ath79_ddr_wb_flush(u32 reg)
  18  {
  19 -       void __iomem *flush_reg = ath79_ddr_wb_flush_base + reg;
  20 +       void __iomem *flush_reg = ath79_ddr_wb_flush_base + reg * 4;
  21
  22         /* Flush the DDR write buffer. */
  23         __raw_writel(0x1, flush_reg);