target/linux/ath25/patches-4.9/107-ar5312_gpio.patch

   1 --- a/arch/mips/ath25/Kconfig
   2 +++ b/arch/mips/ath25/Kconfig
   3 @@ -1,6 +1,7 @@
   4  config SOC_AR5312
   5         bool "Atheros AR5312/AR2312+ SoC support"
   6         depends on ATH25
   7 +       select GPIO_AR5312
   8         default y
   9
  10  config SOC_AR2315
  11 --- a/arch/mips/ath25/ar5312.c
  12 +++ b/arch/mips/ath25/ar5312.c
  13 @@ -22,6 +22,7 @@
  14  #include <linux/platform_device.h>
  15  #include <linux/mtd/physmap.h>
  16  #include <linux/reboot.h>
  17 +#include <linux/gpio.h>
  18  #include <asm/bootinfo.h>
  19  #include <asm/reboot.h>
  20  #include <asm/time.h>
  21 @@ -180,6 +181,22 @@ static struct platform_device ar5312_phy
  22         .num_resources = 1,
  23  };
  24
  25 +static struct resource ar5312_gpio_res[] = {
  26 +       {
  27 +               .name = "ar5312-gpio",
  28 +               .flags = IORESOURCE_MEM,
  29 +               .start = AR5312_GPIO_BASE,
  30 +               .end = AR5312_GPIO_BASE + AR5312_GPIO_SIZE - 1,
  31 +       },
  32 +};
  33 +
  34 +static struct platform_device ar5312_gpio = {
  35 +       .name = "ar5312-gpio",
  36 +       .id = -1,
  37 +       .resource = ar5312_gpio_res,
  38 +       .num_resources = ARRAY_SIZE(ar5312_gpio_res),
  39 +};
  40 +
  41  static void __init ar5312_flash_init(void)
  42  {
  43         void __iomem *flashctl_base;
  44 @@ -247,6 +264,8 @@ void __init ar5312_init_devices(void)
  45
  46         platform_device_register(&ar5312_physmap_flash);
  47
  48 +       platform_device_register(&ar5312_gpio);
  49 +
  50         switch (ath25_soc) {
  51         case ATH25_SOC_AR5312:
  52                 if (!ath25_board.radio)
  53 --- a/drivers/gpio/Kconfig
  54 +++ b/drivers/gpio/Kconfig
  55 @@ -105,6 +105,13 @@ config GPIO_AMDPT
  56           driver for GPIO functionality on Promontory IOHub
  57           Require ACPI ASL code to enumerate as a platform device.
  58
  59 +config GPIO_AR5312
  60 +       bool "AR5312 SoC GPIO support"
  61 +       default y if SOC_AR5312
  62 +       depends on SOC_AR5312
  63 +       help
  64 +         Say yes here to enable GPIO support for Atheros AR5312/AR2312+ SoCs.
  65 +
  66  config GPIO_ASPEED
  67         tristate "Aspeed GPIO support"
  68         depends on (ARCH_ASPEED || COMPILE_TEST) && OF_GPIO
  69 --- a/drivers/gpio/Makefile
  70 +++ b/drivers/gpio/Makefile
  71 @@ -26,6 +26,7 @@ obj-$(CONFIG_GPIO_ADP5588)    += gpio-adp55
  72  obj-$(CONFIG_GPIO_ALTERA)      += gpio-altera.o
  73  obj-$(CONFIG_GPIO_AMD8111)     += gpio-amd8111.o
  74  obj-$(CONFIG_GPIO_AMDPT)       += gpio-amdpt.o
  75 +obj-$(CONFIG_GPIO_AR5312)      += gpio-ar5312.o
  76  obj-$(CONFIG_GPIO_ARIZONA)     += gpio-arizona.o
  77  obj-$(CONFIG_GPIO_ATH79)       += gpio-ath79.o
  78  obj-$(CONFIG_GPIO_ASPEED)      += gpio-aspeed.o
  79 --- /dev/null
  80 +++ b/drivers/gpio/gpio-ar5312.c
  81 @@ -0,0 +1,121 @@
  82 +/*
  83 + * This file is subject to the terms and conditions of the GNU General Public
  84 + * License.  See the file "COPYING" in the main directory of this archive
  85 + * for more details.
  86 + *
  87 + * Copyright (C) 2003 Atheros Communications, Inc.,  All Rights Reserved.
  88 + * Copyright (C) 2006 FON Technology, SL.
  89 + * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
  90 + * Copyright (C) 2006-2009 Felix Fietkau <nbd@nbd.name>
  91 + * Copyright (C) 2012 Alexandros C. Couloumbis <alex@ozo.com>
  92 + */
  93 +
  94 +#include <linux/kernel.h>
  95 +#include <linux/init.h>
  96 +#include <linux/platform_device.h>
  97 +#include <linux/gpio.h>
  98 +
  99 +#define DRIVER_NAME    "ar5312-gpio"
 100 +
 101 +#define AR5312_GPIO_DO         0x00            /* output register */
 102 +#define AR5312_GPIO_DI         0x04            /* intput register */
 103 +#define AR5312_GPIO_CR         0x08            /* control register */
 104 +
 105 +#define AR5312_GPIO_CR_M(x)    (1 << (x))      /* mask for i/o */
 106 +#define AR5312_GPIO_CR_O(x)    (0 << (x))      /* mask for output */
 107 +#define AR5312_GPIO_CR_I(x)    (1 << (x))      /* mask for input */
 108 +#define AR5312_GPIO_CR_INT(x)  (1 << ((x)+8))  /* mask for interrupt */
 109 +#define AR5312_GPIO_CR_UART(x) (1 << ((x)+16)) /* uart multiplex */
 110 +
 111 +#define AR5312_GPIO_NUM                8
 112 +
 113 +static void __iomem *ar5312_mem;
 114 +
 115 +static inline u32 ar5312_gpio_reg_read(unsigned reg)
 116 +{
 117 +       return __raw_readl(ar5312_mem + reg);
 118 +}
 119 +
 120 +static inline void ar5312_gpio_reg_write(unsigned reg, u32 val)
 121 +{
 122 +       __raw_writel(val, ar5312_mem + reg);
 123 +}
 124 +
 125 +static inline void ar5312_gpio_reg_mask(unsigned reg, u32 mask, u32 val)
 126 +{
 127 +       ar5312_gpio_reg_write(reg, (ar5312_gpio_reg_read(reg) & ~mask) | val);
 128 +}
 129 +
 130 +static int ar5312_gpio_get_val(struct gpio_chip *chip, unsigned gpio)
 131 +{
 132 +       return (ar5312_gpio_reg_read(AR5312_GPIO_DI) >> gpio) & 1;
 133 +}
 134 +
 135 +static void ar5312_gpio_set_val(struct gpio_chip *chip, unsigned gpio, int val)
 136 +{
 137 +       u32 reg = ar5312_gpio_reg_read(AR5312_GPIO_DO);
 138 +
 139 +       reg = val ? reg | (1 << gpio) : reg & ~(1 << gpio);
 140 +       ar5312_gpio_reg_write(AR5312_GPIO_DO, reg);
 141 +}
 142 +
 143 +static int ar5312_gpio_dir_in(struct gpio_chip *chip, unsigned gpio)
 144 +{
 145 +       ar5312_gpio_reg_mask(AR5312_GPIO_CR, 0, 1 << gpio);
 146 +       return 0;
 147 +}
 148 +
 149 +static int ar5312_gpio_dir_out(struct gpio_chip *chip, unsigned gpio, int val)
 150 +{
 151 +       ar5312_gpio_reg_mask(AR5312_GPIO_CR, 1 << gpio, 0);
 152 +       ar5312_gpio_set_val(chip, gpio, val);
 153 +       return 0;
 154 +}
 155 +
 156 +static struct gpio_chip ar5312_gpio_chip = {
 157 +       .label                  = DRIVER_NAME,
 158 +       .direction_input        = ar5312_gpio_dir_in,
 159 +       .direction_output       = ar5312_gpio_dir_out,
 160 +       .set                    = ar5312_gpio_set_val,
 161 +       .get                    = ar5312_gpio_get_val,
 162 +       .base                   = 0,
 163 +       .ngpio                  = AR5312_GPIO_NUM,
 164 +};
 165 +
 166 +static int ar5312_gpio_probe(struct platform_device *pdev)
 167 +{
 168 +       struct device *dev = &pdev->dev;
 169 +       struct resource *res;
 170 +       int ret;
 171 +
 172 +       if (ar5312_mem)
 173 +               return -EBUSY;
 174 +
 175 +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 176 +       ar5312_mem = devm_ioremap_resource(dev, res);
 177 +       if (IS_ERR(ar5312_mem))
 178 +               return PTR_ERR(ar5312_mem);
 179 +
 180 +       ar5312_gpio_chip.parent = dev;
 181 +       ret = gpiochip_add(&ar5312_gpio_chip);
 182 +       if (ret) {
 183 +               dev_err(dev, "failed to add gpiochip\n");
 184 +               return ret;
 185 +       }
 186 +
 187 +       return 0;
 188 +}
 189 +
 190 +static struct platform_driver ar5312_gpio_driver = {
 191 +       .probe = ar5312_gpio_probe,
 192 +       .driver = {
 193 +               .name = DRIVER_NAME,
 194 +               .owner = THIS_MODULE,
 195 +       }
 196 +};
 197 +
 198 +static int __init ar5312_gpio_init(void)
 199 +{
 200 +       return platform_driver_register(&ar5312_gpio_driver);
 201 +}
 202 +subsys_initcall(ar5312_gpio_init);
 203 --- a/arch/mips/Kconfig
 204 +++ b/arch/mips/Kconfig
 205 @@ -168,6 +168,7 @@ config ATH25
 206         select CEVT_R4K
 207         select CSRC_R4K
 208         select DMA_NONCOHERENT
 209 +       select GPIOLIB
 210         select IRQ_MIPS_CPU
 211         select IRQ_DOMAIN
 212         select SYS_HAS_CPU_MIPS32_R1