4c46176f959893ffe72480a1e016660ad52edf8c
[openwrt/openwrt.git] / target / linux / ath79 / dts / ar7241_ubnt_xm.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 #include "ar7241.dtsi"
7
8 / {
9 compatible = "ubnt,xm", "qca,ar7241";
10 model = "Ubiquiti Networks XM (rev 1.0) board";
11
12 memory@0 {
13 device_type = "memory";
14 reg = <0x0 0x2000000>;
15 };
16
17 /* extosc: ref {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
20 clock-frequency = <40000000>;
21 };
22 */
23 keys {
24 compatible = "gpio-keys-polled";
25 #address-cells = <1>;
26 #size-cells = <0>;
27
28 poll-interval = <20>;
29 reset {
30 linux,code = <KEY_RESTART>;
31 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
32 debounce-interval = <60>;
33 };
34 };
35
36 leds {
37 compatible = "gpio-leds";
38 link1 {
39 label = "ubnt:red:link1";
40 gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
41 };
42
43 link2 {
44 label = "ubnt:orange:link2";
45 gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
46 };
47
48 link3 {
49 label = "ubnt:green:link3";
50 gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
51 };
52
53 link4 {
54 label = "ubnt:green:link4";
55 gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
56 };
57 };
58 };
59
60 &uart {
61 status = "okay";
62 };
63
64 /*&pll {
65 clocks = <&extosc>;
66 };*/
67
68 &spi {
69 status = "okay";
70 num-cs = <1>;
71
72 flash@0 {
73 #address-cells = <1>;
74 #size-cells = <1>;
75 compatible = "mx25l6405d";
76 reg = <0>;
77 spi-max-frequency = <25000000>;
78
79 partitions {
80 compatible = "fixed-partitions";
81 #address-cells = <1>;
82 #size-cells = <1>;
83
84 partition@0 {
85 label = "u-boot";
86 reg = <0x000000 0x040000>;
87 read-only;
88 };
89
90 partition@1 {
91 label = "u-boot-env";
92 reg = <0x040000 0x010000>;
93 };
94
95 partition@2 {
96 label = "firmware";
97 reg = <0x050000 0x750000>;
98 };
99
100 partition@3 {
101 label = "board_config";
102 reg = <0x7a0000 0x010000>;
103 read-only;
104 };
105
106 partition@4 {
107 label = "cfg";
108 reg = <0x7b0000 0x040000>;
109 read-only;
110 };
111
112 art: partition@5 {
113 label = "art";
114 reg = <0x7f0000 0x010000>;
115 read-only;
116 };
117 };
118 };
119 };
120
121 &pcie {
122 status = "okay";
123
124 ath9k@0 {
125 reg = <0x0000 0 0 0 0>;
126 qca,no-eeprom;
127 };
128 };
129
130 &mdio0 {
131 status = "okay";
132
133 phy4: ethernet-phy@4 {
134 reg = <4>;
135 phy-mode = "mii";
136 };
137 };
138
139 &eth0 {
140 status = "okay";
141
142 mtd-mac-address = <&art 0x0>;
143
144 phy-mode = "mii";
145 phy-handle = <&phy4>;
146 };
147
148 &eth1 {
149 status = "okay";
150
151 mtd-mac-address = <&art 0x6>;
152 };