target/linux/ath79/dts/ar9344_pcs_cap324.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "ar9344.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         model = "PowerCloud Systems CAP324";
  10         compatible = "pcs,cap324", "qca,ar9344";
  11
  12         aliases {
  13                 led-boot = &led_power_amber;
  14                 led-failsafe = &led_power_amber;
  15                 led-running = &led_power_green;
  16                 led-upgrade = &led_power_amber;
  17         };
  18
  19         keys {
  20                 compatible = "gpio-keys";
  21
  22                 pinctrl-names = "default";
  23                 pinctrl-0 = <&jtag_disable_pins>;
  24
  25                 reset {
  26                         label = "Reset button";
  27                         linux,code = <KEY_RESTART>;
  28                         gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
  29                         debounce-interval = <60>;
  30                 };
  31         };
  32
  33         leds {
  34                 compatible = "gpio-leds";
  35
  36                 led_power_amber: power_amber {
  37                         label = "amber:power";
  38                         gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
  39                 };
  40
  41                 led_power_green: power_green {
  42                         label = "green:power";
  43                         gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
  44                         default-state = "on";
  45                 };
  46
  47                 wlan_amber {
  48                         label = "amber:wlan";
  49                         gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
  50                         linux,default-trigger = "phy1tpt";
  51                 };
  52
  53                 wlan_green {
  54                         label = "green:wlan";
  55                         gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
  56                         linux,default-trigger = "phy0tpt";
  57                 };
  58
  59                 lan_amber {
  60                         label = "amber:lan";
  61                         gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
  62                 };
  63
  64                 lan_green {
  65                         label = "green:lan";
  66                         gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  67                 };
  68         };
  69 };
  70
  71 &ref {
  72         clock-frequency = <25000000>;
  73 };
  74
  75 &spi {
  76         status = "okay";
  77
  78         flash@0 {
  79                 compatible = "jedec,spi-nor";
  80                 reg = <0>;
  81                 spi-max-frequency = <25000000>;
  82
  83                 partitions {
  84                         compatible = "fixed-partitions";
  85                         #address-cells = <1>;
  86                         #size-cells = <1>;
  87
  88                         uboot: partition@0 {
  89                                 label = "u-boot";
  90                                 reg = <0x000000 0x040000>;
  91                                 read-only;
  92                         };
  93
  94                         partition@40000 {
  95                                 label = "u-boot-env";
  96                                 reg = <0x040000 0x010000>;
  97                                 read-only;
  98                         };
  99
 100                         partition@50000 {
 101                                 compatible = "denx,uimage";
 102                                 label = "firmware";
 103                                 reg = <0x050000 0x0fa0000>;
 104                         };
 105
 106                         art: partition@7f0000 {
 107                                 label = "art";
 108                                 reg = <0xff0000 0x010000>;
 109                                 read-only;
 110                         };
 111                 };
 112         };
 113 };
 114
 115 &pcie {
 116         status = "okay";
 117
 118         ath9k: wifi@0,0 {
 119                 compatible = "168c,0030";
 120                 reg = <0x0000 0 0 0 0>;
 121                 mtd-mac-address = <&art 0x0>;
 122                 mtd-mac-address-increment = <(-2)>;
 123                 mtd-cal-data = <&art 0x5000>;
 124                 qca,no-eeprom;
 125                 qca,disable-5ghz;
 126                 #gpio-cells = <2>;
 127                 gpio-controller;
 128         };
 129 };
 130
 131 &wmac {
 132         status = "okay";
 133
 134         qca,disable-2ghz;
 135         mtd-cal-data = <&art 0x1000>;
 136         mtd-mac-address = <&art 0x0>;
 137         mtd-mac-address-increment = <(-1)>;
 138 };
 139
 140 &mdio0 {
 141         status = "okay";
 142
 143         phy-mask = <0>;
 144
 145         phy0: ethernet-phy@0 {
 146                 reg = <0>;
 147                 phy-mode = "rgmii";
 148         };
 149 };
 150
 151 &eth0 {
 152         status = "okay";
 153
 154         /* default for ar934x, except for 1000M */
 155         pll-data = <0x06000000 0x00000101 0x00001616>;
 156
 157         mtd-mac-address = <&art 0x0>;
 158
 159         phy-mode = "rgmii";
 160         phy-handle = <&phy0>;
 161 };