ath79: Port PowerCloud Systems CAP324 support
[openwrt/openwrt.git] / target / linux / ath79 / dts / ar9344_pcs_cap324.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6
7 #include "ar9344.dtsi"
8
9 / {
10 model = "PowerCloud Systems CAP324";
11 compatible = "pcs,cap324", "qca,ar9344";
12
13 aliases {
14 serial0 = &uart;
15 led-status = &status;
16 };
17
18 keys {
19 compatible = "gpio-keys-polled";
20 poll-interval = <20>;
21 #address-cells = <1>;
22 #size-cells = <0>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&jtag_disable_pins>;
25
26 reset {
27 label = "Reset button";
28 linux,code = <KEY_RESTART>;
29 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
30 debounce-interval = <60>;
31 };
32 };
33
34 leds {
35 compatible = "gpio-leds";
36
37 power_amber {
38 label = "pcs:amber:power";
39 gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
40 default-state = "off";
41 };
42
43 status: power_green {
44 label = "pcs:green:power";
45 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
46 default-state = "on";
47 };
48
49 wlan_amber {
50 label = "pcs:amber:wlan";
51 gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
52 default-state = "off";
53 linux,default-trigger = "phy1tpt";
54 };
55
56 wlan_green {
57 label = "pcs:green:wlan";
58 gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
59 default-state = "off";
60 linux,default-trigger = "phy0tpt";
61 };
62
63 lan_amber {
64 label = "pcs:lan:amber";
65 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
66 default-state = "off";
67 };
68
69 lan_green {
70 label = "pcs:lan:green";
71 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
72 default-state = "off";
73 };
74 };
75
76 };
77
78 &ref {
79 clock-frequency = <25000000>;
80 };
81
82 &uart {
83 status = "okay";
84 };
85
86 &gpio {
87 status = "okay";
88 };
89
90 &spi {
91 num-cs = <1>;
92
93 status = "okay";
94
95 flash@0 {
96 #address-cells = <1>;
97 #size-cells = <1>;
98 compatible = "jedec,spi-nor";
99 reg = <0>;
100 spi-max-frequency = <25000000>;
101
102 partitions {
103 compatible = "fixed-partitions";
104 #address-cells = <1>;
105 #size-cells = <1>;
106
107 uboot: partition@0 {
108 label = "u-boot";
109 reg = <0x000000 0x040000>;
110 read-only;
111 };
112
113 partition@40000 {
114 label = "u-boot-env";
115 reg = <0x040000 0x010000>;
116 read-only;
117 };
118
119 partition@50000 {
120 label = "firmware";
121 reg = <0x050000 0x0fa0000>;
122 };
123
124 art: partition@7f0000 {
125 label = "art";
126 reg = <0xff0000 0x010000>;
127 read-only;
128 };
129 };
130 };
131 };
132
133 &pcie {
134 status = "okay";
135
136 ath9k: wifi@168c,0030 {
137 compatible = "168c,0030";
138 reg = <0x0000 0 0 0 0>;
139 mtd-mac-address = <&art 0x0>;
140 mtd-mac-address-increment = <(-2)>;
141 mtd-cal-data = <&art 0x5000>;
142 qca,no-eeprom;
143 qca,disable-5ghz;
144 #gpio-cells = <2>;
145 gpio-controller;
146 };
147 };
148
149 &wmac {
150 status = "okay";
151
152 qca,disable-2ghz;
153 mtd-cal-data = <&art 0x1000>;
154 mtd-mac-address = <&art 0x0>;
155 mtd-mac-address-increment = <(-1)>;
156 };
157
158 &mdio0 {
159 status = "okay";
160
161 phy-mask = <0>;
162
163 phy0: ethernet-phy@0 {
164 reg = <0>;
165 phy-mode = "rgmii";
166 };
167 };
168
169 &eth0 {
170 status = "okay";
171
172 /* default for ar934x, except for 1000M */
173 pll-data = <0x06000000 0x00000101 0x00001616>;
174
175 mtd-mac-address = <&art 0x0>;
176
177 phy-mode = "rgmii";
178 phy-handle = <&phy0>;
179 };