6be197c0cfdfed3be8d2b8ddb137a89c3b5d0c2f
[openwrt/openwrt.git] / target / linux / ath79 / dts / ar9344_tplink_tl-wdr4300.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 #include "ar9344.dtsi"
7
8 / {
9 aliases {
10 led-boot = &system;
11 led-failsafe = &system;
12 led-running = &system;
13 led-upgrade = &system;
14 };
15
16 leds {
17 compatible = "gpio-leds";
18
19 usb1 {
20 label = "tp-link:green:usb1";
21 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
22 trigger-sources = <&hub_port1>;
23 linux,default-trigger = "usbport";
24 };
25
26 usb2 {
27 label = "tp-link:green:usb2";
28 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
29 trigger-sources = <&hub_port2>;
30 linux,default-trigger = "usbport";
31 };
32
33 wlan2g {
34 label = "tp-link:green:wlan2g";
35 gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
36 linux,default-trigger = "phy0tpt";
37 };
38
39 system: system {
40 label = "tp-link:green:system";
41 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
42 default-state = "on";
43 };
44
45 qss {
46 label = "tp-link:green:qss";
47 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
48 };
49 };
50
51 ath9k-leds {
52 compatible = "gpio-leds";
53
54 wlan5g {
55 label = "tp-link:green:wlan5g";
56 gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
57 linux,default-trigger = "phy1tpt";
58 };
59 };
60
61 keys {
62 compatible = "gpio-keys-polled";
63 poll-interval = <20>;
64
65 reset {
66 linux,code = <KEY_RESTART>;
67 gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
68 debounce-interval = <60>;
69 };
70
71 wifi {
72 linux,code = <KEY_RFKILL>;
73 linux,input-type = <EV_SW>;
74 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
75 debounce-interval = <60>;
76 };
77 };
78
79 gpio-export {
80 compatible = "gpio-export";
81
82 gpio_usb1_power {
83 gpio-export,name = "tp-link:power:usb1";
84 gpio-export,output = <1>;
85 gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
86 };
87
88 gpio_usb2_power {
89 gpio-export,name = "tp-link:power:usb2";
90 gpio-export,output = <1>;
91 gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
92 };
93
94 gpio_ext_lna0 {
95 gpio-export,name = "tp-link:ext:lna0";
96 gpio-export,output = <1>;
97 gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
98 };
99
100 gpio_ext_lna1 {
101 gpio-export,name = "tp-link:ext:lna1";
102 gpio-export,output = <1>;
103 gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
104 };
105 };
106 };
107
108 &ref {
109 clock-frequency = <40000000>;
110 };
111
112 &uart {
113 status = "okay";
114 };
115
116 &gpio {
117 status = "okay";
118 };
119
120 &spi {
121 num-cs = <1>;
122
123 status = "okay";
124
125 flash@0 {
126 compatible = "jedec,spi-nor";
127 reg = <0>;
128 spi-max-frequency = <25000000>;
129
130 partitions {
131 compatible = "fixed-partitions";
132 #address-cells = <1>;
133 #size-cells = <1>;
134
135 uboot: partition@0 {
136 label = "u-boot";
137 reg = <0x000000 0x020000>;
138 read-only;
139 };
140
141 partition@20000 {
142 compatible = "tplink,firmware";
143 label = "firmware";
144 reg = <0x020000 0x7d0000>;
145 };
146
147 art: partition@7f0000 {
148 label = "art";
149 reg = <0x7f0000 0x010000>;
150 read-only;
151 };
152 };
153 };
154 };
155
156 &usb {
157 #address-cells = <1>;
158 #size-cells = <0>;
159 status = "okay";
160
161 port@1 {
162 #address-cells = <1>;
163 #size-cells = <0>;
164 reg = <1>;
165 #trigger-source-cells = <0>;
166
167 hub_port1: port@1 {
168 reg = <1>;
169 #trigger-source-cells = <0>;
170 };
171
172 hub_port2: port@2 {
173 reg = <2>;
174 #trigger-source-cells = <0>;
175 };
176 };
177 };
178
179 &usb_phy {
180 status = "okay";
181 };
182
183 &pcie {
184 status = "okay";
185
186 ath9k: wifi@0,0 {
187 compatible = "pci168c,0033";
188 reg = <0x0000 0 0 0 0>;
189 mtd-mac-address = <&uboot 0x1fc00>;
190 qca,no-eeprom;
191 #gpio-cells = <2>;
192 gpio-controller;
193 };
194 };
195
196 &wmac {
197 status = "okay";
198
199 mtd-cal-data = <&art 0x1000>;
200 mtd-mac-address = <&uboot 0x1fc00>;
201 mtd-mac-address-increment = <(-1)>;
202 };
203
204 &mdio0 {
205 status = "okay";
206
207 phy-mask = <0>;
208
209 phy0: ethernet-phy@0 {
210 reg = <0>;
211 phy-mode = "rgmii";
212
213 qca,ar8327-initvals = <
214 0x04 0x07600000 /* PORT0 PAD MODE CTRL */
215 0x10 0x80000080 /* POWER_ON_STRIP */
216 0x50 0xc737c737 /* LED_CTRL0 */
217 0x54 0x00000000 /* LED_CTRL1 */
218 0x58 0x00000000 /* LED_CTRL2 */
219 0x5c 0x0030c300 /* LED_CTRL3 */
220 0x7c 0x0000007e /* PORT0_STATUS */
221 >;
222 };
223 };
224
225 &eth0 {
226 status = "okay";
227
228 /* default for ar934x, except for 1000M */
229 pll-data = <0x06000000 0x00000101 0x00001616>;
230
231 mtd-mac-address = <&uboot 0x1fc00>;
232 mtd-mac-address-increment = <(-2)>;
233
234 phy-mode = "rgmii";
235 phy-handle = <&phy0>;
236 };