ath79: preliminary support for TP-Link WDR3600 / WDR4300 (AR9344)
[openwrt/openwrt.git] / target / linux / ath79 / dts / ar934x.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include <dt-bindings/clock/ath79-clk.h>
4
5 #include "ath79.dtsi"
6
7 / {
8 compatible = "qca,ar9340";
9
10 #address-cells = <1>;
11 #size-cells = <1>;
12
13 chosen {
14 bootargs = "console=ttyS0,115200";
15 };
16
17 cpus {
18 #address-cells = <1>;
19 #size-cells = <0>;
20
21 cpu@0 {
22 device_type = "cpu";
23 compatible = "mips,mips74Kc";
24 clocks = <&pll ATH79_CLK_CPU>;
25 reg = <0>;
26 };
27 };
28
29 clocks {
30 #address-cells = <1>;
31 #size-cells = <1>;
32 ranges;
33
34 ref: ref {
35 #clock-cells = <0>;
36 compatible = "fixed-clock";
37 clock-output-names = "ref";
38 };
39 };
40
41 ahb {
42 compatible = "simple-bus";
43 ranges;
44
45 #address-cells = <1>;
46 #size-cells = <1>;
47
48 apb: apb {
49 compatible = "simple-bus";
50 ranges;
51
52 #address-cells = <1>;
53 #size-cells = <1>;
54
55 ddr_ctrl: memory-controller@18000000 {
56 compatible = "qca,ar9340-ddr-controller",
57 "qca,ar7240-ddr-controller";
58 reg = <0x18000000 0x12c>;
59
60 #qca,ddr-wb-channel-cells = <1>;
61 };
62
63 uart: uart@18020000 {
64 compatible = "ns16550a";
65 reg = <0x18020000 0x2c>;
66
67 interrupts = <3>;
68
69 clocks = <&pll ATH79_CLK_REF>;
70 clock-names = "uart";
71
72 reg-io-width = <4>;
73 reg-shift = <2>;
74 no-loopback-test;
75
76 status = "disabled";
77 };
78
79 gpio: gpio@18040000 {
80 compatible = "qca,ar9340-gpio";
81 reg = <0x18040000 0x2c>;
82
83 interrupts = <2>;
84 ngpios = <23>;
85
86 gpio-controller;
87 #gpio-cells = <2>;
88
89 interrupt-controller;
90 #interrupt-cells = <2>;
91 };
92
93 pinmux: pinmux@1804002c {
94 compatible = "pinctrl-single";
95
96 reg = <0x1804002c 0x44>;
97
98 #size-cells = <0>;
99
100 pinctrl-single,bit-per-mux;
101 pinctrl-single,register-width = <32>;
102 pinctrl-single,function-mask = <0x1>;
103 #pinctrl-cells = <2>;
104
105 jtag_disable_pins: pinmux_jtag_disable_pins {
106 pinctrl-single,bits = <0x40 0x2 0x2>;
107 };
108 };
109
110 pll: pll-controller@18050000 {
111 compatible = "qca,ar9340-pll", "syscon";
112 reg = <0x18050000 0x4c>;
113
114 #clock-cells = <1>;
115 clocks = <&ref>;
116 clock-names = "ref";
117 clock-output-names = "cpu", "ddr", "ahb";
118 };
119
120 wdt: wdt@18060008 {
121 compatible = "qca,ar9340-wdt", "qca,ar7130-wdt";
122 reg = <0x18060008 0x8>;
123
124 interrupts = <4>;
125
126 clocks = <&pll ATH79_CLK_AHB>;
127 clock-names = "wdt";
128 };
129
130 rst: reset-controller@1806001c {
131 compatible = "qca,ar9340-reset", "qca,ar7100-reset";
132 reg = <0x1806001c 0x4>;
133
134 #reset-cells = <1>;
135 };
136
137 gmac: gmac@18070000 {
138 compatible = "qca,ar9340-gmac", "qca,ar9330-gmac";
139 reg = <0x18070000 0x14>;
140 };
141 };
142
143 usb: usb@1b000000 {
144 compatible = "generic-ehci";
145 reg = <0x1b000000 0x1d8>;
146
147 interrupts = <3>;
148 resets = <&rst 5>;
149 reset-names = "usb-host";
150
151 has-transaction-translator;
152 caps-offset = <0x100>;
153
154 phy-names = "usb-phy";
155 phys = <&usb_phy>;
156
157 status = "disabled";
158 };
159
160 spi: spi@1f000000 {
161 compatible = "qca,ar9340-spi", "qca,ar7100-spi";
162 reg = <0x1f000000 0x1c>;
163
164 clocks = <&pll ATH79_CLK_AHB>;
165 clock-names = "ahb";
166
167 #address-cells = <1>;
168 #size-cells = <0>;
169
170 status = "disabled";
171 };
172 };
173
174 usb_phy: usb-phy {
175 compatible = "qca,ar9340-usb-phy", "qca,ar7200-usb-phy";
176
177 reset-names = "usb-phy", "usb-suspend-override";
178 resets = <&rst 4>, <&rst 3>;
179
180 #phy-cells = <0>;
181
182 status = "disabled";
183 };
184 };
185
186 &cpuintc {
187 qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
188 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
189 <&ddr_ctrl 0>, <&ddr_ctrl 1>;
190 };
191
192 &mdio0 {
193 resets = <&rst 22>;
194 reset-names = "mdio";
195 };
196
197 &eth0 {
198 compatible = "qca,ar9340-eth", "syscon";
199
200 pll-data = <0x16000000 0x00000101 0x00001616>;
201 pll-reg = <0x4 0x2c 17>;
202 pll-handle = <&pll>;
203
204 resets = <&rst 8>, <&rst 9>;
205 reset-names = "mac", "phy";
206 };
207
208 &mdio1 {
209 resets = <&rst 23>;
210 reset-names = "mdio";
211 builtin-switch;
212 };
213
214 &eth1 {
215 compatible = "qca,ar9340-eth", "syscon";
216
217 resets = <&rst 12>, <&rst 13>;
218 reset-names = "mac", "phy";
219 };