target/linux/ath79/dts/ath79.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /dts-v1/;
   3
   4 #include <dt-bindings/clock/ath79-clk.h>
   5
   6 / {
   7         #address-cells = <1>;
   8         #size-cells = <1>;
   9
  10         cpuintc: interrupt-controller {
  11                 compatible = "qca,ar7100-cpu-intc";
  12
  13                 interrupt-controller;
  14                 #interrupt-cells = <1>;
  15         };
  16
  17         ahb {
  18                 compatible = "simple-bus";
  19                 ranges;
  20
  21                 #address-cells = <1>;
  22                 #size-cells = <1>;
  23
  24                 interrupt-parent = <&cpuintc>;
  25
  26                 apb {
  27                         compatible = "simple-bus";
  28                         ranges;
  29
  30                         #address-cells = <1>;
  31                         #size-cells = <1>;
  32
  33                         interrupt-parent = <&miscintc>;
  34
  35                         miscintc: interrupt-controller@18060010 {
  36                                 compatible = "qca,ar7240-misc-intc";
  37                                 reg = <0x18060010 0x4>;
  38
  39                                 interrupt-parent = <&cpuintc>;
  40                                 interrupts = <6>;
  41
  42                                 interrupt-controller;
  43                                 #interrupt-cells = <1>;
  44                         };
  45                 };
  46
  47                 eth0: eth@19000000 {
  48                         status = "disabled";
  49
  50                         compatible = "qca,ath79-eth", "syscon";
  51                         reg = <0x19000000 0x200>;
  52
  53                         interrupts = <4>;
  54                         phy-mode = "mii";
  55
  56                         mdio0: mdio {
  57                                 status = "disabled";
  58
  59                                 compatible = "qca,ath79-mdio";
  60                                 #address-cells = <1>;
  61                                 #size-cells = <0>;
  62
  63                                 regmap = <&eth0>;
  64
  65                                 clocks = <&pll ATH79_CLK_MDIO>;
  66                                 clock-names = "ref";
  67                         };
  68                 };
  69
  70                 eth1: eth@1a000000 {
  71                         status = "disabled";
  72
  73                         compatible = "qca,ath79-eth", "syscon";
  74                         reg = <0x1a000000 0x200>;
  75
  76                         interrupts = <5>;
  77                         phy-mode = "mii";
  78
  79                         mdio1: mdio {
  80                                 status = "disabled";
  81
  82                                 compatible = "qca,ath79-mdio";
  83                                 #address-cells = <1>;
  84                                 #size-cells = <0>;
  85
  86                                 regmap = <&eth1>;
  87
  88                                 clocks = <&pll ATH79_CLK_MDIO>;
  89                                 clock-names = "ref";
  90                         };
  91                 };
  92         };
  93 };