target/linux/ath79/dts/qca953x.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 #include <dt-bindings/clock/ath79-clk.h>
   3 #include "ath79.dtsi"
   4
   5 / {
   6         compatible = "qca,qca9530";
   7
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10
  11         chosen {
  12                 bootargs = "console=ttyS0,115200n8";
  13         };
  14
  15         cpus {
  16                 #address-cells = <1>;
  17                 #size-cells = <0>;
  18
  19                 cpu@0 {
  20                         device_type = "cpu";
  21                         compatible = "mips,mips24Kc";
  22                         clocks = <&pll ATH79_CLK_CPU>;
  23                         reg = <0>;
  24                 };
  25         };
  26
  27         extosc: ref {
  28                 compatible = "fixed-clock";
  29                 #clock-cells = <0>;
  30                 clock-output-names = "ref";
  31                 clock-frequency = <25000000>;
  32         };
  33
  34         ahb {
  35                 apb {
  36                         ddr_ctrl: memory-controller@18000000 {
  37                                 compatible = "qca,ar9530-ddr-controller",
  38                                                 "qca,ar7240-ddr-controller";
  39                                 reg = <0x18000000 0x128>;
  40
  41                                 #qca,ddr-wb-channel-cells = <1>;
  42                         };
  43
  44                         uart: uart@18020000 {
  45                                 compatible = "ns16550a";
  46                                 reg = <0x18020000 0x20>;
  47
  48                                 interrupts = <3>;
  49
  50                                 clocks = <&pll ATH79_CLK_REF>;
  51                                 clock-names = "uart";
  52
  53                                 reg-io-width = <4>;
  54                                 reg-shift = <2>;
  55                                 no-loopback-test;
  56
  57                                 status = "disabled";
  58                         };
  59
  60                         usb_phy: usb-phy@18030000 {
  61                                 compatible = "qca,ar7200-usb-phy";
  62                                 reg = <0x18030000 0x100>;
  63                                 #phy-cells = <0>;
  64
  65                                 reset-names = "usb-phy", "usb-suspend-override";
  66                                 resets = <&rst 4>, <&rst 3>;
  67
  68                                 status = "disabled";
  69                         };
  70
  71                         gpio: gpio@18040000 {
  72                                 compatible = "qca,ar9530-gpio",
  73                                                 "qca,ar9340-gpio";
  74                                 reg = <0x18040000 0x28>;
  75
  76                                 interrupts = <2>;
  77                                 ngpios = <20>;
  78
  79                                 gpio-controller;
  80                                 #gpio-cells = <2>;
  81
  82                                 interrupt-controller;
  83                                 #interrupt-cells = <2>;
  84                         };
  85
  86                         pinmux: pinmux@1804002c {
  87                                 compatible = "pinctrl-single";
  88
  89                                 reg = <0x1804002c 0x48>;
  90
  91                                 #size-cells = <0>;
  92
  93                                 pinctrl-single,bit-per-mux;
  94                                 pinctrl-single,register-width = <32>;
  95                                 pinctrl-single,function-mask = <0x1>;
  96                                 #pinctrl-cells = <2>;
  97
  98                                 jtag_disable_pins: pinmux_jtag_disable_pins {
  99                                         pinctrl-single,bits = <0x40 0x2 0x2>;
 100                                 };
 101                         };
 102
 103                         pll: pll-controller@18050000 {
 104                                 compatible = "qca,qca9530-pll", "syscon";
 105                                 reg = <0x18050000 0x48>;
 106
 107                                 #clock-cells = <1>;
 108                                 clock-output-names = "cpu", "ddr", "ahb";
 109                                 clocks = <&extosc>;
 110                         };
 111
 112                         wdt: wdt@18060008 {
 113                                 compatible = "qca,qca9530-wdt", "qca,ar7130-wdt";
 114                                 reg = <0x18060008 0x8>;
 115
 116                                 interrupts = <4>;
 117
 118                                 clocks = <&pll ATH79_CLK_AHB>;
 119                                 clock-names = "wdt";
 120                         };
 121
 122                         rst: reset-controller@1806001c {
 123                                 compatible = "qca,qca9530-reset",
 124                                                 "qca,ar7100-reset";
 125                                 reg = <0x1806001c 0xac>;
 126
 127                                 #reset-cells = <1>;
 128
 129                                 intc2: interrupt-controller {
 130                                         compatible = "qca,ar9340-intc";
 131
 132                                         interrupt-parent = <&cpuintc>;
 133                                         interrupts = <2>;
 134
 135                                         interrupt-controller;
 136                                         #interrupt-cells = <1>;
 137
 138                                         qca,int-status-addr = <0xac>;
 139                                         qca,pending-bits = <0xf>,       /* wmac */
 140                                                         <0x1f0>;        /* pcie rc1 */
 141
 142                                         qca,ddr-wb-channel-interrupts = <0>, <1>;
 143                                         qca,ddr-wb-channels = <&ddr_ctrl 4>, <&ddr_ctrl 3>;
 144                                 };
 145                         };
 146
 147                         pcie0: pcie-controller@180c0000 {
 148                                 compatible = "qcom,ar7240-pci";
 149                                 #address-cells = <3>;
 150                                 #size-cells = <2>;
 151                                 bus-range = <0x0 0x0>;
 152                                 reg = <0x180c0000 0x1000>, /* CRP */
 153                                       <0x180f0000 0x100>,  /* CTRL */
 154                                       <0x14000000 0x1000>; /* CFG */
 155                                 reg-names = "crp_base", "ctrl_base", "cfg_base";
 156                                 ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000        /* pci memory */
 157                                           0x1000000 0 0x00000000 0x0000000 0 0x000001>;         /* io space */
 158                                 interrupt-parent = <&intc2>;
 159                                 interrupts = <1>;
 160
 161                                 interrupt-controller;
 162                                 #interrupt-cells = <1>;
 163
 164                                 interrupt-map-mask = <0 0 0 1>;
 165                                 interrupt-map = <0 0 0 0 &pcie0 0>;
 166                                 status = "disabled";
 167                         };
 168
 169                         gmac: gmac@18070000 {
 170                                 compatible = "qca,ar9330-gmac";
 171                                 reg = <0x18070000 0x4>;
 172                         };
 173
 174                         wmac: wmac@18100000 {
 175                                 compatible = "qca,qca9530-wmac";
 176                                 reg = <0x18100000 0x20000>;
 177
 178                                 interrupt-parent = <&intc2>;
 179                                 interrupts = <0>;
 180
 181                                 status = "disabled";
 182                         };
 183                 };
 184
 185                 usb0: usb@1b000000 {
 186                         compatible = "generic-ehci";
 187                         reg = <0x1b000000 0x1000>;
 188
 189                         interrupts = <3>;
 190                         resets = <&rst 5>;
 191                         reset-names = "usb-host";
 192                         dr_mode = "host";
 193
 194                         has-transaction-translator;
 195                         caps-offset = <0x100>;
 196
 197                         phy-names = "usb-phy";
 198                         phys = <&usb_phy>;
 199
 200                         status = "disabled";
 201                 };
 202
 203                 spi: spi@1f000000 {
 204                         compatible = "qca,ar9530-spi", "qca,ar7100-spi";
 205                         reg = <0x1f000000 0x10>;
 206
 207                         clocks = <&pll ATH79_CLK_AHB>;
 208                         clock-names = "ahb";
 209
 210                         status = "disabled";
 211
 212                         #address-cells = <1>;
 213                         #size-cells = <0>;
 214                 };
 215
 216         };
 217
 218 };
 219
 220 &cpuintc {
 221         qca,ddr-wb-channel-interrupts = <3>, <4>, <5>;
 222         qca,ddr-wb-channels = <&ddr_ctrl 2>, <&ddr_ctrl 0>,
 223                                                 <&ddr_ctrl 1>;
 224 };
 225
 226 &eth0 {
 227         compatible = "qca,qca9530-eth", "syscon";
 228         pll-data = <0x82000101 0x80000101 0x80001313>;
 229         reg = <0x19000000 0x200
 230                 0x18070000 0x4>;
 231         pll-reg = <0x4 0x2c 17>;
 232         pll-handle = <&pll>;
 233
 234         reset-names = "mac";
 235         resets = <&rst 9>;
 236
 237         phy-mode = "mii";
 238 };
 239
 240
 241 &mdio1 {
 242         status = "okay";
 243         resets = <&rst 23>;
 244         reset-names = "mdio";
 245         builtin-switch;
 246
 247         builtin_switch: switch0@1f {
 248                 compatible = "qca,ar8229";
 249
 250                 reg = <0x1f>;
 251                 resets = <&rst 8>;
 252                 reset-names = "switch";
 253                 phy-mode = "gmii";
 254                 qca,phy4-mii-enable;
 255                 qca,mib-poll-interval = <500>;
 256
 257                 mdio-bus {
 258                         #address-cells = <1>;
 259                         #size-cells = <0>;
 260
 261                         swphy0: ethernet-phy@0 {
 262                                 reg = <0>;
 263                                 phy-mode = "mii";
 264                         };
 265
 266                         swphy4: ethernet-phy@4 {
 267                                 reg = <4>;
 268                                 phy-mode = "mii";
 269                         };
 270                 };
 271         };
 272 };
 273
 274 &eth1 {
 275         status = "okay";
 276
 277         compatible = "qca,qca9530-eth", "syscon";
 278         resets = <&rst 13>;
 279         reset-names = "mac";
 280
 281         phy-mode = "gmii";
 282
 283         fixed-link {
 284                 speed = <1000>;
 285                 full-duplex;
 286         };
 287 };