ath79: fix qca955x pcie0 memory size
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9557.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 #include <dt-bindings/clock/ath79-clk.h>
3 #include "ath79.dtsi"
4
5 / {
6 compatible = "qca,qca9557";
7
8 #address-cells = <1>;
9 #size-cells = <1>;
10
11 cpus {
12 #address-cells = <1>;
13 #size-cells = <0>;
14
15 cpu@0 {
16 device_type = "cpu";
17 compatible = "mips,mips74Kc";
18 clocks = <&pll ATH79_CLK_CPU>;
19 reg = <0>;
20 };
21 };
22
23 extosc: ref {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-output-names = "ref";
27 clock-frequency = <40000000>;
28 };
29
30 ahb {
31 apb {
32 ddr_ctrl: memory-controller@18000000 {
33 compatible = "qca,ar9557-ddr-controller",
34 "qca,ar7240-ddr-controller";
35 reg = <0x18000000 0x100>;
36
37 #qca,ddr-wb-channel-cells = <1>;
38 };
39
40 uart: uart@18020000 {
41 compatible = "ns16550a";
42 reg = <0x18020000 0x20>;
43
44 interrupts = <3>;
45
46 clocks = <&pll ATH79_CLK_REF>;
47 clock-names = "uart";
48
49 reg-io-width = <4>;
50 reg-shift = <2>;
51 no-loopback-test;
52
53 status = "disabled";
54 };
55
56 usb_phy0: usb-phy0@18030000 {
57 compatible ="qca,qca9550-usb-phy", "qca,ar7200-usb-phy";
58 reg = <0x18030000 4>, <0x18030004 4>;
59
60 reset-names = "usb-phy", "usb-suspend-override";
61 resets = <&rst 4>, <&rst 3>;
62
63 #phy-cells = <0>;
64
65 status = "disabled";
66 };
67
68 usb_phy1: usb-phy1@18030010 {
69 compatible = "qca,qca9550-usb-phy", "qca,ar7200-usb-phy";
70 reg = <0x18030010 4>, <0x18030014 4>;
71
72 reset-names = "usb-phy", "usb-suspend-override";
73 resets = <&rst2 4>, <&rst2 3>;
74
75 #phy-cells = <0>;
76
77 status = "disabled";
78 };
79
80 gpio: gpio@18040000 {
81 compatible = "qca,ar9557-gpio",
82 "qca,ar9340-gpio";
83 reg = <0x18040000 0x28>;
84
85 interrupts = <2>;
86 ngpios = <24>;
87
88 gpio-controller;
89 #gpio-cells = <2>;
90
91 interrupt-controller;
92 #interrupt-cells = <2>;
93 };
94
95 pinmux: pinmux@1804002c {
96 compatible = "pinctrl-single";
97
98 reg = <0x1804002c 0x44>;
99
100 #size-cells = <0>;
101
102 pinctrl-single,bit-per-mux;
103 pinctrl-single,register-width = <32>;
104 pinctrl-single,function-mask = <0x1>;
105 #pinctrl-cells = <2>;
106
107 jtag_disable_pins: pinmux_jtag_disable_pins {
108 pinctrl-single,bits = <0x40 0x2 0x2>;
109 };
110 };
111
112 pll: pll-controller@18050000 {
113 compatible = "qca,ar9557-pll",
114 "qca,qca9550-pll", "syscon";
115 reg = <0x18050000 0x50>;
116
117 #clock-cells = <1>;
118 clock-output-names = "cpu", "ddr", "ahb";
119
120 clocks = <&extosc>;
121 };
122
123 wdt: wdt@18060008 {
124 compatible = "qca,ar7130-wdt";
125 reg = <0x18060008 0x8>;
126
127 interrupts = <4>;
128
129 clocks = <&pll ATH79_CLK_AHB>;
130 clock-names = "wdt";
131 };
132
133 rst: reset-controller@1806001c {
134 compatible = "qca,qca9550-reset",
135 "qca,ar7100-reset";
136 reg = <0x1806001c 0x4>;
137
138 #reset-cells = <1>;
139 interrupt-parent = <&cpuintc>;
140
141 intc2: interrupt-controller2 {
142 compatible = "qca,ar9340-intc";
143
144 interrupt-parent = <&cpuintc>;
145 interrupts = <2>;
146
147 interrupt-controller;
148 #interrupt-cells = <1>;
149
150 qca,int-status-addr = <0xac>;
151 qca,pending-bits = <0xf>, /* wmac */
152 <0x1f0>; /* pcie rc 0 */
153 };
154
155 intc3: interrupt-controller3 {
156 compatible = "qca,ar9340-intc";
157
158 interrupt-parent = <&cpuintc>;
159 interrupts = <3>;
160
161 interrupt-controller;
162 #interrupt-cells = <1>;
163
164 qca,int-status-addr = <0xac>;
165 qca,pending-bits = <0x1f000>, /* pcie rc 1 */
166 <0x1000000>, /* usb1 */
167 <0x10000000>; /* usb2 */
168 };
169 };
170
171 rst2: reset-controller@180600c0 {
172 compatible = "qca,qca9550-reset",
173 "qca,ar7100-reset",
174 "simple-bus";
175 reg = <0x180600c0 0x4>;
176
177 #reset-cells = <1>;
178 };
179
180 pcie0: pcie-controller@180c0000 {
181 compatible = "qcom,ar7240-pci";
182 #address-cells = <3>;
183 #size-cells = <2>;
184 bus-range = <0x0 0x0>;
185 reg = <0x180c0000 0x1000>, /* CRP */
186 <0x180f0000 0x100>, /* CTRL */
187 <0x14000000 0x1000>; /* CFG */
188 reg-names = "crp_base", "ctrl_base", "cfg_base";
189 ranges = <0x2000000 0 0x10000000 0x10000000 0 0x02000000 /* pci memory */
190 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
191 interrupt-parent = <&intc2>;
192 interrupts = <1>;
193
194 interrupt-controller;
195 #interrupt-cells = <1>;
196
197 interrupt-map-mask = <0 0 0 1>;
198 interrupt-map = <0 0 0 0 &pcie0 0>;
199 status = "disabled";
200 };
201
202 pcie1: pcie-controller@18250000 {
203 compatible = "qcom,ar7240-pci";
204 #address-cells = <3>;
205 #size-cells = <2>;
206 bus-range = <0x0 0x0>;
207 reg = <0x18250000 0x1000>, /* CRP */
208 <0x18280000 0x100>, /* CTRL */
209 <0x16000000 0x1000>; /* CFG */
210 reg-names = "crp_base", "ctrl_base", "cfg_base";
211 ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */
212 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
213 interrupt-parent = <&intc3>;
214 interrupts = <0>;
215
216 interrupt-controller;
217 #interrupt-cells = <1>;
218
219 interrupt-map-mask = <0 0 0 1>;
220 interrupt-map = <0 0 0 0 &pcie1 0>;
221 status = "disabled";
222 };
223
224 gmac: gmac@18070000 {
225 compatible = "qca,qca9550-gmac";
226 reg = <0x18070000 0x14>;
227 };
228
229 wmac: wmac@18100000 {
230 compatible = "qca,qca9550-wmac";
231 reg = <0x18100000 0x10000>;
232
233 interrupt-parent = <&intc2>;
234 interrupts = <0>;
235
236 status = "disabled";
237 };
238 };
239
240 usb0: usb@1b000000 {
241 compatible = "generic-ehci";
242 reg = <0x1b000000 0x1fc>;
243
244 interrupt-parent = <&intc3>;
245 interrupts = <1>;
246 resets = <&rst 5>;
247 reset-names = "usb-host";
248
249 has-transaction-translator;
250 caps-offset = <0x100>;
251
252 phy-names = "usb-phy0";
253 phys = <&usb_phy0>;
254
255 status = "disabled";
256 };
257
258 usb1: usb@1b400000 {
259 compatible = "generic-ehci";
260 reg = <0x1b400000 0x1fc>;
261
262 interrupt-parent = <&intc3>;
263 interrupts = <2>;
264 resets = <&rst2 5>;
265 reset-names = "usb-host";
266
267 has-transaction-translator;
268 caps-offset = <0x100>;
269
270 phy-names = "usb-phy1";
271 phys = <&usb_phy1>;
272
273 status = "disabled";
274 };
275
276 spi: spi@1f000000 {
277 compatible = "qca,ar9557-spi", "qca,ar7100-spi";
278 reg = <0x1f000000 0x10>;
279
280 clocks = <&pll ATH79_CLK_AHB>;
281 clock-names = "ahb";
282
283 status = "disabled";
284
285 #address-cells = <1>;
286 #size-cells = <0>;
287 };
288 };
289 };
290
291 &mdio0 {
292 resets = <&rst 22>;
293 reset-names = "mdio";
294 };
295
296 &eth0 {
297 compatible = "qca,qca9550-eth", "syscon", "simple-mfd";
298
299 pll-reg = <0 0x28 0>;
300 pll-handle = <&pll>;
301
302 pll-data = <0x16000000 0x00000101 0x00001616>;
303 phy-mode = "rgmii";
304
305 resets = <&rst 9>;
306 reset-names = "mac";
307 };
308
309 &mdio1 {
310 resets = <&rst 23>;
311 reset-names = "mdio";
312 };
313
314 &eth1 {
315 compatible = "qca,qca9550-eth", "syscon", "simple-mfd";
316
317 pll-reg = <0 0x48 0>;
318 pll-handle = <&pll>;
319
320 pll-data = <0x16000000 0x00000101 0x00001616>;
321 phy-mode = "sgmii";
322
323 resets = <&rst 13>;
324 reset-names = "mac";
325 };