uclient: update to Git HEAD (2024-04-18)
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca955x.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "ath79.dtsi"
4
5 / {
6 compatible = "qca,qca9550";
7
8 #address-cells = <1>;
9 #size-cells = <1>;
10
11 chosen {
12 bootargs = "console=ttyS0,115200n8";
13 };
14
15 cpus {
16 #address-cells = <1>;
17 #size-cells = <0>;
18
19 cpu@0 {
20 device_type = "cpu";
21 compatible = "mips,mips74Kc";
22 clocks = <&pll ATH79_CLK_CPU>;
23 reg = <0>;
24 };
25 };
26
27 extosc: ref {
28 compatible = "fixed-clock";
29 #clock-cells = <0>;
30 clock-output-names = "ref";
31 clock-frequency = <40000000>;
32 };
33
34 ahb {
35 apb {
36 ddr_ctrl: memory-controller@18000000 {
37 compatible = "qca,qca9550-ddr-controller",
38 "qca,ar7240-ddr-controller";
39 reg = <0x18000000 0x100>;
40
41 #qca,ddr-wb-channel-cells = <1>;
42 };
43
44 uart: uart@18020000 {
45 compatible = "ns16550a";
46 reg = <0x18020000 0x20>;
47
48 interrupts = <3>;
49
50 clocks = <&pll ATH79_CLK_REF>;
51 clock-names = "uart";
52
53 reg-io-width = <4>;
54 reg-shift = <2>;
55 no-loopback-test;
56 };
57
58 usb_phy0: usb-phy0@18030000 {
59 compatible ="qca,qca9550-usb-phy", "qca,ar7200-usb-phy";
60 reg = <0x18030000 4>, <0x18030004 4>;
61
62 reset-names = "usb-phy", "usb-suspend-override";
63 resets = <&rst 4>, <&rst 3>;
64
65 #phy-cells = <0>;
66
67 status = "disabled";
68 };
69
70 usb_phy1: usb-phy1@18030010 {
71 compatible = "qca,qca9550-usb-phy", "qca,ar7200-usb-phy";
72 reg = <0x18030010 4>, <0x18030014 4>;
73
74 reset-names = "usb-phy", "usb-suspend-override";
75 resets = <&rst2 4>, <&rst2 3>;
76
77 #phy-cells = <0>;
78
79 status = "disabled";
80 };
81
82 gpio: gpio@18040000 {
83 compatible = "qca,qca9550-gpio",
84 "qca,ar9340-gpio";
85 reg = <0x18040000 0x28>;
86
87 interrupts = <2>;
88 ngpios = <24>;
89
90 gpio-controller;
91 #gpio-cells = <2>;
92
93 interrupt-controller;
94 #interrupt-cells = <2>;
95 };
96
97 pinmux: pinmux@1804002c {
98 compatible = "pinctrl-single";
99
100 reg = <0x1804002c 0x44>;
101
102 #size-cells = <0>;
103
104 pinctrl-single,bit-per-mux;
105 pinctrl-single,register-width = <32>;
106 pinctrl-single,function-mask = <0x1>;
107 #pinctrl-cells = <2>;
108
109 jtag_disable_pins: pinmux_jtag_disable_pins {
110 pinctrl-single,bits = <0x40 0x2 0x2>;
111 };
112 };
113
114 pll: pll-controller@18050000 {
115 compatible = "qca,qca9550-pll",
116 "qca,qca9550-pll", "syscon";
117 reg = <0x18050000 0x50>;
118
119 #clock-cells = <1>;
120 clock-output-names = "cpu", "ddr", "ahb";
121
122 clocks = <&extosc>;
123 };
124
125 wdt: wdt@18060008 {
126 compatible = "qca,ar7130-wdt";
127 reg = <0x18060008 0x8>;
128
129 interrupts = <4>;
130
131 clocks = <&pll ATH79_CLK_AHB>;
132 clock-names = "wdt";
133 };
134
135 rst: reset-controller@1806001c {
136 compatible = "qca,qca9550-reset",
137 "qca,ar7100-reset";
138 reg = <0x1806001c 0x4>;
139
140 #reset-cells = <1>;
141 interrupt-parent = <&cpuintc>;
142
143 intc2: interrupt-controller2 {
144 compatible = "qca,ar9340-intc";
145
146 interrupt-parent = <&cpuintc>;
147 interrupts = <2>;
148
149 interrupt-controller;
150 #interrupt-cells = <1>;
151
152 qca,int-status-addr = <0xac>;
153 qca,pending-bits = <0xf>, /* wmac */
154 <0x1f0>; /* pcie rc 0 */
155 };
156
157 intc3: interrupt-controller3 {
158 compatible = "qca,ar9340-intc";
159
160 interrupt-parent = <&cpuintc>;
161 interrupts = <3>;
162
163 interrupt-controller;
164 #interrupt-cells = <1>;
165
166 qca,int-status-addr = <0xac>;
167 qca,pending-bits = <0x1f000>, /* pcie rc 1 */
168 <0x1000000>, /* usb1 */
169 <0x10000000>; /* usb2 */
170 };
171 };
172
173 rst2: reset-controller@180600c0 {
174 compatible = "qca,qca9550-reset",
175 "qca,ar7100-reset",
176 "simple-bus";
177 reg = <0x180600c0 0x4>;
178
179 #reset-cells = <1>;
180 };
181 };
182
183 gmac: gmac@18070000 {
184 compatible = "qca,qca9550-gmac";
185 reg = <0x18070000 0x58>;
186 };
187
188 pcie0: pcie-controller@180c0000 {
189 compatible = "qcom,qca9550-pci", "qcom,ar7240-pci";
190 #address-cells = <3>;
191 #size-cells = <2>;
192 bus-range = <0x0 0x0>;
193 reg = <0x180c0000 0x1000>, /* CRP */
194 <0x180f0000 0x100>, /* CTRL */
195 <0x14000000 0x1000>; /* CFG */
196 reg-names = "crp_base", "ctrl_base", "cfg_base";
197 ranges = <0x2000000 0 0x10000000 0x10000000 0 0x02000000 /* pci memory */
198 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
199 interrupt-parent = <&intc2>;
200 interrupts = <1>;
201
202 device_type = "pci";
203
204 resets = <&rst 6>, <&rst 7>;
205 reset-names = "hc", "phy";
206
207 interrupt-controller;
208 #interrupt-cells = <1>;
209
210 interrupt-map-mask = <0 0 0 1>;
211 interrupt-map = <0 0 0 0 &pcie0 0>;
212 status = "disabled";
213 };
214
215 wmac: wmac@18100000 {
216 compatible = "qca,qca9550-wmac";
217 reg = <0x18100000 0x10000>;
218
219 interrupt-parent = <&intc2>;
220 interrupts = <0>;
221
222 status = "disabled";
223 };
224
225 pcie1: pcie-controller@18250000 {
226 compatible = "qcom,qca9550-pci", "qcom,ar7240-pci";
227 #address-cells = <3>;
228 #size-cells = <2>;
229 bus-range = <0x0 0x0>;
230 reg = <0x18250000 0x1000>, /* CRP */
231 <0x18280000 0x100>, /* CTRL */
232 <0x16000000 0x1000>; /* CFG */
233 reg-names = "crp_base", "ctrl_base", "cfg_base";
234 ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */
235 0x1000000 0 0x00000000 0x0000001 0 0x000001>; /* io space */
236 interrupt-parent = <&intc3>;
237 interrupts = <0>;
238
239 device_type = "pci";
240
241 resets = <&rst2 6>, <&rst2 7>;
242 reset-names = "hc", "phy";
243
244 interrupt-controller;
245 #interrupt-cells = <1>;
246
247 interrupt-map-mask = <0 0 0 1>;
248 interrupt-map = <0 0 0 0 &pcie1 0>;
249 status = "disabled";
250 };
251
252 usb0: usb@1b000000 {
253 compatible = "generic-ehci";
254 reg = <0x1b000000 0x1fc>;
255
256 interrupt-parent = <&intc3>;
257 interrupts = <1>;
258 resets = <&rst 5>;
259 reset-names = "usb-host";
260
261 has-transaction-translator;
262 caps-offset = <0x100>;
263
264 phy-names = "usb-phy0";
265 phys = <&usb_phy0>;
266
267 status = "disabled";
268 };
269
270 usb1: usb@1b400000 {
271 compatible = "generic-ehci";
272 reg = <0x1b400000 0x1fc>;
273
274 interrupt-parent = <&intc3>;
275 interrupts = <2>;
276 resets = <&rst2 5>;
277 reset-names = "usb-host";
278
279 has-transaction-translator;
280 caps-offset = <0x100>;
281
282 phy-names = "usb-phy1";
283 phys = <&usb_phy1>;
284
285 status = "disabled";
286 };
287
288 nand: nand@1b800200 {
289 compatible = "qca,ar934x-nand";
290 reg = <0x1b800200 0xb8>;
291
292 interrupts = <21>;
293 interrupt-parent = <&miscintc>;
294
295 resets = <&rst 14>;
296 reset-names = "nand";
297
298 nand-ecc-mode = "hw";
299
300 #address-cells = <1>;
301 #size-cells = <0>;
302
303 status = "disabled";
304 };
305
306 spi: spi@1f000000 {
307 compatible = "qca,ar934x-spi";
308 reg = <0x1f000000 0x1c>;
309
310 clocks = <&pll ATH79_CLK_AHB>;
311
312 status = "disabled";
313
314 #address-cells = <1>;
315 #size-cells = <0>;
316 };
317 };
318 };
319
320 &mdio0 {
321 compatible = "qca,ar9340-mdio";
322 };
323
324 &eth0 {
325 compatible = "qca,qca9550-eth", "syscon";
326
327 pll-reg = <0 0x28 0>;
328 pll-handle = <&pll>;
329
330 pll-data = <0x16000000 0x00000101 0x00001616>;
331 phy-mode = "rgmii";
332
333 resets = <&rst 9>, <&rst 22>;
334 reset-names = "mac", "mdio";
335 };
336
337 &mdio1 {
338 compatible = "qca,ar9340-mdio";
339 };
340
341 &eth1 {
342 compatible = "qca,qca9550-eth", "syscon";
343
344 pll-reg = <0 0x48 0>;
345 pll-handle = <&pll>;
346
347 pll-data = <0x16000000 0x00000101 0x00001616>;
348 phy-mode = "sgmii";
349
350 resets = <&rst 13>, <&rst 23>;
351 reset-names = "mac", "mdio";
352 };