ath79: enable UART in SoC DTSI files
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca955x_zyxel_nbg6x16.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca955x.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 keys: keys {
10 compatible = "gpio-keys";
11
12 wifi {
13 label = "WiFi on/off button";
14 linux,code = <KEY_RFKILL>;
15 linux,input-type = <EV_SW>;
16 gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
17 debounce-interval = <60>;
18 };
19
20 wps {
21 label = "WPS button";
22 linux,code = <KEY_WPS_BUTTON>;
23 gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
24 debounce-interval = <60>;
25 };
26
27 reset {
28 label = "Reset button";
29 linux,code = <KEY_RESTART>;
30 gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
31 debounce-interval = <60>;
32 };
33 };
34 };
35
36 &gpio {
37 gpio_usb_power: usb_power {
38 gpio-hog;
39 gpios = <16 0>;
40 output-high;
41 };
42 };
43
44 &mdio0 {
45 status = "okay";
46
47 phy17: ethernet-phy@11 {
48 reg = <0x11>;
49 phy-mode = "rgmii-id";
50 };
51
52 switch0@1f {
53 compatible = "qca,ar8327";
54 reg = <0x1f>;
55 qca,ar8327-initvals = <
56 0x04 0x87600000 /* PORT0 PAD MODE CTRL */
57 0x0c 0x00080080 /* PORT6 PAD MODE CTRL */
58 0x10 0x81000080 /* POWER_ON_STRAP */
59 0x50 0xffb7ffb7 /* LED_CTRL0 */
60 0x54 0xffb7ffb7 /* LED_CTRL1 */
61 0x58 0xffb7ffb7 /* LED_CTRL2 */
62 0x5c 0x03ffff00 /* LED_CTRL3 */
63 0x7c 0x0000007e /* PORT0_STATUS */
64 0x94 0x0000007e /* PORT6 STATUS */
65 >;
66 };
67 };
68
69 &mdio1 {
70 status = "okay";
71
72 phy1: ethernet-phy@1 {
73 reg = <1>;
74 phy-mode = "sgmii";
75 };
76 };
77
78
79 &eth0 {
80 status = "okay";
81
82 pll-data = <0xa6000000 0x00000101 0x00001616>;
83 phy-handle = <&phy17>;
84
85 fixed-link {
86 speed = <1000>;
87 full-duplex;
88 };
89 };
90
91 &eth1 {
92 status = "okay";
93
94 pll-data = <0x03000101 0x00000101 0x00001616>;
95 phy-handle = <&phy1>;
96
97 fixed-link {
98 speed = <1000>;
99 full-duplex;
100 };
101 };
102
103 &wmac {
104 status = "okay";
105
106 mtd-cal-data = <&art 0x1000>;
107 };
108
109 &usb_phy0 {
110 status = "okay";
111 };
112
113 &usb_phy1 {
114 status = "okay";
115 };
116
117 &usb0 {
118 status = "okay";
119
120 hub_port0: port@1 {
121 reg = <1>;
122 #trigger-source-cells = <0>;
123 };
124
125 };
126
127 &usb1 {
128 status = "okay";
129
130 hub_port1: port@1 {
131 reg = <1>;
132 #trigger-source-cells = <0>;
133 };
134 };