ath79: align GL-AR750S boardname to other GL.iNet devices
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9563_glinet_gl-ar750s.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6
7 #include "qca956x.dtsi"
8
9 / {
10 compatible = "glinet,gl-ar750s", "qca,qca9563";
11 model = "GL.iNet GL-AR750S";
12
13 chosen {
14 bootargs = "console=ttyS0,115200n8";
15 };
16
17 aliases {
18 led-boot = &power;
19 led-failsafe = &power;
20 led-running = &power;
21 led-upgrade = &power;
22 };
23
24 keys {
25 compatible = "gpio-keys-polled";
26 poll-interval = <20>;
27 pinctrl-names = "default";
28 pinctrl-0 = <&jtag_disable_pins>;
29
30 reset {
31 label = "reset";
32 linux,code = <KEY_RESTART>;
33 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
34 };
35
36 mode {
37 label = "mode";
38 linux,code = <BTN_0>;
39 linux,input-type = <EV_SW>;
40 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
41 };
42 };
43
44 leds {
45 compatible = "gpio-leds";
46
47 power: power {
48 label = "gl-ar750s:green:power";
49 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
50 default-state = "keep";
51 };
52
53 wlan2g {
54 label = "gl-ar750s:green:wlan2g";
55 gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
56 linux,default-trigger = "phy1tpt";
57 };
58
59 wlan5g {
60 label = "gl-ar750s:green:wlan5g";
61 gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
62 linux,default-trigger = "phy0tpt";
63 };
64 };
65 };
66
67 &spi {
68 status = "okay";
69 num-cs = <0>;
70
71 flash@0 {
72 compatible = "jedec,spi-nor";
73 reg = <0>;
74 spi-max-frequency = <25000000>;
75
76 partitions {
77 compatible = "fixed-partitions";
78 #address-cells = <1>;
79 #size-cells = <1>;
80
81 partition@0 {
82 label = "u-boot";
83 reg = <0x000000 0x040000>;
84 read-only;
85 };
86
87 partition@40000 {
88 label = "u-boot-env";
89 reg = <0x040000 0x010000>;
90 };
91
92 art: partition@50000 {
93 label = "art";
94 reg = <0x050000 0x010000>;
95 };
96
97 partition@60000 {
98 compatible = "denx,uimage";
99 label = "firmware";
100 reg = <0x060000 0xfa0000>;
101 };
102 };
103 };
104 };
105
106 &pcie {
107 status = "okay";
108 };
109
110 &uart {
111 status = "okay";
112 };
113
114 &usb0 {
115 #address-cells = <1>;
116 #size-cells = <0>;
117 status = "okay";
118
119 hub_port: port@1 {
120 reg = <1>;
121 #trigger-source-cells = <0>;
122 };
123 };
124
125 &usb_phy0 {
126 status = "okay";
127 };
128
129 &mdio0 {
130 status = "okay";
131 phy-mask = <0>;
132
133 phy0: ethernet-phy@0 {
134 reg = <0>;
135 phy-mode = "sgmii";
136 qca,ar8327-initvals = <
137 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
138 0x7c 0x0000007e /* PORT0_STATUS */
139 >;
140 };
141 };
142
143 &eth0 {
144 status = "okay";
145
146 mtd-mac-address = <&art 0x0>;
147 phy-handle = <&phy0>;
148 };
149
150 &wmac {
151 status = "okay";
152 mtd-cal-data = <&art 0x1000>;
153 mtd-mac-address = <&art 0x1002>;
154 };